target/arm: Decode aa32 armv8.3 3-same
[qemu/ar7.git] / include / exec / gen-icount.h
blob54aaa61d6500a83b70c6d6c8e802d4fef29f6ff5
1 #ifndef GEN_ICOUNT_H
2 #define GEN_ICOUNT_H
4 #include "qemu/timer.h"
6 /* Helpers for instruction counting code generation. */
8 static TCGOp *icount_start_insn;
10 static inline void gen_tb_start(TranslationBlock *tb)
12 TCGv_i32 count, imm;
14 tcg_ctx->exitreq_label = gen_new_label();
15 if (tb_cflags(tb) & CF_USE_ICOUNT) {
16 count = tcg_temp_local_new_i32();
17 } else {
18 count = tcg_temp_new_i32();
21 tcg_gen_ld_i32(count, cpu_env,
22 -ENV_OFFSET + offsetof(CPUState, icount_decr.u32));
24 if (tb_cflags(tb) & CF_USE_ICOUNT) {
25 imm = tcg_temp_new_i32();
26 /* We emit a movi with a dummy immediate argument. Keep the insn index
27 * of the movi so that we later (when we know the actual insn count)
28 * can update the immediate argument with the actual insn count. */
29 tcg_gen_movi_i32(imm, 0xdeadbeef);
30 icount_start_insn = tcg_last_op();
32 tcg_gen_sub_i32(count, count, imm);
33 tcg_temp_free_i32(imm);
36 tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label);
38 if (tb_cflags(tb) & CF_USE_ICOUNT) {
39 tcg_gen_st16_i32(count, cpu_env,
40 -ENV_OFFSET + offsetof(CPUState, icount_decr.u16.low));
43 tcg_temp_free_i32(count);
46 static inline void gen_tb_end(TranslationBlock *tb, int num_insns)
48 if (tb_cflags(tb) & CF_USE_ICOUNT) {
49 /* Update the num_insn immediate parameter now that we know
50 * the actual insn count. */
51 tcg_set_insn_param(icount_start_insn, 1, num_insns);
54 gen_set_label(tcg_ctx->exitreq_label);
55 tcg_gen_exit_tb((uintptr_t)tb + TB_EXIT_REQUESTED);
58 static inline void gen_io_start(void)
60 TCGv_i32 tmp = tcg_const_i32(1);
61 tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
62 tcg_temp_free_i32(tmp);
65 static inline void gen_io_end(void)
67 TCGv_i32 tmp = tcg_const_i32(0);
68 tcg_gen_st_i32(tmp, cpu_env, -ENV_OFFSET + offsetof(CPUState, can_do_io));
69 tcg_temp_free_i32(tmp);
72 #endif