ui: remove support for GTK2 in favour of GTK3
[qemu/ar7.git] / tcg / tcg-op.h
blob7513c1eb7c5336e43b3f3bcc83f3ba452dfe7d81
1 /*
2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include "tcg.h"
26 #include "exec/helper-proto.h"
27 #include "exec/helper-gen.h"
29 /* Basic output routines. Not for general consumption. */
31 void tcg_gen_op1(TCGOpcode, TCGArg);
32 void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
33 void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
34 void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
35 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
36 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
38 void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
39 void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
40 void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
42 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
44 tcg_gen_op1(opc, tcgv_i32_arg(a1));
47 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
49 tcg_gen_op1(opc, tcgv_i64_arg(a1));
52 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
54 tcg_gen_op1(opc, a1);
57 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
59 tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
62 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
64 tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
67 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
69 tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
72 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
74 tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
77 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
79 tcg_gen_op2(opc, a1, a2);
82 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
83 TCGv_i32 a2, TCGv_i32 a3)
85 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
88 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
89 TCGv_i64 a2, TCGv_i64 a3)
91 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
94 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
95 TCGv_i32 a2, TCGArg a3)
97 tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
100 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
101 TCGv_i64 a2, TCGArg a3)
103 tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
106 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
107 TCGv_ptr base, TCGArg offset)
109 tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
112 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
113 TCGv_ptr base, TCGArg offset)
115 tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
118 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
119 TCGv_i32 a3, TCGv_i32 a4)
121 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
122 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
125 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
126 TCGv_i64 a3, TCGv_i64 a4)
128 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
129 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
132 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
133 TCGv_i32 a3, TCGArg a4)
135 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
136 tcgv_i32_arg(a3), a4);
139 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
140 TCGv_i64 a3, TCGArg a4)
142 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
143 tcgv_i64_arg(a3), a4);
146 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
147 TCGArg a3, TCGArg a4)
149 tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
152 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
153 TCGArg a3, TCGArg a4)
155 tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
158 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
159 TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
161 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
162 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
165 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
166 TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
168 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
169 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
172 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
173 TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
175 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
176 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
179 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
180 TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
182 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
183 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
186 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
187 TCGv_i32 a3, TCGArg a4, TCGArg a5)
189 tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
190 tcgv_i32_arg(a3), a4, a5);
193 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
194 TCGv_i64 a3, TCGArg a4, TCGArg a5)
196 tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
197 tcgv_i64_arg(a3), a4, a5);
200 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
201 TCGv_i32 a3, TCGv_i32 a4,
202 TCGv_i32 a5, TCGv_i32 a6)
204 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
205 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
206 tcgv_i32_arg(a6));
209 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
210 TCGv_i64 a3, TCGv_i64 a4,
211 TCGv_i64 a5, TCGv_i64 a6)
213 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
214 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
215 tcgv_i64_arg(a6));
218 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
219 TCGv_i32 a3, TCGv_i32 a4,
220 TCGv_i32 a5, TCGArg a6)
222 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
223 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
226 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
227 TCGv_i64 a3, TCGv_i64 a4,
228 TCGv_i64 a5, TCGArg a6)
230 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
231 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
234 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
235 TCGv_i32 a3, TCGv_i32 a4,
236 TCGArg a5, TCGArg a6)
238 tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
239 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
242 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
243 TCGv_i64 a3, TCGv_i64 a4,
244 TCGArg a5, TCGArg a6)
246 tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
247 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
251 /* Generic ops. */
253 static inline void gen_set_label(TCGLabel *l)
255 tcg_gen_op1(INDEX_op_set_label, label_arg(l));
258 static inline void tcg_gen_br(TCGLabel *l)
260 tcg_gen_op1(INDEX_op_br, label_arg(l));
263 void tcg_gen_mb(TCGBar);
265 /* Helper calls. */
267 /* 32 bit ops */
269 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
270 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
271 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
272 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
273 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
274 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
275 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
276 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
277 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
278 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
279 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
280 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
281 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
282 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
283 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
284 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
285 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
286 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
287 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
288 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
289 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
290 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
291 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
292 void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
293 void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
294 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
295 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
296 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
297 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
298 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
299 unsigned int ofs, unsigned int len);
300 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
301 unsigned int ofs, unsigned int len);
302 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
303 unsigned int ofs, unsigned int len);
304 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
305 unsigned int ofs, unsigned int len);
306 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
307 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
308 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
309 TCGv_i32 arg1, TCGv_i32 arg2);
310 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
311 TCGv_i32 arg1, int32_t arg2);
312 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
313 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
314 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
315 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
316 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
317 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
318 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
319 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
320 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
321 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
322 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
323 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
324 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
325 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
326 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
327 void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
328 void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
329 void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
330 void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
332 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
334 tcg_gen_op1_i32(INDEX_op_discard, arg);
337 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
339 if (ret != arg) {
340 tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
344 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
346 tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
349 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
350 tcg_target_long offset)
352 tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
355 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
356 tcg_target_long offset)
358 tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
361 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
362 tcg_target_long offset)
364 tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
367 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
368 tcg_target_long offset)
370 tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
373 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
374 tcg_target_long offset)
376 tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
379 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
380 tcg_target_long offset)
382 tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
385 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
386 tcg_target_long offset)
388 tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
391 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
392 tcg_target_long offset)
394 tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
397 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
399 tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
402 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
404 tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
407 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
409 tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
412 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
414 tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
417 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
419 tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
422 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
424 tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
427 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
429 tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
432 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
434 tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
437 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
439 tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
442 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
444 if (TCG_TARGET_HAS_neg_i32) {
445 tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
446 } else {
447 tcg_gen_subfi_i32(ret, 0, arg);
451 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
453 if (TCG_TARGET_HAS_not_i32) {
454 tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
455 } else {
456 tcg_gen_xori_i32(ret, arg, -1);
460 /* 64 bit ops */
462 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
463 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
464 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
465 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
466 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
467 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
468 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
469 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
470 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
471 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
472 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
473 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
474 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
475 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
476 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
477 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
478 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
479 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
480 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
481 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
482 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
483 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
484 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
485 void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
486 void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
487 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
488 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
489 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
490 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
491 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
492 unsigned int ofs, unsigned int len);
493 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
494 unsigned int ofs, unsigned int len);
495 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
496 unsigned int ofs, unsigned int len);
497 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
498 unsigned int ofs, unsigned int len);
499 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
500 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
501 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
502 TCGv_i64 arg1, TCGv_i64 arg2);
503 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
504 TCGv_i64 arg1, int64_t arg2);
505 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
506 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
507 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
508 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
509 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
510 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
511 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
512 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
513 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
514 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
515 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
516 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
517 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
518 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
519 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
520 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
521 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
522 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
523 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
524 void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
525 void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
526 void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
527 void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
529 #if TCG_TARGET_REG_BITS == 64
530 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
532 tcg_gen_op1_i64(INDEX_op_discard, arg);
535 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
537 if (ret != arg) {
538 tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
542 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
544 tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
547 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
548 tcg_target_long offset)
550 tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
553 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
554 tcg_target_long offset)
556 tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
559 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
560 tcg_target_long offset)
562 tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
565 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
566 tcg_target_long offset)
568 tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
571 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
572 tcg_target_long offset)
574 tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
577 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
578 tcg_target_long offset)
580 tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
583 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
584 tcg_target_long offset)
586 tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
589 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
590 tcg_target_long offset)
592 tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
595 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
596 tcg_target_long offset)
598 tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
601 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
602 tcg_target_long offset)
604 tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
607 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
608 tcg_target_long offset)
610 tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
613 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
615 tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
618 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
620 tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
623 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
625 tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
628 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
630 tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
633 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
635 tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
638 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
640 tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
643 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
645 tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
648 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
650 tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
653 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
655 tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
657 #else /* TCG_TARGET_REG_BITS == 32 */
658 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
659 tcg_target_long offset)
661 tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
664 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
665 tcg_target_long offset)
667 tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
670 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
671 tcg_target_long offset)
673 tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
676 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
678 tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
679 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
682 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
684 tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
685 TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
688 void tcg_gen_discard_i64(TCGv_i64 arg);
689 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
690 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
691 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
692 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
693 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
694 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
695 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
696 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
697 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
698 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
699 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
700 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
701 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
702 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
703 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
704 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
705 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
706 #endif /* TCG_TARGET_REG_BITS */
708 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
710 if (TCG_TARGET_HAS_neg_i64) {
711 tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
712 } else {
713 tcg_gen_subfi_i64(ret, 0, arg);
717 /* Size changing operations. */
719 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
720 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
721 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
722 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
723 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
724 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
725 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
727 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
729 tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
732 /* QEMU specific operations. */
734 #ifndef TARGET_LONG_BITS
735 #error must include QEMU headers
736 #endif
738 #if TARGET_INSN_START_WORDS == 1
739 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
740 static inline void tcg_gen_insn_start(target_ulong pc)
742 tcg_gen_op1(INDEX_op_insn_start, pc);
744 # else
745 static inline void tcg_gen_insn_start(target_ulong pc)
747 tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
749 # endif
750 #elif TARGET_INSN_START_WORDS == 2
751 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
752 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
754 tcg_gen_op2(INDEX_op_insn_start, pc, a1);
756 # else
757 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
759 tcg_gen_op4(INDEX_op_insn_start,
760 (uint32_t)pc, (uint32_t)(pc >> 32),
761 (uint32_t)a1, (uint32_t)(a1 >> 32));
763 # endif
764 #elif TARGET_INSN_START_WORDS == 3
765 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
766 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
767 target_ulong a2)
769 tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
771 # else
772 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
773 target_ulong a2)
775 tcg_gen_op6(INDEX_op_insn_start,
776 (uint32_t)pc, (uint32_t)(pc >> 32),
777 (uint32_t)a1, (uint32_t)(a1 >> 32),
778 (uint32_t)a2, (uint32_t)(a2 >> 32));
780 # endif
781 #else
782 # error "Unhandled number of operands to insn_start"
783 #endif
786 * tcg_gen_exit_tb() - output exit_tb TCG operation
787 * @tb: The TranslationBlock from which we are exiting
788 * @idx: Direct jump slot index, or exit request
790 * See tcg/README for more info about this TCG operation.
791 * See also tcg.h and the block comment above TB_EXIT_MASK.
793 * For a normal exit from the TB, back to the main loop, @tb should
794 * be NULL and @idx should be 0. Otherwise, @tb should be valid and
795 * @idx should be one of the TB_EXIT_ values.
797 void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx);
800 * tcg_gen_goto_tb() - output goto_tb TCG operation
801 * @idx: Direct jump slot index (0 or 1)
803 * See tcg/README for more info about this TCG operation.
805 * NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
806 * the pages this TB resides in because we don't take care of direct jumps when
807 * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
808 * static address translation, so the destination address is always valid, TBs
809 * are always invalidated properly, and direct jumps are reset when mapping
810 * changes.
812 void tcg_gen_goto_tb(unsigned idx);
815 * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid
816 * @addr: Guest address of the target TB
818 * If the TB is not valid, jump to the epilogue.
820 * This operation is optional. If the TCG backend does not implement goto_ptr,
821 * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
823 void tcg_gen_lookup_and_goto_ptr(void);
825 #if TARGET_LONG_BITS == 32
826 #define tcg_temp_new() tcg_temp_new_i32()
827 #define tcg_global_reg_new tcg_global_reg_new_i32
828 #define tcg_global_mem_new tcg_global_mem_new_i32
829 #define tcg_temp_local_new() tcg_temp_local_new_i32()
830 #define tcg_temp_free tcg_temp_free_i32
831 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
832 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
833 #else
834 #define tcg_temp_new() tcg_temp_new_i64()
835 #define tcg_global_reg_new tcg_global_reg_new_i64
836 #define tcg_global_mem_new tcg_global_mem_new_i64
837 #define tcg_temp_local_new() tcg_temp_local_new_i64()
838 #define tcg_temp_free tcg_temp_free_i64
839 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
840 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
841 #endif
843 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
844 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
845 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
846 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
848 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
850 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
853 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
855 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
858 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
860 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
863 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
865 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
868 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
870 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
873 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
875 tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
878 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
880 tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
883 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
885 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
888 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
890 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
893 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
895 tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
898 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
900 tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
903 void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
904 TCGArg, TCGMemOp);
905 void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
906 TCGArg, TCGMemOp);
908 void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
909 void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
911 void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
912 void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
913 void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
914 void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
915 void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
916 void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
917 void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
918 void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
919 void tcg_gen_atomic_fetch_smin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
920 void tcg_gen_atomic_fetch_smin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
921 void tcg_gen_atomic_fetch_umin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
922 void tcg_gen_atomic_fetch_umin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
923 void tcg_gen_atomic_fetch_smax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
924 void tcg_gen_atomic_fetch_smax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
925 void tcg_gen_atomic_fetch_umax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
926 void tcg_gen_atomic_fetch_umax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
928 void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
929 void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
930 void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
931 void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
932 void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
933 void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
934 void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
935 void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
936 void tcg_gen_atomic_smin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
937 void tcg_gen_atomic_smin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
938 void tcg_gen_atomic_umin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
939 void tcg_gen_atomic_umin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
940 void tcg_gen_atomic_smax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
941 void tcg_gen_atomic_smax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
942 void tcg_gen_atomic_umax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
943 void tcg_gen_atomic_umax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
945 void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
946 void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
947 void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
948 void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
949 void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
950 void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
951 void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
952 void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
953 void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
954 void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
955 void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
956 void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
957 void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
958 void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
959 void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
960 void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
961 void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
962 void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
964 void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
965 void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
966 void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
968 void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
969 TCGv_vec a, TCGv_vec b);
971 void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
972 void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
973 void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
975 #if TARGET_LONG_BITS == 64
976 #define tcg_gen_movi_tl tcg_gen_movi_i64
977 #define tcg_gen_mov_tl tcg_gen_mov_i64
978 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
979 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
980 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
981 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
982 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
983 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
984 #define tcg_gen_ld_tl tcg_gen_ld_i64
985 #define tcg_gen_st8_tl tcg_gen_st8_i64
986 #define tcg_gen_st16_tl tcg_gen_st16_i64
987 #define tcg_gen_st32_tl tcg_gen_st32_i64
988 #define tcg_gen_st_tl tcg_gen_st_i64
989 #define tcg_gen_add_tl tcg_gen_add_i64
990 #define tcg_gen_addi_tl tcg_gen_addi_i64
991 #define tcg_gen_sub_tl tcg_gen_sub_i64
992 #define tcg_gen_neg_tl tcg_gen_neg_i64
993 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
994 #define tcg_gen_subi_tl tcg_gen_subi_i64
995 #define tcg_gen_and_tl tcg_gen_and_i64
996 #define tcg_gen_andi_tl tcg_gen_andi_i64
997 #define tcg_gen_or_tl tcg_gen_or_i64
998 #define tcg_gen_ori_tl tcg_gen_ori_i64
999 #define tcg_gen_xor_tl tcg_gen_xor_i64
1000 #define tcg_gen_xori_tl tcg_gen_xori_i64
1001 #define tcg_gen_not_tl tcg_gen_not_i64
1002 #define tcg_gen_shl_tl tcg_gen_shl_i64
1003 #define tcg_gen_shli_tl tcg_gen_shli_i64
1004 #define tcg_gen_shr_tl tcg_gen_shr_i64
1005 #define tcg_gen_shri_tl tcg_gen_shri_i64
1006 #define tcg_gen_sar_tl tcg_gen_sar_i64
1007 #define tcg_gen_sari_tl tcg_gen_sari_i64
1008 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1009 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1010 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
1011 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
1012 #define tcg_gen_mul_tl tcg_gen_mul_i64
1013 #define tcg_gen_muli_tl tcg_gen_muli_i64
1014 #define tcg_gen_div_tl tcg_gen_div_i64
1015 #define tcg_gen_rem_tl tcg_gen_rem_i64
1016 #define tcg_gen_divu_tl tcg_gen_divu_i64
1017 #define tcg_gen_remu_tl tcg_gen_remu_i64
1018 #define tcg_gen_discard_tl tcg_gen_discard_i64
1019 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
1020 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1021 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1022 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1023 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1024 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1025 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1026 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1027 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1028 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1029 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1030 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1031 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
1032 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
1033 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
1034 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1035 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1036 #define tcg_gen_andc_tl tcg_gen_andc_i64
1037 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
1038 #define tcg_gen_nand_tl tcg_gen_nand_i64
1039 #define tcg_gen_nor_tl tcg_gen_nor_i64
1040 #define tcg_gen_orc_tl tcg_gen_orc_i64
1041 #define tcg_gen_clz_tl tcg_gen_clz_i64
1042 #define tcg_gen_ctz_tl tcg_gen_ctz_i64
1043 #define tcg_gen_clzi_tl tcg_gen_clzi_i64
1044 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1045 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1046 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1047 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
1048 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
1049 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
1050 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
1051 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
1052 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1053 #define tcg_gen_extract_tl tcg_gen_extract_i64
1054 #define tcg_gen_sextract_tl tcg_gen_sextract_i64
1055 #define tcg_const_tl tcg_const_i64
1056 #define tcg_const_local_tl tcg_const_local_i64
1057 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
1058 #define tcg_gen_add2_tl tcg_gen_add2_i64
1059 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
1060 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1061 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
1062 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1063 #define tcg_gen_smin_tl tcg_gen_smin_i64
1064 #define tcg_gen_umin_tl tcg_gen_umin_i64
1065 #define tcg_gen_smax_tl tcg_gen_smax_i64
1066 #define tcg_gen_umax_tl tcg_gen_umax_i64
1067 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1068 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1069 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1070 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1071 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1072 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1073 #define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i64
1074 #define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i64
1075 #define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i64
1076 #define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i64
1077 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1078 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1079 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1080 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1081 #define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i64
1082 #define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i64
1083 #define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i64
1084 #define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i64
1085 #define tcg_gen_dup_tl_vec tcg_gen_dup_i64_vec
1086 #else
1087 #define tcg_gen_movi_tl tcg_gen_movi_i32
1088 #define tcg_gen_mov_tl tcg_gen_mov_i32
1089 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1090 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1091 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1092 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1093 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1094 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1095 #define tcg_gen_ld_tl tcg_gen_ld_i32
1096 #define tcg_gen_st8_tl tcg_gen_st8_i32
1097 #define tcg_gen_st16_tl tcg_gen_st16_i32
1098 #define tcg_gen_st32_tl tcg_gen_st_i32
1099 #define tcg_gen_st_tl tcg_gen_st_i32
1100 #define tcg_gen_add_tl tcg_gen_add_i32
1101 #define tcg_gen_addi_tl tcg_gen_addi_i32
1102 #define tcg_gen_sub_tl tcg_gen_sub_i32
1103 #define tcg_gen_neg_tl tcg_gen_neg_i32
1104 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
1105 #define tcg_gen_subi_tl tcg_gen_subi_i32
1106 #define tcg_gen_and_tl tcg_gen_and_i32
1107 #define tcg_gen_andi_tl tcg_gen_andi_i32
1108 #define tcg_gen_or_tl tcg_gen_or_i32
1109 #define tcg_gen_ori_tl tcg_gen_ori_i32
1110 #define tcg_gen_xor_tl tcg_gen_xor_i32
1111 #define tcg_gen_xori_tl tcg_gen_xori_i32
1112 #define tcg_gen_not_tl tcg_gen_not_i32
1113 #define tcg_gen_shl_tl tcg_gen_shl_i32
1114 #define tcg_gen_shli_tl tcg_gen_shli_i32
1115 #define tcg_gen_shr_tl tcg_gen_shr_i32
1116 #define tcg_gen_shri_tl tcg_gen_shri_i32
1117 #define tcg_gen_sar_tl tcg_gen_sar_i32
1118 #define tcg_gen_sari_tl tcg_gen_sari_i32
1119 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1120 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1121 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
1122 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1123 #define tcg_gen_mul_tl tcg_gen_mul_i32
1124 #define tcg_gen_muli_tl tcg_gen_muli_i32
1125 #define tcg_gen_div_tl tcg_gen_div_i32
1126 #define tcg_gen_rem_tl tcg_gen_rem_i32
1127 #define tcg_gen_divu_tl tcg_gen_divu_i32
1128 #define tcg_gen_remu_tl tcg_gen_remu_i32
1129 #define tcg_gen_discard_tl tcg_gen_discard_i32
1130 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1131 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1132 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1133 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1134 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1135 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1136 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1137 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1138 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1139 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1140 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1141 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1142 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1143 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1144 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1145 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1146 #define tcg_gen_andc_tl tcg_gen_andc_i32
1147 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1148 #define tcg_gen_nand_tl tcg_gen_nand_i32
1149 #define tcg_gen_nor_tl tcg_gen_nor_i32
1150 #define tcg_gen_orc_tl tcg_gen_orc_i32
1151 #define tcg_gen_clz_tl tcg_gen_clz_i32
1152 #define tcg_gen_ctz_tl tcg_gen_ctz_i32
1153 #define tcg_gen_clzi_tl tcg_gen_clzi_i32
1154 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1155 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1156 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1157 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1158 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1159 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1160 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1161 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
1162 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1163 #define tcg_gen_extract_tl tcg_gen_extract_i32
1164 #define tcg_gen_sextract_tl tcg_gen_sextract_i32
1165 #define tcg_const_tl tcg_const_i32
1166 #define tcg_const_local_tl tcg_const_local_i32
1167 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
1168 #define tcg_gen_add2_tl tcg_gen_add2_i32
1169 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
1170 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1171 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
1172 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1173 #define tcg_gen_smin_tl tcg_gen_smin_i32
1174 #define tcg_gen_umin_tl tcg_gen_umin_i32
1175 #define tcg_gen_smax_tl tcg_gen_smax_i32
1176 #define tcg_gen_umax_tl tcg_gen_umax_i32
1177 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1178 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1179 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1180 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1181 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1182 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1183 #define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i32
1184 #define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i32
1185 #define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i32
1186 #define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i32
1187 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1188 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1189 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1190 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1191 #define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i32
1192 #define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i32
1193 #define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i32
1194 #define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i32
1195 #define tcg_gen_dup_tl_vec tcg_gen_dup_i32_vec
1196 #endif
1198 #if UINTPTR_MAX == UINT32_MAX
1199 # define PTR i32
1200 # define NAT TCGv_i32
1201 #else
1202 # define PTR i64
1203 # define NAT TCGv_i64
1204 #endif
1206 static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1208 glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
1211 static inline void tcg_gen_discard_ptr(TCGv_ptr a)
1213 glue(tcg_gen_discard_,PTR)((NAT)a);
1216 static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
1218 glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
1221 static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
1223 glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
1226 static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
1227 intptr_t b, TCGLabel *label)
1229 glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
1232 static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
1234 #if UINTPTR_MAX == UINT32_MAX
1235 tcg_gen_mov_i32((NAT)r, a);
1236 #else
1237 tcg_gen_ext_i32_i64((NAT)r, a);
1238 #endif
1241 static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
1243 #if UINTPTR_MAX == UINT32_MAX
1244 tcg_gen_extrl_i64_i32((NAT)r, a);
1245 #else
1246 tcg_gen_mov_i64((NAT)r, a);
1247 #endif
1250 static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
1252 #if UINTPTR_MAX == UINT32_MAX
1253 tcg_gen_extu_i32_i64(r, (NAT)a);
1254 #else
1255 tcg_gen_mov_i64(r, (NAT)a);
1256 #endif
1259 static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
1261 #if UINTPTR_MAX == UINT32_MAX
1262 tcg_gen_mov_i32(r, (NAT)a);
1263 #else
1264 tcg_gen_extrl_i64_i32(r, (NAT)a);
1265 #endif
1268 #undef PTR
1269 #undef NAT