2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 #include "exec-memory.h"
39 #include "xtensa_bootparam.h"
41 typedef struct LxBoardDesc
{
43 size_t flash_sector_size
;
47 typedef struct Lx60FpgaState
{
53 static void lx60_fpga_reset(void *opaque
)
55 Lx60FpgaState
*s
= opaque
;
61 static uint64_t lx60_fpga_read(void *opaque
, hwaddr addr
,
64 Lx60FpgaState
*s
= opaque
;
67 case 0x0: /*build date code*/
70 case 0x4: /*processor clock frequency, Hz*/
73 case 0x8: /*LEDs (off = 0, on = 1)*/
76 case 0xc: /*DIP switches (off = 0, on = 1)*/
82 static void lx60_fpga_write(void *opaque
, hwaddr addr
,
83 uint64_t val
, unsigned size
)
85 Lx60FpgaState
*s
= opaque
;
88 case 0x8: /*LEDs (off = 0, on = 1)*/
92 case 0x10: /*board reset*/
94 qemu_system_reset_request();
100 static const MemoryRegionOps lx60_fpga_ops
= {
101 .read
= lx60_fpga_read
,
102 .write
= lx60_fpga_write
,
103 .endianness
= DEVICE_NATIVE_ENDIAN
,
106 static Lx60FpgaState
*lx60_fpga_init(MemoryRegion
*address_space
,
109 Lx60FpgaState
*s
= g_malloc(sizeof(Lx60FpgaState
));
111 memory_region_init_io(&s
->iomem
, &lx60_fpga_ops
, s
,
112 "lx60.fpga", 0x10000);
113 memory_region_add_subregion(address_space
, base
, &s
->iomem
);
115 qemu_register_reset(lx60_fpga_reset
, s
);
119 static void lx60_net_init(MemoryRegion
*address_space
,
123 qemu_irq irq
, NICInfo
*nd
)
129 dev
= qdev_create(NULL
, "open_eth");
130 qdev_set_nic_properties(dev
, nd
);
131 qdev_init_nofail(dev
);
133 s
= sysbus_from_qdev(dev
);
134 sysbus_connect_irq(s
, 0, irq
);
135 memory_region_add_subregion(address_space
, base
,
136 sysbus_mmio_get_region(s
, 0));
137 memory_region_add_subregion(address_space
, descriptors
,
138 sysbus_mmio_get_region(s
, 1));
140 ram
= g_malloc(sizeof(*ram
));
141 memory_region_init_ram(ram
, "open_eth.ram", 16384);
142 vmstate_register_ram_global(ram
);
143 memory_region_add_subregion(address_space
, buffers
, ram
);
146 static uint64_t translate_phys_addr(void *env
, uint64_t addr
)
148 return cpu_get_phys_page_debug(env
, addr
);
151 static void lx60_reset(void *opaque
)
153 XtensaCPU
*cpu
= opaque
;
158 static void lx_init(const LxBoardDesc
*board
, QEMUMachineInitArgs
*args
)
160 #ifdef TARGET_WORDS_BIGENDIAN
165 MemoryRegion
*system_memory
= get_system_memory();
166 XtensaCPU
*cpu
= NULL
;
167 CPUXtensaState
*env
= NULL
;
168 MemoryRegion
*ram
, *rom
, *system_io
;
170 pflash_t
*flash
= NULL
;
171 const char *cpu_model
= args
->cpu_model
;
172 const char *kernel_filename
= args
->kernel_filename
;
173 const char *kernel_cmdline
= args
->kernel_cmdline
;
177 cpu_model
= XTENSA_DEFAULT_CPU_MODEL
;
180 for (n
= 0; n
< smp_cpus
; n
++) {
181 cpu
= cpu_xtensa_init(cpu_model
);
183 fprintf(stderr
, "Unable to find CPU definition\n");
188 env
->sregs
[PRID
] = n
;
189 qemu_register_reset(lx60_reset
, cpu
);
190 /* Need MMU initialized prior to ELF loading,
191 * so that ELF gets loaded into virtual addresses
196 ram
= g_malloc(sizeof(*ram
));
197 memory_region_init_ram(ram
, "lx60.dram", args
->ram_size
);
198 vmstate_register_ram_global(ram
);
199 memory_region_add_subregion(system_memory
, 0, ram
);
201 system_io
= g_malloc(sizeof(*system_io
));
202 memory_region_init(system_io
, "lx60.io", 224 * 1024 * 1024);
203 memory_region_add_subregion(system_memory
, 0xf0000000, system_io
);
204 lx60_fpga_init(system_io
, 0x0d020000);
205 if (nd_table
[0].used
) {
206 lx60_net_init(system_io
, 0x0d030000, 0x0d030400, 0x0d800000,
207 xtensa_get_extint(env
, 1), nd_table
);
210 if (!serial_hds
[0]) {
211 serial_hds
[0] = qemu_chr_new("serial0", "null", NULL
);
214 serial_mm_init(system_io
, 0x0d050020, 2, xtensa_get_extint(env
, 0),
215 115200, serial_hds
[0], DEVICE_NATIVE_ENDIAN
);
217 dinfo
= drive_get(IF_PFLASH
, 0, 0);
219 flash
= pflash_cfi01_register(0xf8000000,
220 NULL
, "lx60.io.flash", board
->flash_size
,
221 dinfo
->bdrv
, board
->flash_sector_size
,
222 board
->flash_size
/ board
->flash_sector_size
,
223 4, 0x0000, 0x0000, 0x0000, 0x0000, be
);
225 fprintf(stderr
, "Unable to mount pflash\n");
230 /* Use presence of kernel file name as 'boot from SRAM' switch. */
231 if (kernel_filename
) {
232 rom
= g_malloc(sizeof(*rom
));
233 memory_region_init_ram(rom
, "lx60.sram", board
->sram_size
);
234 vmstate_register_ram_global(rom
);
235 memory_region_add_subregion(system_memory
, 0xfe000000, rom
);
237 /* Put kernel bootparameters to the end of that SRAM */
238 if (kernel_cmdline
) {
239 size_t cmdline_size
= strlen(kernel_cmdline
) + 1;
240 size_t bp_size
= sizeof(BpTag
[4]) + cmdline_size
;
241 uint32_t tagptr
= (0xfe000000 + board
->sram_size
- bp_size
) & ~0xff;
243 env
->regs
[2] = tagptr
;
245 tagptr
= put_tag(tagptr
, 0x7b0b, 0, NULL
);
246 if (cmdline_size
> 1) {
247 tagptr
= put_tag(tagptr
, 0x1001,
248 cmdline_size
, kernel_cmdline
);
250 tagptr
= put_tag(tagptr
, 0x7e0b, 0, NULL
);
253 uint64_t elf_lowaddr
;
254 int success
= load_elf(kernel_filename
, translate_phys_addr
, env
,
255 &elf_entry
, &elf_lowaddr
, NULL
, be
, ELF_MACHINE
, 0);
261 MemoryRegion
*flash_mr
= pflash_cfi01_get_memory(flash
);
262 MemoryRegion
*flash_io
= g_malloc(sizeof(*flash_io
));
264 memory_region_init_alias(flash_io
, "lx60.flash",
265 flash_mr
, 0, board
->flash_size
);
266 memory_region_add_subregion(system_memory
, 0xfe000000,
272 static void xtensa_lx60_init(QEMUMachineInitArgs
*args
)
274 static const LxBoardDesc lx60_board
= {
275 .flash_size
= 0x400000,
276 .flash_sector_size
= 0x10000,
277 .sram_size
= 0x20000,
279 lx_init(&lx60_board
, args
);
282 static void xtensa_lx200_init(QEMUMachineInitArgs
*args
)
284 static const LxBoardDesc lx200_board
= {
285 .flash_size
= 0x1000000,
286 .flash_sector_size
= 0x20000,
287 .sram_size
= 0x2000000,
289 lx_init(&lx200_board
, args
);
292 static QEMUMachine xtensa_lx60_machine
= {
294 .desc
= "lx60 EVB (" XTENSA_DEFAULT_CPU_MODEL
")",
295 .init
= xtensa_lx60_init
,
299 static QEMUMachine xtensa_lx200_machine
= {
301 .desc
= "lx200 EVB (" XTENSA_DEFAULT_CPU_MODEL
")",
302 .init
= xtensa_lx200_init
,
306 static void xtensa_lx_machines_init(void)
308 qemu_register_machine(&xtensa_lx60_machine
);
309 qemu_register_machine(&xtensa_lx200_machine
);
312 machine_init(xtensa_lx_machines_init
);