qemu-ga: qmp_guest_network_get_interfaces(): get rid of snprintf() + error_set()
[qemu/ar7.git] / hw / arm_boot.c
blob115f58387641ac8a505b111e5d590918d3d4de93
1 /*
2 * ARM kernel loader.
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GPL.
8 */
10 #include "config.h"
11 #include "hw.h"
12 #include "arm-misc.h"
13 #include "sysemu/sysemu.h"
14 #include "boards.h"
15 #include "loader.h"
16 #include "elf.h"
17 #include "sysemu/device_tree.h"
18 #include "qemu/config-file.h"
20 #define KERNEL_ARGS_ADDR 0x100
21 #define KERNEL_LOAD_ADDR 0x00010000
23 /* The worlds second smallest bootloader. Set r0-r2, then jump to kernel. */
24 static uint32_t bootloader[] = {
25 0xe3a00000, /* mov r0, #0 */
26 0xe59f1004, /* ldr r1, [pc, #4] */
27 0xe59f2004, /* ldr r2, [pc, #4] */
28 0xe59ff004, /* ldr pc, [pc, #4] */
29 0, /* Board ID */
30 0, /* Address of kernel args. Set by integratorcp_init. */
31 0 /* Kernel entry point. Set by integratorcp_init. */
34 /* Handling for secondary CPU boot in a multicore system.
35 * Unlike the uniprocessor/primary CPU boot, this is platform
36 * dependent. The default code here is based on the secondary
37 * CPU boot protocol used on realview/vexpress boards, with
38 * some parameterisation to increase its flexibility.
39 * QEMU platform models for which this code is not appropriate
40 * should override write_secondary_boot and secondary_cpu_reset_hook
41 * instead.
43 * This code enables the interrupt controllers for the secondary
44 * CPUs and then puts all the secondary CPUs into a loop waiting
45 * for an interprocessor interrupt and polling a configurable
46 * location for the kernel secondary CPU entry point.
48 #define DSB_INSN 0xf57ff04f
49 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
51 static uint32_t smpboot[] = {
52 0xe59f2028, /* ldr r2, gic_cpu_if */
53 0xe59f0028, /* ldr r0, startaddr */
54 0xe3a01001, /* mov r1, #1 */
55 0xe5821000, /* str r1, [r2] - set GICC_CTLR.Enable */
56 0xe3a010ff, /* mov r1, #0xff */
57 0xe5821004, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
58 DSB_INSN, /* dsb */
59 0xe320f003, /* wfi */
60 0xe5901000, /* ldr r1, [r0] */
61 0xe1110001, /* tst r1, r1 */
62 0x0afffffb, /* beq <wfi> */
63 0xe12fff11, /* bx r1 */
64 0, /* gic_cpu_if: base address of GIC CPU interface */
65 0 /* bootreg: Boot register address is held here */
68 static void default_write_secondary(ARMCPU *cpu,
69 const struct arm_boot_info *info)
71 int n;
72 smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
73 smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
74 for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
75 /* Replace DSB with the pre-v7 DSB if necessary. */
76 if (!arm_feature(&cpu->env, ARM_FEATURE_V7) &&
77 smpboot[n] == DSB_INSN) {
78 smpboot[n] = CP15_DSB_INSN;
80 smpboot[n] = tswap32(smpboot[n]);
82 rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
83 info->smp_loader_start);
86 static void default_reset_secondary(ARMCPU *cpu,
87 const struct arm_boot_info *info)
89 CPUARMState *env = &cpu->env;
91 stl_phys_notdirty(info->smp_bootreg_addr, 0);
92 env->regs[15] = info->smp_loader_start;
95 #define WRITE_WORD(p, value) do { \
96 stl_phys_notdirty(p, value); \
97 p += 4; \
98 } while (0)
100 static void set_kernel_args(const struct arm_boot_info *info)
102 int initrd_size = info->initrd_size;
103 hwaddr base = info->loader_start;
104 hwaddr p;
106 p = base + KERNEL_ARGS_ADDR;
107 /* ATAG_CORE */
108 WRITE_WORD(p, 5);
109 WRITE_WORD(p, 0x54410001);
110 WRITE_WORD(p, 1);
111 WRITE_WORD(p, 0x1000);
112 WRITE_WORD(p, 0);
113 /* ATAG_MEM */
114 /* TODO: handle multiple chips on one ATAG list */
115 WRITE_WORD(p, 4);
116 WRITE_WORD(p, 0x54410002);
117 WRITE_WORD(p, info->ram_size);
118 WRITE_WORD(p, info->loader_start);
119 if (initrd_size) {
120 /* ATAG_INITRD2 */
121 WRITE_WORD(p, 4);
122 WRITE_WORD(p, 0x54420005);
123 WRITE_WORD(p, info->initrd_start);
124 WRITE_WORD(p, initrd_size);
126 if (info->kernel_cmdline && *info->kernel_cmdline) {
127 /* ATAG_CMDLINE */
128 int cmdline_size;
130 cmdline_size = strlen(info->kernel_cmdline);
131 cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
132 cmdline_size + 1);
133 cmdline_size = (cmdline_size >> 2) + 1;
134 WRITE_WORD(p, cmdline_size + 2);
135 WRITE_WORD(p, 0x54410009);
136 p += cmdline_size * 4;
138 if (info->atag_board) {
139 /* ATAG_BOARD */
140 int atag_board_len;
141 uint8_t atag_board_buf[0x1000];
143 atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
144 WRITE_WORD(p, (atag_board_len + 8) >> 2);
145 WRITE_WORD(p, 0x414f4d50);
146 cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
147 p += atag_board_len;
149 /* ATAG_END */
150 WRITE_WORD(p, 0);
151 WRITE_WORD(p, 0);
154 static void set_kernel_args_old(const struct arm_boot_info *info)
156 hwaddr p;
157 const char *s;
158 int initrd_size = info->initrd_size;
159 hwaddr base = info->loader_start;
161 /* see linux/include/asm-arm/setup.h */
162 p = base + KERNEL_ARGS_ADDR;
163 /* page_size */
164 WRITE_WORD(p, 4096);
165 /* nr_pages */
166 WRITE_WORD(p, info->ram_size / 4096);
167 /* ramdisk_size */
168 WRITE_WORD(p, 0);
169 #define FLAG_READONLY 1
170 #define FLAG_RDLOAD 4
171 #define FLAG_RDPROMPT 8
172 /* flags */
173 WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
174 /* rootdev */
175 WRITE_WORD(p, (31 << 8) | 0); /* /dev/mtdblock0 */
176 /* video_num_cols */
177 WRITE_WORD(p, 0);
178 /* video_num_rows */
179 WRITE_WORD(p, 0);
180 /* video_x */
181 WRITE_WORD(p, 0);
182 /* video_y */
183 WRITE_WORD(p, 0);
184 /* memc_control_reg */
185 WRITE_WORD(p, 0);
186 /* unsigned char sounddefault */
187 /* unsigned char adfsdrives */
188 /* unsigned char bytes_per_char_h */
189 /* unsigned char bytes_per_char_v */
190 WRITE_WORD(p, 0);
191 /* pages_in_bank[4] */
192 WRITE_WORD(p, 0);
193 WRITE_WORD(p, 0);
194 WRITE_WORD(p, 0);
195 WRITE_WORD(p, 0);
196 /* pages_in_vram */
197 WRITE_WORD(p, 0);
198 /* initrd_start */
199 if (initrd_size) {
200 WRITE_WORD(p, info->initrd_start);
201 } else {
202 WRITE_WORD(p, 0);
204 /* initrd_size */
205 WRITE_WORD(p, initrd_size);
206 /* rd_start */
207 WRITE_WORD(p, 0);
208 /* system_rev */
209 WRITE_WORD(p, 0);
210 /* system_serial_low */
211 WRITE_WORD(p, 0);
212 /* system_serial_high */
213 WRITE_WORD(p, 0);
214 /* mem_fclk_21285 */
215 WRITE_WORD(p, 0);
216 /* zero unused fields */
217 while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
218 WRITE_WORD(p, 0);
220 s = info->kernel_cmdline;
221 if (s) {
222 cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
223 } else {
224 WRITE_WORD(p, 0);
228 static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo)
230 #ifdef CONFIG_FDT
231 uint32_t *mem_reg_property;
232 uint32_t mem_reg_propsize;
233 void *fdt = NULL;
234 char *filename;
235 int size, rc;
236 uint32_t acells, scells, hival;
238 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
239 if (!filename) {
240 fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
241 return -1;
244 fdt = load_device_tree(filename, &size);
245 if (!fdt) {
246 fprintf(stderr, "Couldn't open dtb file %s\n", filename);
247 g_free(filename);
248 return -1;
250 g_free(filename);
252 acells = qemu_devtree_getprop_cell(fdt, "/", "#address-cells");
253 scells = qemu_devtree_getprop_cell(fdt, "/", "#size-cells");
254 if (acells == 0 || scells == 0) {
255 fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
256 return -1;
259 mem_reg_propsize = acells + scells;
260 mem_reg_property = g_new0(uint32_t, mem_reg_propsize);
261 mem_reg_property[acells - 1] = cpu_to_be32(binfo->loader_start);
262 hival = cpu_to_be32(binfo->loader_start >> 32);
263 if (acells > 1) {
264 mem_reg_property[acells - 2] = hival;
265 } else if (hival != 0) {
266 fprintf(stderr, "qemu: dtb file not compatible with "
267 "RAM start address > 4GB\n");
268 exit(1);
270 mem_reg_property[acells + scells - 1] = cpu_to_be32(binfo->ram_size);
271 hival = cpu_to_be32(binfo->ram_size >> 32);
272 if (scells > 1) {
273 mem_reg_property[acells + scells - 2] = hival;
274 } else if (hival != 0) {
275 fprintf(stderr, "qemu: dtb file not compatible with "
276 "RAM size > 4GB\n");
277 exit(1);
280 rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
281 mem_reg_propsize * sizeof(uint32_t));
282 if (rc < 0) {
283 fprintf(stderr, "couldn't set /memory/reg\n");
286 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
287 rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
288 binfo->kernel_cmdline);
289 if (rc < 0) {
290 fprintf(stderr, "couldn't set /chosen/bootargs\n");
294 if (binfo->initrd_size) {
295 rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
296 binfo->initrd_start);
297 if (rc < 0) {
298 fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
301 rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
302 binfo->initrd_start + binfo->initrd_size);
303 if (rc < 0) {
304 fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
308 cpu_physical_memory_write(addr, fdt, size);
310 return 0;
312 #else
313 fprintf(stderr, "Device tree requested, "
314 "but qemu was compiled without fdt support\n");
315 return -1;
316 #endif
319 static void do_cpu_reset(void *opaque)
321 ARMCPU *cpu = opaque;
322 CPUARMState *env = &cpu->env;
323 const struct arm_boot_info *info = env->boot_info;
325 cpu_reset(CPU(cpu));
326 if (info) {
327 if (!info->is_linux) {
328 /* Jump to the entry point. */
329 env->regs[15] = info->entry & 0xfffffffe;
330 env->thumb = info->entry & 1;
331 } else {
332 if (env == first_cpu) {
333 env->regs[15] = info->loader_start;
334 if (!info->dtb_filename) {
335 if (old_param) {
336 set_kernel_args_old(info);
337 } else {
338 set_kernel_args(info);
341 } else {
342 info->secondary_cpu_reset_hook(cpu, info);
348 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
350 CPUARMState *env = &cpu->env;
351 int kernel_size;
352 int initrd_size;
353 int n;
354 int is_linux = 0;
355 uint64_t elf_entry;
356 hwaddr entry;
357 int big_endian;
358 QemuOpts *machine_opts;
360 /* Load the kernel. */
361 if (!info->kernel_filename) {
362 fprintf(stderr, "Kernel image must be specified\n");
363 exit(1);
366 machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
367 if (machine_opts) {
368 info->dtb_filename = qemu_opt_get(machine_opts, "dtb");
369 } else {
370 info->dtb_filename = NULL;
373 if (!info->secondary_cpu_reset_hook) {
374 info->secondary_cpu_reset_hook = default_reset_secondary;
376 if (!info->write_secondary_boot) {
377 info->write_secondary_boot = default_write_secondary;
380 if (info->nb_cpus == 0)
381 info->nb_cpus = 1;
383 #ifdef TARGET_WORDS_BIGENDIAN
384 big_endian = 1;
385 #else
386 big_endian = 0;
387 #endif
389 /* We want to put the initrd far enough into RAM that when the
390 * kernel is uncompressed it will not clobber the initrd. However
391 * on boards without much RAM we must ensure that we still leave
392 * enough room for a decent sized initrd, and on boards with large
393 * amounts of RAM we must avoid the initrd being so far up in RAM
394 * that it is outside lowmem and inaccessible to the kernel.
395 * So for boards with less than 256MB of RAM we put the initrd
396 * halfway into RAM, and for boards with 256MB of RAM or more we put
397 * the initrd at 128MB.
399 info->initrd_start = info->loader_start +
400 MIN(info->ram_size / 2, 128 * 1024 * 1024);
402 /* Assume that raw images are linux kernels, and ELF images are not. */
403 kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
404 NULL, NULL, big_endian, ELF_MACHINE, 1);
405 entry = elf_entry;
406 if (kernel_size < 0) {
407 kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
408 &is_linux);
410 if (kernel_size < 0) {
411 entry = info->loader_start + KERNEL_LOAD_ADDR;
412 kernel_size = load_image_targphys(info->kernel_filename, entry,
413 info->ram_size - KERNEL_LOAD_ADDR);
414 is_linux = 1;
416 if (kernel_size < 0) {
417 fprintf(stderr, "qemu: could not load kernel '%s'\n",
418 info->kernel_filename);
419 exit(1);
421 info->entry = entry;
422 if (is_linux) {
423 if (info->initrd_filename) {
424 initrd_size = load_image_targphys(info->initrd_filename,
425 info->initrd_start,
426 info->ram_size -
427 info->initrd_start);
428 if (initrd_size < 0) {
429 fprintf(stderr, "qemu: could not load initrd '%s'\n",
430 info->initrd_filename);
431 exit(1);
433 } else {
434 initrd_size = 0;
436 info->initrd_size = initrd_size;
438 bootloader[4] = info->board_id;
440 /* for device tree boot, we pass the DTB directly in r2. Otherwise
441 * we point to the kernel args.
443 if (info->dtb_filename) {
444 /* Place the DTB after the initrd in memory */
445 hwaddr dtb_start = TARGET_PAGE_ALIGN(info->initrd_start +
446 initrd_size);
447 if (load_dtb(dtb_start, info)) {
448 exit(1);
450 bootloader[5] = dtb_start;
451 } else {
452 bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
453 if (info->ram_size >= (1ULL << 32)) {
454 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
455 " Linux kernel using ATAGS (try passing a device tree"
456 " using -dtb)\n");
457 exit(1);
460 bootloader[6] = entry;
461 for (n = 0; n < sizeof(bootloader) / 4; n++) {
462 bootloader[n] = tswap32(bootloader[n]);
464 rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
465 info->loader_start);
466 if (info->nb_cpus > 1) {
467 info->write_secondary_boot(cpu, info);
470 info->is_linux = is_linux;
472 for (; env; env = env->next_cpu) {
473 cpu = arm_env_get_cpu(env);
474 env->boot_info = info;
475 qemu_register_reset(do_cpu_reset, cpu);