hw/ide/microdrive.c

   1 /*
   2  * QEMU IDE Emulation: microdrive (CF / PCMCIA)
   3  *
   4  * Copyright (c) 2003 Fabrice Bellard
   5  * Copyright (c) 2006 Openedhand Ltd.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "hw/pcmcia.h"
  28 #include "migration/vmstate.h"
  29 #include "qapi/error.h"
  30 #include "qemu/module.h"
  31 #include "sysemu/dma.h"
  32
  33 #include "hw/ide/internal.h"
  34 #include "qom/object.h"
  35
  36 #define TYPE_MICRODRIVE "microdrive"
  37 typedef struct MicroDriveState MicroDriveState;
  38 DECLARE_INSTANCE_CHECKER(MicroDriveState, MICRODRIVE,
  39                          TYPE_MICRODRIVE)
  40
  41 /***********************************************************/
  42 /* CF-ATA Microdrive */
  43
  44 #define METADATA_SIZE   0x20
  45
  46 /* DSCM-1XXXX Microdrive hard disk with CF+ II / PCMCIA interface.  */
  47
  48 struct MicroDriveState {
  49     /*< private >*/
  50     PCMCIACardState parent_obj;
  51     /*< public >*/
  52
  53     IDEBus bus;
  54     uint32_t attr_base;
  55     uint32_t io_base;
  56
  57     /* Card state */
  58     uint8_t opt;
  59     uint8_t stat;
  60     uint8_t pins;
  61
  62     uint8_t ctrl;
  63     uint16_t io;
  64     uint8_t cycle;
  65 };
  66
  67 /* Register bitfields */
  68 enum md_opt {
  69     OPT_MODE_MMAP       = 0,
  70     OPT_MODE_IOMAP16    = 1,
  71     OPT_MODE_IOMAP1     = 2,
  72     OPT_MODE_IOMAP2     = 3,
  73     OPT_MODE            = 0x3f,
  74     OPT_LEVIREQ         = 0x40,
  75     OPT_SRESET          = 0x80,
  76 };
  77 enum md_cstat {
  78     STAT_INT            = 0x02,
  79     STAT_PWRDWN         = 0x04,
  80     STAT_XE             = 0x10,
  81     STAT_IOIS8          = 0x20,
  82     STAT_SIGCHG         = 0x40,
  83     STAT_CHANGED        = 0x80,
  84 };
  85 enum md_pins {
  86     PINS_MRDY           = 0x02,
  87     PINS_CRDY           = 0x20,
  88 };
  89 enum md_ctrl {
  90     CTRL_IEN            = 0x02,
  91     CTRL_SRST           = 0x04,
  92 };
  93
  94 static inline void md_interrupt_update(MicroDriveState *s)
  95 {
  96     PCMCIACardState *card = PCMCIA_CARD(s);
  97
  98     if (card->slot == NULL) {
  99         return;
 100     }
 101
 102     qemu_set_irq(card->slot->irq,
 103                     !(s->stat & STAT_INT) &&    /* Inverted */
 104                     !(s->ctrl & (CTRL_IEN | CTRL_SRST)) &&
 105                     !(s->opt & OPT_SRESET));
 106 }
 107
 108 static void md_set_irq(void *opaque, int irq, int level)
 109 {
 110     MicroDriveState *s = opaque;
 111
 112     if (level) {
 113         s->stat |= STAT_INT;
 114     } else {
 115         s->stat &= ~STAT_INT;
 116     }
 117
 118     md_interrupt_update(s);
 119 }
 120
 121 static void md_reset(DeviceState *dev)
 122 {
 123     MicroDriveState *s = MICRODRIVE(dev);
 124
 125     s->opt = OPT_MODE_MMAP;
 126     s->stat = 0;
 127     s->pins = 0;
 128     s->cycle = 0;
 129     s->ctrl = 0;
 130     ide_bus_reset(&s->bus);
 131 }
 132
 133 static uint8_t md_attr_read(PCMCIACardState *card, uint32_t at)
 134 {
 135     MicroDriveState *s = MICRODRIVE(card);
 136     PCMCIACardClass *pcc = PCMCIA_CARD_GET_CLASS(card);
 137
 138     if (at < s->attr_base) {
 139         if (at < pcc->cis_len) {
 140             return pcc->cis[at];
 141         } else {
 142             return 0x00;
 143         }
 144     }
 145
 146     at -= s->attr_base;
 147
 148     switch (at) {
 149     case 0x00:  /* Configuration Option Register */
 150         return s->opt;
 151     case 0x02:  /* Card Configuration Status Register */
 152         if (s->ctrl & CTRL_IEN) {
 153             return s->stat & ~STAT_INT;
 154         } else {
 155             return s->stat;
 156         }
 157     case 0x04:  /* Pin Replacement Register */
 158         return (s->pins & PINS_CRDY) | 0x0c;
 159     case 0x06:  /* Socket and Copy Register */
 160         return 0x00;
 161 #ifdef VERBOSE
 162     default:
 163         printf("%s: Bad attribute space register %02x\n", __func__, at);
 164 #endif
 165     }
 166
 167     return 0;
 168 }
 169
 170 static void md_attr_write(PCMCIACardState *card, uint32_t at, uint8_t value)
 171 {
 172     MicroDriveState *s = MICRODRIVE(card);
 173
 174     at -= s->attr_base;
 175
 176     switch (at) {
 177     case 0x00:  /* Configuration Option Register */
 178         s->opt = value & 0xcf;
 179         if (value & OPT_SRESET) {
 180             device_legacy_reset(DEVICE(s));
 181         }
 182         md_interrupt_update(s);
 183         break;
 184     case 0x02:  /* Card Configuration Status Register */
 185         if ((s->stat ^ value) & STAT_PWRDWN) {
 186             s->pins |= PINS_CRDY;
 187         }
 188         s->stat &= 0x82;
 189         s->stat |= value & 0x74;
 190         md_interrupt_update(s);
 191         /* Word 170 in Identify Device must be equal to STAT_XE */
 192         break;
 193     case 0x04:  /* Pin Replacement Register */
 194         s->pins &= PINS_CRDY;
 195         s->pins |= value & PINS_MRDY;
 196         break;
 197     case 0x06:  /* Socket and Copy Register */
 198         break;
 199     default:
 200         printf("%s: Bad attribute space register %02x\n", __func__, at);
 201     }
 202 }
 203
 204 static uint16_t md_common_read(PCMCIACardState *card, uint32_t at)
 205 {
 206     MicroDriveState *s = MICRODRIVE(card);
 207     IDEState *ifs;
 208     uint16_t ret;
 209     at -= s->io_base;
 210
 211     switch (s->opt & OPT_MODE) {
 212     case OPT_MODE_MMAP:
 213         if ((at & ~0x3ff) == 0x400) {
 214             at = 0;
 215         }
 216         break;
 217     case OPT_MODE_IOMAP16:
 218         at &= 0xf;
 219         break;
 220     case OPT_MODE_IOMAP1:
 221         if ((at & ~0xf) == 0x3f0) {
 222             at -= 0x3e8;
 223         } else if ((at & ~0xf) == 0x1f0) {
 224             at -= 0x1f0;
 225         }
 226         break;
 227     case OPT_MODE_IOMAP2:
 228         if ((at & ~0xf) == 0x370) {
 229             at -= 0x368;
 230         } else if ((at & ~0xf) == 0x170) {
 231             at -= 0x170;
 232         }
 233     }
 234
 235     switch (at) {
 236     case 0x0:   /* Even RD Data */
 237     case 0x8:
 238         return ide_data_readw(&s->bus, 0);
 239
 240         /* TODO: 8-bit accesses */
 241         if (s->cycle) {
 242             ret = s->io >> 8;
 243         } else {
 244             s->io = ide_data_readw(&s->bus, 0);
 245             ret = s->io & 0xff;
 246         }
 247         s->cycle = !s->cycle;
 248         return ret;
 249     case 0x9:   /* Odd RD Data */
 250         return s->io >> 8;
 251     case 0xd:   /* Error */
 252         return ide_ioport_read(&s->bus, 0x1);
 253     case 0xe:   /* Alternate Status */
 254         ifs = idebus_active_if(&s->bus);
 255         if (ifs->blk) {
 256             return ifs->status;
 257         } else {
 258             return 0;
 259         }
 260     case 0xf:   /* Device Address */
 261         ifs = idebus_active_if(&s->bus);
 262         return 0xc2 | ((~ifs->select << 2) & 0x3c);
 263     default:
 264         return ide_ioport_read(&s->bus, at);
 265     }
 266
 267     return 0;
 268 }
 269
 270 static void md_common_write(PCMCIACardState *card, uint32_t at, uint16_t value)
 271 {
 272     MicroDriveState *s = MICRODRIVE(card);
 273     at -= s->io_base;
 274
 275     switch (s->opt & OPT_MODE) {
 276     case OPT_MODE_MMAP:
 277         if ((at & ~0x3ff) == 0x400) {
 278             at = 0;
 279         }
 280         break;
 281     case OPT_MODE_IOMAP16:
 282         at &= 0xf;
 283         break;
 284     case OPT_MODE_IOMAP1:
 285         if ((at & ~0xf) == 0x3f0) {
 286             at -= 0x3e8;
 287         } else if ((at & ~0xf) == 0x1f0) {
 288             at -= 0x1f0;
 289         }
 290         break;
 291     case OPT_MODE_IOMAP2:
 292         if ((at & ~0xf) == 0x370) {
 293             at -= 0x368;
 294         } else if ((at & ~0xf) == 0x170) {
 295             at -= 0x170;
 296         }
 297     }
 298
 299     switch (at) {
 300     case 0x0:   /* Even WR Data */
 301     case 0x8:
 302         ide_data_writew(&s->bus, 0, value);
 303         break;
 304
 305         /* TODO: 8-bit accesses */
 306         if (s->cycle) {
 307             ide_data_writew(&s->bus, 0, s->io | (value << 8));
 308         } else {
 309             s->io = value & 0xff;
 310         }
 311         s->cycle = !s->cycle;
 312         break;
 313     case 0x9:
 314         s->io = value & 0xff;
 315         s->cycle = !s->cycle;
 316         break;
 317     case 0xd:   /* Features */
 318         ide_ioport_write(&s->bus, 0x1, value);
 319         break;
 320     case 0xe:   /* Device Control */
 321         s->ctrl = value;
 322         if (value & CTRL_SRST) {
 323             device_legacy_reset(DEVICE(s));
 324         }
 325         md_interrupt_update(s);
 326         break;
 327     default:
 328         if (s->stat & STAT_PWRDWN) {
 329             s->pins |= PINS_CRDY;
 330             s->stat &= ~STAT_PWRDWN;
 331         }
 332         ide_ioport_write(&s->bus, at, value);
 333     }
 334 }
 335
 336 static const VMStateDescription vmstate_microdrive = {
 337     .name = "microdrive",
 338     .version_id = 3,
 339     .minimum_version_id = 0,
 340     .fields = (VMStateField[]) {
 341         VMSTATE_UINT8(opt, MicroDriveState),
 342         VMSTATE_UINT8(stat, MicroDriveState),
 343         VMSTATE_UINT8(pins, MicroDriveState),
 344         VMSTATE_UINT8(ctrl, MicroDriveState),
 345         VMSTATE_UINT16(io, MicroDriveState),
 346         VMSTATE_UINT8(cycle, MicroDriveState),
 347         VMSTATE_IDE_BUS(bus, MicroDriveState),
 348         VMSTATE_IDE_DRIVES(bus.ifs, MicroDriveState),
 349         VMSTATE_END_OF_LIST()
 350     }
 351 };
 352
 353 static const uint8_t dscm1xxxx_cis[0x14a] = {
 354     [0x000] = CISTPL_DEVICE,    /* 5V Device Information */
 355     [0x002] = 0x03,             /* Tuple length = 4 bytes */
 356     [0x004] = 0xdb,             /* ID: DTYPE_FUNCSPEC, non WP, DSPEED_150NS */
 357     [0x006] = 0x01,             /* Size = 2K bytes */
 358     [0x008] = CISTPL_ENDMARK,
 359
 360     [0x00a] = CISTPL_DEVICE_OC, /* Additional Device Information */
 361     [0x00c] = 0x04,             /* Tuple length = 4 byest */
 362     [0x00e] = 0x03,             /* Conditions: Ext = 0, Vcc 3.3V, MWAIT = 1 */
 363     [0x010] = 0xdb,             /* ID: DTYPE_FUNCSPEC, non WP, DSPEED_150NS */
 364     [0x012] = 0x01,             /* Size = 2K bytes */
 365     [0x014] = CISTPL_ENDMARK,
 366
 367     [0x016] = CISTPL_JEDEC_C,   /* JEDEC ID */
 368     [0x018] = 0x02,             /* Tuple length = 2 bytes */
 369     [0x01a] = 0xdf,             /* PC Card ATA with no Vpp required */
 370     [0x01c] = 0x01,
 371
 372     [0x01e] = CISTPL_MANFID,    /* Manufacture ID */
 373     [0x020] = 0x04,             /* Tuple length = 4 bytes */
 374     [0x022] = 0xa4,             /* TPLMID_MANF = 00a4 (IBM) */
 375     [0x024] = 0x00,
 376     [0x026] = 0x00,             /* PLMID_CARD = 0000 */
 377     [0x028] = 0x00,
 378
 379     [0x02a] = CISTPL_VERS_1,    /* Level 1 Version */
 380     [0x02c] = 0x12,             /* Tuple length = 23 bytes */
 381     [0x02e] = 0x04,             /* Major Version = JEIDA 4.2 / PCMCIA 2.1 */
 382     [0x030] = 0x01,             /* Minor Version = 1 */
 383     [0x032] = 'I',
 384     [0x034] = 'B',
 385     [0x036] = 'M',
 386     [0x038] = 0x00,
 387     [0x03a] = 'm',
 388     [0x03c] = 'i',
 389     [0x03e] = 'c',
 390     [0x040] = 'r',
 391     [0x042] = 'o',
 392     [0x044] = 'd',
 393     [0x046] = 'r',
 394     [0x048] = 'i',
 395     [0x04a] = 'v',
 396     [0x04c] = 'e',
 397     [0x04e] = 0x00,
 398     [0x050] = CISTPL_ENDMARK,
 399
 400     [0x052] = CISTPL_FUNCID,    /* Function ID */
 401     [0x054] = 0x02,             /* Tuple length = 2 bytes */
 402     [0x056] = 0x04,             /* TPLFID_FUNCTION = Fixed Disk */
 403     [0x058] = 0x01,             /* TPLFID_SYSINIT: POST = 1, ROM = 0 */
 404
 405     [0x05a] = CISTPL_FUNCE,     /* Function Extension */
 406     [0x05c] = 0x02,             /* Tuple length = 2 bytes */
 407     [0x05e] = 0x01,             /* TPLFE_TYPE = Disk Device Interface */
 408     [0x060] = 0x01,             /* TPLFE_DATA = PC Card ATA Interface */
 409
 410     [0x062] = CISTPL_FUNCE,     /* Function Extension */
 411     [0x064] = 0x03,             /* Tuple length = 3 bytes */
 412     [0x066] = 0x02,             /* TPLFE_TYPE = Basic PC Card ATA Interface */
 413     [0x068] = 0x08,             /* TPLFE_DATA: Rotating, Unique, Single */
 414     [0x06a] = 0x0f,             /* TPLFE_DATA: Sleep, Standby, Idle, Auto */
 415
 416     [0x06c] = CISTPL_CONFIG,    /* Configuration */
 417     [0x06e] = 0x05,             /* Tuple length = 5 bytes */
 418     [0x070] = 0x01,             /* TPCC_RASZ = 2 bytes, TPCC_RMSZ = 1 byte */
 419     [0x072] = 0x07,             /* TPCC_LAST = 7 */
 420     [0x074] = 0x00,             /* TPCC_RADR = 0200 */
 421     [0x076] = 0x02,
 422     [0x078] = 0x0f,             /* TPCC_RMSK = 200, 202, 204, 206 */
 423
 424     [0x07a] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 425     [0x07c] = 0x0b,             /* Tuple length = 11 bytes */
 426     [0x07e] = 0xc0,             /* TPCE_INDX = Memory Mode, Default, Iface */
 427     [0x080] = 0xc0,             /* TPCE_IF = Memory, no BVDs, no WP, READY */
 428     [0x082] = 0xa1,             /* TPCE_FS = Vcc only, no I/O, Memory, Misc */
 429     [0x084] = 0x27,             /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
 430     [0x086] = 0x55,             /* NomV: 5.0 V */
 431     [0x088] = 0x4d,             /* MinV: 4.5 V */
 432     [0x08a] = 0x5d,             /* MaxV: 5.5 V */
 433     [0x08c] = 0x4e,             /* Peakl: 450 mA */
 434     [0x08e] = 0x08,             /* TPCE_MS = 1 window, 1 byte, Host address */
 435     [0x090] = 0x00,             /* Window descriptor: Window length = 0 */
 436     [0x092] = 0x20,             /* TPCE_MI: support power down mode, RW */
 437
 438     [0x094] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 439     [0x096] = 0x06,             /* Tuple length = 6 bytes */
 440     [0x098] = 0x00,             /* TPCE_INDX = Memory Mode, no Default */
 441     [0x09a] = 0x01,             /* TPCE_FS = Vcc only, no I/O, no Memory */
 442     [0x09c] = 0x21,             /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
 443     [0x09e] = 0xb5,             /* NomV: 3.3 V */
 444     [0x0a0] = 0x1e,
 445     [0x0a2] = 0x3e,             /* Peakl: 350 mA */
 446
 447     [0x0a4] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 448     [0x0a6] = 0x0d,             /* Tuple length = 13 bytes */
 449     [0x0a8] = 0xc1,             /* TPCE_INDX = I/O and Memory Mode, Default */
 450     [0x0aa] = 0x41,             /* TPCE_IF = I/O and Memory, no BVD, no WP */
 451     [0x0ac] = 0x99,             /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
 452     [0x0ae] = 0x27,             /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
 453     [0x0b0] = 0x55,             /* NomV: 5.0 V */
 454     [0x0b2] = 0x4d,             /* MinV: 4.5 V */
 455     [0x0b4] = 0x5d,             /* MaxV: 5.5 V */
 456     [0x0b6] = 0x4e,             /* Peakl: 450 mA */
 457     [0x0b8] = 0x64,             /* TPCE_IO = 16-byte boundary, 16/8 accesses */
 458     [0x0ba] = 0xf0,             /* TPCE_IR =  MASK, Level, Pulse, Share */
 459     [0x0bc] = 0xff,             /* IRQ0..IRQ7 supported */
 460     [0x0be] = 0xff,             /* IRQ8..IRQ15 supported */
 461     [0x0c0] = 0x20,             /* TPCE_MI = support power down mode */
 462
 463     [0x0c2] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 464     [0x0c4] = 0x06,             /* Tuple length = 6 bytes */
 465     [0x0c6] = 0x01,             /* TPCE_INDX = I/O and Memory Mode */
 466     [0x0c8] = 0x01,             /* TPCE_FS = Vcc only, no I/O, no Memory */
 467     [0x0ca] = 0x21,             /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
 468     [0x0cc] = 0xb5,             /* NomV: 3.3 V */
 469     [0x0ce] = 0x1e,
 470     [0x0d0] = 0x3e,             /* Peakl: 350 mA */
 471
 472     [0x0d2] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 473     [0x0d4] = 0x12,             /* Tuple length = 18 bytes */
 474     [0x0d6] = 0xc2,             /* TPCE_INDX = I/O Primary Mode */
 475     [0x0d8] = 0x41,             /* TPCE_IF = I/O and Memory, no BVD, no WP */
 476     [0x0da] = 0x99,             /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
 477     [0x0dc] = 0x27,             /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
 478     [0x0de] = 0x55,             /* NomV: 5.0 V */
 479     [0x0e0] = 0x4d,             /* MinV: 4.5 V */
 480     [0x0e2] = 0x5d,             /* MaxV: 5.5 V */
 481     [0x0e4] = 0x4e,             /* Peakl: 450 mA */
 482     [0x0e6] = 0xea,             /* TPCE_IO = 1K boundary, 16/8 access, Range */
 483     [0x0e8] = 0x61,             /* Range: 2 fields, 2 bytes addr, 1 byte len */
 484     [0x0ea] = 0xf0,             /* Field 1 address = 0x01f0 */
 485     [0x0ec] = 0x01,
 486     [0x0ee] = 0x07,             /* Address block length = 8 */
 487     [0x0f0] = 0xf6,             /* Field 2 address = 0x03f6 */
 488     [0x0f2] = 0x03,
 489     [0x0f4] = 0x01,             /* Address block length = 2 */
 490     [0x0f6] = 0xee,             /* TPCE_IR = IRQ E, Level, Pulse, Share */
 491     [0x0f8] = 0x20,             /* TPCE_MI = support power down mode */
 492
 493     [0x0fa] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 494     [0x0fc] = 0x06,             /* Tuple length = 6 bytes */
 495     [0x0fe] = 0x02,             /* TPCE_INDX = I/O Primary Mode, no Default */
 496     [0x100] = 0x01,             /* TPCE_FS = Vcc only, no I/O, no Memory */
 497     [0x102] = 0x21,             /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
 498     [0x104] = 0xb5,             /* NomV: 3.3 V */
 499     [0x106] = 0x1e,
 500     [0x108] = 0x3e,             /* Peakl: 350 mA */
 501
 502     [0x10a] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 503     [0x10c] = 0x12,             /* Tuple length = 18 bytes */
 504     [0x10e] = 0xc3,             /* TPCE_INDX = I/O Secondary Mode, Default */
 505     [0x110] = 0x41,             /* TPCE_IF = I/O and Memory, no BVD, no WP */
 506     [0x112] = 0x99,             /* TPCE_FS = Vcc only, I/O, Interrupt, Misc */
 507     [0x114] = 0x27,             /* NomV = 1, MinV = 1, MaxV = 1, Peakl = 1 */
 508     [0x116] = 0x55,             /* NomV: 5.0 V */
 509     [0x118] = 0x4d,             /* MinV: 4.5 V */
 510     [0x11a] = 0x5d,             /* MaxV: 5.5 V */
 511     [0x11c] = 0x4e,             /* Peakl: 450 mA */
 512     [0x11e] = 0xea,             /* TPCE_IO = 1K boundary, 16/8 access, Range */
 513     [0x120] = 0x61,             /* Range: 2 fields, 2 byte addr, 1 byte len */
 514     [0x122] = 0x70,             /* Field 1 address = 0x0170 */
 515     [0x124] = 0x01,
 516     [0x126] = 0x07,             /* Address block length = 8 */
 517     [0x128] = 0x76,             /* Field 2 address = 0x0376 */
 518     [0x12a] = 0x03,
 519     [0x12c] = 0x01,             /* Address block length = 2 */
 520     [0x12e] = 0xee,             /* TPCE_IR = IRQ E, Level, Pulse, Share */
 521     [0x130] = 0x20,             /* TPCE_MI = support power down mode */
 522
 523     [0x132] = CISTPL_CFTABLE_ENTRY,     /* 16-bit PC Card Configuration */
 524     [0x134] = 0x06,             /* Tuple length = 6 bytes */
 525     [0x136] = 0x03,             /* TPCE_INDX = I/O Secondary Mode */
 526     [0x138] = 0x01,             /* TPCE_FS = Vcc only, no I/O, no Memory */
 527     [0x13a] = 0x21,             /* NomV = 1, MinV = 0, MaxV = 0, Peakl = 1 */
 528     [0x13c] = 0xb5,             /* NomV: 3.3 V */
 529     [0x13e] = 0x1e,
 530     [0x140] = 0x3e,             /* Peakl: 350 mA */
 531
 532     [0x142] = CISTPL_NO_LINK,   /* No Link */
 533     [0x144] = 0x00,             /* Tuple length = 0 bytes */
 534
 535     [0x146] = CISTPL_END,       /* Tuple End */
 536 };
 537
 538 #define TYPE_DSCM1XXXX "dscm1xxxx"
 539
 540 static int dscm1xxxx_attach(PCMCIACardState *card)
 541 {
 542     MicroDriveState *md = MICRODRIVE(card);
 543     PCMCIACardClass *pcc = PCMCIA_CARD_GET_CLASS(card);
 544
 545     md->attr_base = pcc->cis[0x74] | (pcc->cis[0x76] << 8);
 546     md->io_base = 0x0;
 547
 548     device_legacy_reset(DEVICE(md));
 549     md_interrupt_update(md);
 550
 551     return 0;
 552 }
 553
 554 static int dscm1xxxx_detach(PCMCIACardState *card)
 555 {
 556     MicroDriveState *md = MICRODRIVE(card);
 557
 558     device_legacy_reset(DEVICE(md));
 559     return 0;
 560 }
 561
 562 PCMCIACardState *dscm1xxxx_init(DriveInfo *dinfo)
 563 {
 564     MicroDriveState *md;
 565
 566     md = MICRODRIVE(object_new(TYPE_DSCM1XXXX));
 567     qdev_realize(DEVICE(md), NULL, &error_fatal);
 568
 569     if (dinfo != NULL) {
 570         ide_create_drive(&md->bus, 0, dinfo);
 571     }
 572     md->bus.ifs[0].drive_kind = IDE_CFATA;
 573     md->bus.ifs[0].mdata_size = METADATA_SIZE;
 574     md->bus.ifs[0].mdata_storage = g_malloc0(METADATA_SIZE);
 575
 576     return PCMCIA_CARD(md);
 577 }
 578
 579 static void dscm1xxxx_class_init(ObjectClass *oc, void *data)
 580 {
 581     PCMCIACardClass *pcc = PCMCIA_CARD_CLASS(oc);
 582     DeviceClass *dc = DEVICE_CLASS(oc);
 583
 584     pcc->cis = dscm1xxxx_cis;
 585     pcc->cis_len = sizeof(dscm1xxxx_cis);
 586
 587     pcc->attach = dscm1xxxx_attach;
 588     pcc->detach = dscm1xxxx_detach;
 589     /* Reason: Needs to be wired-up in code, see dscm1xxxx_init() */
 590     dc->user_creatable = false;
 591 }
 592
 593 static const TypeInfo dscm1xxxx_type_info = {
 594     .name = TYPE_DSCM1XXXX,
 595     .parent = TYPE_MICRODRIVE,
 596     .class_init = dscm1xxxx_class_init,
 597 };
 598
 599 static void microdrive_realize(DeviceState *dev, Error **errp)
 600 {
 601     MicroDriveState *md = MICRODRIVE(dev);
 602
 603     ide_init2(&md->bus, qemu_allocate_irq(md_set_irq, md, 0));
 604 }
 605
 606 static void microdrive_init(Object *obj)
 607 {
 608     MicroDriveState *md = MICRODRIVE(obj);
 609
 610     ide_bus_new(&md->bus, sizeof(md->bus), DEVICE(obj), 0, 1);
 611 }
 612
 613 static void microdrive_class_init(ObjectClass *oc, void *data)
 614 {
 615     DeviceClass *dc = DEVICE_CLASS(oc);
 616     PCMCIACardClass *pcc = PCMCIA_CARD_CLASS(oc);
 617
 618     pcc->attr_read = md_attr_read;
 619     pcc->attr_write = md_attr_write;
 620     pcc->common_read = md_common_read;
 621     pcc->common_write = md_common_write;
 622     pcc->io_read = md_common_read;
 623     pcc->io_write = md_common_write;
 624
 625     dc->realize = microdrive_realize;
 626     dc->reset = md_reset;
 627     dc->vmsd = &vmstate_microdrive;
 628 }
 629
 630 static const TypeInfo microdrive_type_info = {
 631     .name = TYPE_MICRODRIVE,
 632     .parent = TYPE_PCMCIA_CARD,
 633     .instance_size = sizeof(MicroDriveState),
 634     .instance_init = microdrive_init,
 635     .abstract = true,
 636     .class_init = microdrive_class_init,
 637 };
 638
 639 static void microdrive_register_types(void)
 640 {
 641     type_register_static(&microdrive_type_info);
 642     type_register_static(&dscm1xxxx_type_info);
 643 }
 644
 645 type_init(microdrive_register_types)