target/riscv: vector integer divide instructions
[qemu/ar7.git] / default-configs / riscv32-softmmu.mak
blob94a236c9c25b23ae1c28aeb49a554f546cb4d35c
1 # Default configuration for riscv32-softmmu
3 # Uncomment the following lines to disable these optional devices:
5 #CONFIG_PCI_DEVICES=n
7 # Boards:
9 CONFIG_SPIKE=y
10 CONFIG_SIFIVE_E=y
11 CONFIG_SIFIVE_U=y
12 CONFIG_RISCV_VIRT=y
13 CONFIG_OPENTITAN=y