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target/riscv: vector integer divide instructions
[qemu/ar7.git]
/
default-configs
/
riscv32-softmmu.mak
blob
94a236c9c25b23ae1c28aeb49a554f546cb4d35c
1
# Default configuration for riscv32-softmmu
2
3
# Uncomment the following lines to disable these optional devices:
4
#
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#CONFIG_PCI_DEVICES=n
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# Boards:
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#
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CONFIG_SPIKE
=
y
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CONFIG_SIFIVE_E
=
y
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CONFIG_SIFIVE_U
=
y
12
CONFIG_RISCV_VIRT
=
y
13
CONFIG_OPENTITAN
=
y