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tests: cris: remove check_time1
[qemu/ar7.git] / memory.c
blob1a1baf574cb47915c9deb4d059c32bba02b32b90
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qapi/error.h"
18 #include "qemu-common.h"
19 #include "cpu.h"
20 #include "exec/memory.h"
21 #include "exec/address-spaces.h"
22 #include "exec/ioport.h"
23 #include "qapi/visitor.h"
24 #include "qemu/bitops.h"
25 #include "qemu/error-report.h"
26 #include "qom/object.h"
27 #include "trace.h"
28
29 #include "exec/memory-internal.h"
30 #include "exec/ram_addr.h"
31 #include "sysemu/kvm.h"
32 #include "sysemu/sysemu.h"
33
34 //#define DEBUG_UNASSIGNED
35
36 static unsigned memory_region_transaction_depth;
37 static bool memory_region_update_pending;
38 static bool ioeventfd_update_pending;
39 static bool global_dirty_log = false;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 typedef struct AddrRange AddrRange;
48
49 /*
50 * Note that signed integers are needed for negative offsetting in aliases
51 * (large MemoryRegion::alias_offset).
52 */
53 struct AddrRange {
54 Int128 start;
55 Int128 size;
56 };
57
58 static AddrRange addrrange_make(Int128 start, Int128 size)
59 {
60 return (AddrRange) { start, size };
61 }
62
63 static bool addrrange_equal(AddrRange r1, AddrRange r2)
64 {
65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
66 }
67
68 static Int128 addrrange_end(AddrRange r)
69 {
70 return int128_add(r.start, r.size);
71 }
72
73 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
74 {
75 int128_addto(&range.start, delta);
76 return range;
77 }
78
79 static bool addrrange_contains(AddrRange range, Int128 addr)
80 {
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83 }
84
85 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86 {
87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
89 }
90
91 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92 {
93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
96 }
97
98 enum ListenerDirection { Forward, Reverse };
99
100 static bool memory_listener_match(MemoryListener *listener,
101 MemoryRegionSection *section)
102 {
103 return !listener->address_space_filter
104 || listener->address_space_filter == section->address_space;
105 }
106
107 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
108 do { \
109 MemoryListener *_listener; \
110 \
111 switch (_direction) { \
112 case Forward: \
113 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
117 } \
118 break; \
119 case Reverse: \
120 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
121 memory_listeners, link) { \
122 if (_listener->_callback) { \
123 _listener->_callback(_listener, ##_args); \
124 } \
125 } \
126 break; \
127 default: \
128 abort(); \
129 } \
130 } while (0)
131
132 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
133 do { \
134 MemoryListener *_listener; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 case Reverse: \
146 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
147 memory_listeners, link) { \
148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 default: \
155 abort(); \
156 } \
157 } while (0)
158
159 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
160 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
161 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
162 .mr = (fr)->mr, \
163 .address_space = (as), \
164 .offset_within_region = (fr)->offset_in_region, \
165 .size = (fr)->addr.size, \
166 .offset_within_address_space = int128_get64((fr)->addr.start), \
167 .readonly = (fr)->readonly, \
168 }), ##_args)
169
170 struct CoalescedMemoryRange {
171 AddrRange addr;
172 QTAILQ_ENTRY(CoalescedMemoryRange) link;
173 };
174
175 struct MemoryRegionIoeventfd {
176 AddrRange addr;
177 bool match_data;
178 uint64_t data;
179 EventNotifier *e;
180 };
181
182 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
183 MemoryRegionIoeventfd b)
184 {
185 if (int128_lt(a.addr.start, b.addr.start)) {
186 return true;
187 } else if (int128_gt(a.addr.start, b.addr.start)) {
188 return false;
189 } else if (int128_lt(a.addr.size, b.addr.size)) {
190 return true;
191 } else if (int128_gt(a.addr.size, b.addr.size)) {
192 return false;
193 } else if (a.match_data < b.match_data) {
194 return true;
195 } else if (a.match_data > b.match_data) {
196 return false;
197 } else if (a.match_data) {
198 if (a.data < b.data) {
199 return true;
200 } else if (a.data > b.data) {
201 return false;
202 }
203 }
204 if (a.e < b.e) {
205 return true;
206 } else if (a.e > b.e) {
207 return false;
208 }
209 return false;
210 }
211
212 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
213 MemoryRegionIoeventfd b)
214 {
215 return !memory_region_ioeventfd_before(a, b)
216 && !memory_region_ioeventfd_before(b, a);
217 }
218
219 typedef struct FlatRange FlatRange;
220 typedef struct FlatView FlatView;
221
222 /* Range of memory in the global map. Addresses are absolute. */
223 struct FlatRange {
224 MemoryRegion *mr;
225 hwaddr offset_in_region;
226 AddrRange addr;
227 uint8_t dirty_log_mask;
228 bool romd_mode;
229 bool readonly;
230 };
231
232 /* Flattened global view of current active memory hierarchy. Kept in sorted
233 * order.
234 */
235 struct FlatView {
236 struct rcu_head rcu;
237 unsigned ref;
238 FlatRange *ranges;
239 unsigned nr;
240 unsigned nr_allocated;
241 };
242
243 typedef struct AddressSpaceOps AddressSpaceOps;
244
245 #define FOR_EACH_FLAT_RANGE(var, view) \
246 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
247
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly;
255 }
256
257 static void flatview_init(FlatView *view)
258 {
259 view->ref = 1;
260 view->ranges = NULL;
261 view->nr = 0;
262 view->nr_allocated = 0;
263 }
264
265 /* Insert a range into a given position. Caller is responsible for maintaining
266 * sorting order.
267 */
268 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
269 {
270 if (view->nr == view->nr_allocated) {
271 view->nr_allocated = MAX(2 * view->nr, 10);
272 view->ranges = g_realloc(view->ranges,
273 view->nr_allocated * sizeof(*view->ranges));
274 }
275 memmove(view->ranges + pos + 1, view->ranges + pos,
276 (view->nr - pos) * sizeof(FlatRange));
277 view->ranges[pos] = *range;
278 memory_region_ref(range->mr);
279 ++view->nr;
280 }
281
282 static void flatview_destroy(FlatView *view)
283 {
284 int i;
285
286 for (i = 0; i < view->nr; i++) {
287 memory_region_unref(view->ranges[i].mr);
288 }
289 g_free(view->ranges);
290 g_free(view);
291 }
292
293 static void flatview_ref(FlatView *view)
294 {
295 atomic_inc(&view->ref);
296 }
297
298 static void flatview_unref(FlatView *view)
299 {
300 if (atomic_fetch_dec(&view->ref) == 1) {
301 flatview_destroy(view);
302 }
303 }
304
305 static bool can_merge(FlatRange *r1, FlatRange *r2)
306 {
307 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
308 && r1->mr == r2->mr
309 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
310 r1->addr.size),
311 int128_make64(r2->offset_in_region))
312 && r1->dirty_log_mask == r2->dirty_log_mask
313 && r1->romd_mode == r2->romd_mode
314 && r1->readonly == r2->readonly;
315 }
316
317 /* Attempt to simplify a view by merging adjacent ranges */
318 static void flatview_simplify(FlatView *view)
319 {
320 unsigned i, j;
321
322 i = 0;
323 while (i < view->nr) {
324 j = i + 1;
325 while (j < view->nr
326 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
327 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
328 ++j;
329 }
330 ++i;
331 memmove(&view->ranges[i], &view->ranges[j],
332 (view->nr - j) * sizeof(view->ranges[j]));
333 view->nr -= j - i;
334 }
335 }
336
337 static bool memory_region_big_endian(MemoryRegion *mr)
338 {
339 #ifdef TARGET_WORDS_BIGENDIAN
340 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
341 #else
342 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
343 #endif
344 }
345
346 static bool memory_region_wrong_endianness(MemoryRegion *mr)
347 {
348 #ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
350 #else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352 #endif
353 }
354
355 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
356 {
357 if (memory_region_wrong_endianness(mr)) {
358 switch (size) {
359 case 1:
360 break;
361 case 2:
362 *data = bswap16(*data);
363 break;
364 case 4:
365 *data = bswap32(*data);
366 break;
367 case 8:
368 *data = bswap64(*data);
369 break;
370 default:
371 abort();
372 }
373 }
374 }
375
376 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
377 {
378 MemoryRegion *root;
379 hwaddr abs_addr = offset;
380
381 abs_addr += mr->addr;
382 for (root = mr; root->container; ) {
383 root = root->container;
384 abs_addr += root->addr;
385 }
386
387 return abs_addr;
388 }
389
390 static int get_cpu_index(void)
391 {
392 if (current_cpu) {
393 return current_cpu->cpu_index;
394 }
395 return -1;
396 }
397
398 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask,
404 MemTxAttrs attrs)
405 {
406 uint64_t tmp;
407
408 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
409 if (mr->subpage) {
410 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
411 } else if (mr == &io_mem_notdirty) {
412 /* Accesses to code which has previously been translated into a TB show
413 * up in the MMIO path, as accesses to the io_mem_notdirty
414 * MemoryRegion. */
415 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
416 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
417 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
418 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
419 }
420 *value |= (tmp & mask) << shift;
421 return MEMTX_OK;
422 }
423
424 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = mr->ops->read(mr->opaque, addr, size);
435 if (mr->subpage) {
436 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
437 } else if (mr == &io_mem_notdirty) {
438 /* Accesses to code which has previously been translated into a TB show
439 * up in the MMIO path, as accesses to the io_mem_notdirty
440 * MemoryRegion. */
441 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
442 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
443 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
444 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
445 }
446 *value |= (tmp & mask) << shift;
447 return MEMTX_OK;
448 }
449
450 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
451 hwaddr addr,
452 uint64_t *value,
453 unsigned size,
454 unsigned shift,
455 uint64_t mask,
456 MemTxAttrs attrs)
457 {
458 uint64_t tmp = 0;
459 MemTxResult r;
460
461 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
462 if (mr->subpage) {
463 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
464 } else if (mr == &io_mem_notdirty) {
465 /* Accesses to code which has previously been translated into a TB show
466 * up in the MMIO path, as accesses to the io_mem_notdirty
467 * MemoryRegion. */
468 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
469 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
470 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
471 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
472 }
473 *value |= (tmp & mask) << shift;
474 return r;
475 }
476
477 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
478 hwaddr addr,
479 uint64_t *value,
480 unsigned size,
481 unsigned shift,
482 uint64_t mask,
483 MemTxAttrs attrs)
484 {
485 uint64_t tmp;
486
487 tmp = (*value >> shift) & mask;
488 if (mr->subpage) {
489 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
490 } else if (mr == &io_mem_notdirty) {
491 /* Accesses to code which has previously been translated into a TB show
492 * up in the MMIO path, as accesses to the io_mem_notdirty
493 * MemoryRegion. */
494 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
495 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
496 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
497 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
498 }
499 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
500 return MEMTX_OK;
501 }
502
503 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
504 hwaddr addr,
505 uint64_t *value,
506 unsigned size,
507 unsigned shift,
508 uint64_t mask,
509 MemTxAttrs attrs)
510 {
511 uint64_t tmp;
512
513 tmp = (*value >> shift) & mask;
514 if (mr->subpage) {
515 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
516 } else if (mr == &io_mem_notdirty) {
517 /* Accesses to code which has previously been translated into a TB show
518 * up in the MMIO path, as accesses to the io_mem_notdirty
519 * MemoryRegion. */
520 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
521 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
522 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
523 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
524 }
525 mr->ops->write(mr->opaque, addr, tmp, size);
526 return MEMTX_OK;
527 }
528
529 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
530 hwaddr addr,
531 uint64_t *value,
532 unsigned size,
533 unsigned shift,
534 uint64_t mask,
535 MemTxAttrs attrs)
536 {
537 uint64_t tmp;
538
539 tmp = (*value >> shift) & mask;
540 if (mr->subpage) {
541 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
542 } else if (mr == &io_mem_notdirty) {
543 /* Accesses to code which has previously been translated into a TB show
544 * up in the MMIO path, as accesses to the io_mem_notdirty
545 * MemoryRegion. */
546 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
547 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
548 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
549 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
550 }
551 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
552 }
553
554 static MemTxResult access_with_adjusted_size(hwaddr addr,
555 uint64_t *value,
556 unsigned size,
557 unsigned access_size_min,
558 unsigned access_size_max,
559 MemTxResult (*access)(MemoryRegion *mr,
560 hwaddr addr,
561 uint64_t *value,
562 unsigned size,
563 unsigned shift,
564 uint64_t mask,
565 MemTxAttrs attrs),
566 MemoryRegion *mr,
567 MemTxAttrs attrs)
568 {
569 uint64_t access_mask;
570 unsigned access_size;
571 unsigned i;
572 MemTxResult r = MEMTX_OK;
573
574 if (!access_size_min) {
575 access_size_min = 1;
576 }
577 if (!access_size_max) {
578 access_size_max = 4;
579 }
580
581 /* FIXME: support unaligned access? */
582 access_size = MAX(MIN(size, access_size_max), access_size_min);
583 access_mask = -1ULL >> (64 - access_size * 8);
584 if (memory_region_big_endian(mr)) {
585 for (i = 0; i < size; i += access_size) {
586 r |= access(mr, addr + i, value, access_size,
587 (size - access_size - i) * 8, access_mask, attrs);
588 }
589 } else {
590 for (i = 0; i < size; i += access_size) {
591 r |= access(mr, addr + i, value, access_size, i * 8,
592 access_mask, attrs);
593 }
594 }
595 return r;
596 }
597
598 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
599 {
600 AddressSpace *as;
601
602 while (mr->container) {
603 mr = mr->container;
604 }
605 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
606 if (mr == as->root) {
607 return as;
608 }
609 }
610 return NULL;
611 }
612
613 /* Render a memory region into the global view. Ranges in @view obscure
614 * ranges in @mr.
615 */
616 static void render_memory_region(FlatView *view,
617 MemoryRegion *mr,
618 Int128 base,
619 AddrRange clip,
620 bool readonly)
621 {
622 MemoryRegion *subregion;
623 unsigned i;
624 hwaddr offset_in_region;
625 Int128 remain;
626 Int128 now;
627 FlatRange fr;
628 AddrRange tmp;
629
630 if (!mr->enabled) {
631 return;
632 }
633
634 int128_addto(&base, int128_make64(mr->addr));
635 readonly |= mr->readonly;
636
637 tmp = addrrange_make(base, mr->size);
638
639 if (!addrrange_intersects(tmp, clip)) {
640 return;
641 }
642
643 clip = addrrange_intersection(tmp, clip);
644
645 if (mr->alias) {
646 int128_subfrom(&base, int128_make64(mr->alias->addr));
647 int128_subfrom(&base, int128_make64(mr->alias_offset));
648 render_memory_region(view, mr->alias, base, clip, readonly);
649 return;
650 }
651
652 /* Render subregions in priority order. */
653 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
654 render_memory_region(view, subregion, base, clip, readonly);
655 }
656
657 if (!mr->terminates) {
658 return;
659 }
660
661 offset_in_region = int128_get64(int128_sub(clip.start, base));
662 base = clip.start;
663 remain = clip.size;
664
665 fr.mr = mr;
666 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
667 fr.romd_mode = mr->romd_mode;
668 fr.readonly = readonly;
669
670 /* Render the region itself into any gaps left by the current view. */
671 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
672 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
673 continue;
674 }
675 if (int128_lt(base, view->ranges[i].addr.start)) {
676 now = int128_min(remain,
677 int128_sub(view->ranges[i].addr.start, base));
678 fr.offset_in_region = offset_in_region;
679 fr.addr = addrrange_make(base, now);
680 flatview_insert(view, i, &fr);
681 ++i;
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
685 }
686 now = int128_sub(int128_min(int128_add(base, remain),
687 addrrange_end(view->ranges[i].addr)),
688 base);
689 int128_addto(&base, now);
690 offset_in_region += int128_get64(now);
691 int128_subfrom(&remain, now);
692 }
693 if (int128_nz(remain)) {
694 fr.offset_in_region = offset_in_region;
695 fr.addr = addrrange_make(base, remain);
696 flatview_insert(view, i, &fr);
697 }
698 }
699
700 /* Render a memory topology into a list of disjoint absolute ranges. */
701 static FlatView *generate_memory_topology(MemoryRegion *mr)
702 {
703 FlatView *view;
704
705 view = g_new(FlatView, 1);
706 flatview_init(view);
707
708 if (mr) {
709 render_memory_region(view, mr, int128_zero(),
710 addrrange_make(int128_zero(), int128_2_64()), false);
711 }
712 flatview_simplify(view);
713
714 return view;
715 }
716
717 static void address_space_add_del_ioeventfds(AddressSpace *as,
718 MemoryRegionIoeventfd *fds_new,
719 unsigned fds_new_nb,
720 MemoryRegionIoeventfd *fds_old,
721 unsigned fds_old_nb)
722 {
723 unsigned iold, inew;
724 MemoryRegionIoeventfd *fd;
725 MemoryRegionSection section;
726
727 /* Generate a symmetric difference of the old and new fd sets, adding
728 * and deleting as necessary.
729 */
730
731 iold = inew = 0;
732 while (iold < fds_old_nb || inew < fds_new_nb) {
733 if (iold < fds_old_nb
734 && (inew == fds_new_nb
735 || memory_region_ioeventfd_before(fds_old[iold],
736 fds_new[inew]))) {
737 fd = &fds_old[iold];
738 section = (MemoryRegionSection) {
739 .address_space = as,
740 .offset_within_address_space = int128_get64(fd->addr.start),
741 .size = fd->addr.size,
742 };
743 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
744 fd->match_data, fd->data, fd->e);
745 ++iold;
746 } else if (inew < fds_new_nb
747 && (iold == fds_old_nb
748 || memory_region_ioeventfd_before(fds_new[inew],
749 fds_old[iold]))) {
750 fd = &fds_new[inew];
751 section = (MemoryRegionSection) {
752 .address_space = as,
753 .offset_within_address_space = int128_get64(fd->addr.start),
754 .size = fd->addr.size,
755 };
756 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
757 fd->match_data, fd->data, fd->e);
758 ++inew;
759 } else {
760 ++iold;
761 ++inew;
762 }
763 }
764 }
765
766 static FlatView *address_space_get_flatview(AddressSpace *as)
767 {
768 FlatView *view;
769
770 rcu_read_lock();
771 view = atomic_rcu_read(&as->current_map);
772 flatview_ref(view);
773 rcu_read_unlock();
774 return view;
775 }
776
777 static void address_space_update_ioeventfds(AddressSpace *as)
778 {
779 FlatView *view;
780 FlatRange *fr;
781 unsigned ioeventfd_nb = 0;
782 MemoryRegionIoeventfd *ioeventfds = NULL;
783 AddrRange tmp;
784 unsigned i;
785
786 view = address_space_get_flatview(as);
787 FOR_EACH_FLAT_RANGE(fr, view) {
788 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
789 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
790 int128_sub(fr->addr.start,
791 int128_make64(fr->offset_in_region)));
792 if (addrrange_intersects(fr->addr, tmp)) {
793 ++ioeventfd_nb;
794 ioeventfds = g_realloc(ioeventfds,
795 ioeventfd_nb * sizeof(*ioeventfds));
796 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
797 ioeventfds[ioeventfd_nb-1].addr = tmp;
798 }
799 }
800 }
801
802 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
803 as->ioeventfds, as->ioeventfd_nb);
804
805 g_free(as->ioeventfds);
806 as->ioeventfds = ioeventfds;
807 as->ioeventfd_nb = ioeventfd_nb;
808 flatview_unref(view);
809 }
810
811 static void address_space_update_topology_pass(AddressSpace *as,
812 const FlatView *old_view,
813 const FlatView *new_view,
814 bool adding)
815 {
816 unsigned iold, inew;
817 FlatRange *frold, *frnew;
818
819 /* Generate a symmetric difference of the old and new memory maps.
820 * Kill ranges in the old map, and instantiate ranges in the new map.
821 */
822 iold = inew = 0;
823 while (iold < old_view->nr || inew < new_view->nr) {
824 if (iold < old_view->nr) {
825 frold = &old_view->ranges[iold];
826 } else {
827 frold = NULL;
828 }
829 if (inew < new_view->nr) {
830 frnew = &new_view->ranges[inew];
831 } else {
832 frnew = NULL;
833 }
834
835 if (frold
836 && (!frnew
837 || int128_lt(frold->addr.start, frnew->addr.start)
838 || (int128_eq(frold->addr.start, frnew->addr.start)
839 && !flatrange_equal(frold, frnew)))) {
840 /* In old but not in new, or in both but attributes changed. */
841
842 if (!adding) {
843 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
844 }
845
846 ++iold;
847 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
848 /* In both and unchanged (except logging may have changed) */
849
850 if (adding) {
851 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
852 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
854 frold->dirty_log_mask,
855 frnew->dirty_log_mask);
856 }
857 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
858 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
859 frold->dirty_log_mask,
860 frnew->dirty_log_mask);
861 }
862 }
863
864 ++iold;
865 ++inew;
866 } else {
867 /* In new */
868
869 if (adding) {
870 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
871 }
872
873 ++inew;
874 }
875 }
876 }
877
878
879 static void address_space_update_topology(AddressSpace *as)
880 {
881 FlatView *old_view = address_space_get_flatview(as);
882 FlatView *new_view = generate_memory_topology(as->root);
883
884 address_space_update_topology_pass(as, old_view, new_view, false);
885 address_space_update_topology_pass(as, old_view, new_view, true);
886
887 /* Writes are protected by the BQL. */
888 atomic_rcu_set(&as->current_map, new_view);
889 call_rcu(old_view, flatview_unref, rcu);
890
891 /* Note that all the old MemoryRegions are still alive up to this
892 * point. This relieves most MemoryListeners from the need to
893 * ref/unref the MemoryRegions they get---unless they use them
894 * outside the iothread mutex, in which case precise reference
895 * counting is necessary.
896 */
897 flatview_unref(old_view);
898
899 address_space_update_ioeventfds(as);
900 }
901
902 void memory_region_transaction_begin(void)
903 {
904 qemu_flush_coalesced_mmio_buffer();
905 ++memory_region_transaction_depth;
906 }
907
908 static void memory_region_clear_pending(void)
909 {
910 memory_region_update_pending = false;
911 ioeventfd_update_pending = false;
912 }
913
914 void memory_region_transaction_commit(void)
915 {
916 AddressSpace *as;
917
918 assert(memory_region_transaction_depth);
919 --memory_region_transaction_depth;
920 if (!memory_region_transaction_depth) {
921 if (memory_region_update_pending) {
922 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
923
924 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
925 address_space_update_topology(as);
926 }
927
928 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
929 } else if (ioeventfd_update_pending) {
930 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
931 address_space_update_ioeventfds(as);
932 }
933 }
934 memory_region_clear_pending();
935 }
936 }
937
938 static void memory_region_destructor_none(MemoryRegion *mr)
939 {
940 }
941
942 static void memory_region_destructor_ram(MemoryRegion *mr)
943 {
944 qemu_ram_free(mr->ram_block);
945 }
946
947 static bool memory_region_need_escape(char c)
948 {
949 return c == '/' || c == '[' || c == '\\' || c == ']';
950 }
951
952 static char *memory_region_escape_name(const char *name)
953 {
954 const char *p;
955 char *escaped, *q;
956 uint8_t c;
957 size_t bytes = 0;
958
959 for (p = name; *p; p++) {
960 bytes += memory_region_need_escape(*p) ? 4 : 1;
961 }
962 if (bytes == p - name) {
963 return g_memdup(name, bytes + 1);
964 }
965
966 escaped = g_malloc(bytes + 1);
967 for (p = name, q = escaped; *p; p++) {
968 c = *p;
969 if (unlikely(memory_region_need_escape(c))) {
970 *q++ = '\\';
971 *q++ = 'x';
972 *q++ = "0123456789abcdef"[c >> 4];
973 c = "0123456789abcdef"[c & 15];
974 }
975 *q++ = c;
976 }
977 *q = 0;
978 return escaped;
979 }
980
981 void memory_region_init(MemoryRegion *mr,
982 Object *owner,
983 const char *name,
984 uint64_t size)
985 {
986 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
987 mr->size = int128_make64(size);
988 if (size == UINT64_MAX) {
989 mr->size = int128_2_64();
990 }
991 mr->name = g_strdup(name);
992 mr->owner = owner;
993 mr->ram_block = NULL;
994
995 if (name) {
996 char *escaped_name = memory_region_escape_name(name);
997 char *name_array = g_strdup_printf("%s[*]", escaped_name);
998
999 if (!owner) {
1000 owner = container_get(qdev_get_machine(), "/unattached");
1001 }
1002
1003 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
1004 object_unref(OBJECT(mr));
1005 g_free(name_array);
1006 g_free(escaped_name);
1007 }
1008 }
1009
1010 static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1011 void *opaque, Error **errp)
1012 {
1013 MemoryRegion *mr = MEMORY_REGION(obj);
1014 uint64_t value = mr->addr;
1015
1016 visit_type_uint64(v, name, &value, errp);
1017 }
1018
1019 static void memory_region_get_container(Object *obj, Visitor *v,
1020 const char *name, void *opaque,
1021 Error **errp)
1022 {
1023 MemoryRegion *mr = MEMORY_REGION(obj);
1024 gchar *path = (gchar *)"";
1025
1026 if (mr->container) {
1027 path = object_get_canonical_path(OBJECT(mr->container));
1028 }
1029 visit_type_str(v, name, &path, errp);
1030 if (mr->container) {
1031 g_free(path);
1032 }
1033 }
1034
1035 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1036 const char *part)
1037 {
1038 MemoryRegion *mr = MEMORY_REGION(obj);
1039
1040 return OBJECT(mr->container);
1041 }
1042
1043 static void memory_region_get_priority(Object *obj, Visitor *v,
1044 const char *name, void *opaque,
1045 Error **errp)
1046 {
1047 MemoryRegion *mr = MEMORY_REGION(obj);
1048 int32_t value = mr->priority;
1049
1050 visit_type_int32(v, name, &value, errp);
1051 }
1052
1053 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1054 void *opaque, Error **errp)
1055 {
1056 MemoryRegion *mr = MEMORY_REGION(obj);
1057 uint64_t value = memory_region_size(mr);
1058
1059 visit_type_uint64(v, name, &value, errp);
1060 }
1061
1062 static void memory_region_initfn(Object *obj)
1063 {
1064 MemoryRegion *mr = MEMORY_REGION(obj);
1065 ObjectProperty *op;
1066
1067 mr->ops = &unassigned_mem_ops;
1068 mr->enabled = true;
1069 mr->romd_mode = true;
1070 mr->global_locking = true;
1071 mr->destructor = memory_region_destructor_none;
1072 QTAILQ_INIT(&mr->subregions);
1073 QTAILQ_INIT(&mr->coalesced);
1074
1075 op = object_property_add(OBJECT(mr), "container",
1076 "link<" TYPE_MEMORY_REGION ">",
1077 memory_region_get_container,
1078 NULL, /* memory_region_set_container */
1079 NULL, NULL, &error_abort);
1080 op->resolve = memory_region_resolve_container;
1081
1082 object_property_add(OBJECT(mr), "addr", "uint64",
1083 memory_region_get_addr,
1084 NULL, /* memory_region_set_addr */
1085 NULL, NULL, &error_abort);
1086 object_property_add(OBJECT(mr), "priority", "uint32",
1087 memory_region_get_priority,
1088 NULL, /* memory_region_set_priority */
1089 NULL, NULL, &error_abort);
1090 object_property_add(OBJECT(mr), "size", "uint64",
1091 memory_region_get_size,
1092 NULL, /* memory_region_set_size, */
1093 NULL, NULL, &error_abort);
1094 }
1095
1096 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1097 unsigned size)
1098 {
1099 #ifdef DEBUG_UNASSIGNED
1100 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1101 #endif
1102 if (current_cpu != NULL) {
1103 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1104 }
1105 return 0;
1106 }
1107
1108 static void unassigned_mem_write(void *opaque, hwaddr addr,
1109 uint64_t val, unsigned size)
1110 {
1111 #ifdef DEBUG_UNASSIGNED
1112 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1113 #endif
1114 if (current_cpu != NULL) {
1115 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1116 }
1117 }
1118
1119 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1120 unsigned size, bool is_write)
1121 {
1122 return false;
1123 }
1124
1125 const MemoryRegionOps unassigned_mem_ops = {
1126 .valid.accepts = unassigned_mem_accepts,
1127 .endianness = DEVICE_NATIVE_ENDIAN,
1128 };
1129
1130 bool memory_region_access_valid(MemoryRegion *mr,
1131 hwaddr addr,
1132 unsigned size,
1133 bool is_write)
1134 {
1135 int access_size_min, access_size_max;
1136 int access_size, i;
1137
1138 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1139 return false;
1140 }
1141
1142 if (!mr->ops->valid.accepts) {
1143 return true;
1144 }
1145
1146 access_size_min = mr->ops->valid.min_access_size;
1147 if (!mr->ops->valid.min_access_size) {
1148 access_size_min = 1;
1149 }
1150
1151 access_size_max = mr->ops->valid.max_access_size;
1152 if (!mr->ops->valid.max_access_size) {
1153 access_size_max = 4;
1154 }
1155
1156 access_size = MAX(MIN(size, access_size_max), access_size_min);
1157 for (i = 0; i < size; i += access_size) {
1158 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1159 is_write)) {
1160 return false;
1161 }
1162 }
1163
1164 return true;
1165 }
1166
1167 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1168 hwaddr addr,
1169 uint64_t *pval,
1170 unsigned size,
1171 MemTxAttrs attrs)
1172 {
1173 *pval = 0;
1174
1175 if (mr->ops->read) {
1176 return access_with_adjusted_size(addr, pval, size,
1177 mr->ops->impl.min_access_size,
1178 mr->ops->impl.max_access_size,
1179 memory_region_read_accessor,
1180 mr, attrs);
1181 } else if (mr->ops->read_with_attrs) {
1182 return access_with_adjusted_size(addr, pval, size,
1183 mr->ops->impl.min_access_size,
1184 mr->ops->impl.max_access_size,
1185 memory_region_read_with_attrs_accessor,
1186 mr, attrs);
1187 } else {
1188 return access_with_adjusted_size(addr, pval, size, 1, 4,
1189 memory_region_oldmmio_read_accessor,
1190 mr, attrs);
1191 }
1192 }
1193
1194 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1195 hwaddr addr,
1196 uint64_t *pval,
1197 unsigned size,
1198 MemTxAttrs attrs)
1199 {
1200 MemTxResult r;
1201
1202 if (!memory_region_access_valid(mr, addr, size, false)) {
1203 *pval = unassigned_mem_read(mr, addr, size);
1204 return MEMTX_DECODE_ERROR;
1205 }
1206
1207 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1208 adjust_endianness(mr, pval, size);
1209 return r;
1210 }
1211
1212 /* Return true if an eventfd was signalled */
1213 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1214 hwaddr addr,
1215 uint64_t data,
1216 unsigned size,
1217 MemTxAttrs attrs)
1218 {
1219 MemoryRegionIoeventfd ioeventfd = {
1220 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1221 .data = data,
1222 };
1223 unsigned i;
1224
1225 for (i = 0; i < mr->ioeventfd_nb; i++) {
1226 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1227 ioeventfd.e = mr->ioeventfds[i].e;
1228
1229 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1230 event_notifier_set(ioeventfd.e);
1231 return true;
1232 }
1233 }
1234
1235 return false;
1236 }
1237
1238 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1239 hwaddr addr,
1240 uint64_t data,
1241 unsigned size,
1242 MemTxAttrs attrs)
1243 {
1244 if (!memory_region_access_valid(mr, addr, size, true)) {
1245 unassigned_mem_write(mr, addr, data, size);
1246 return MEMTX_DECODE_ERROR;
1247 }
1248
1249 adjust_endianness(mr, &data, size);
1250
1251 if ((!kvm_eventfds_enabled()) &&
1252 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1253 return MEMTX_OK;
1254 }
1255
1256 if (mr->ops->write) {
1257 return access_with_adjusted_size(addr, &data, size,
1258 mr->ops->impl.min_access_size,
1259 mr->ops->impl.max_access_size,
1260 memory_region_write_accessor, mr,
1261 attrs);
1262 } else if (mr->ops->write_with_attrs) {
1263 return
1264 access_with_adjusted_size(addr, &data, size,
1265 mr->ops->impl.min_access_size,
1266 mr->ops->impl.max_access_size,
1267 memory_region_write_with_attrs_accessor,
1268 mr, attrs);
1269 } else {
1270 return access_with_adjusted_size(addr, &data, size, 1, 4,
1271 memory_region_oldmmio_write_accessor,
1272 mr, attrs);
1273 }
1274 }
1275
1276 void memory_region_init_io(MemoryRegion *mr,
1277 Object *owner,
1278 const MemoryRegionOps *ops,
1279 void *opaque,
1280 const char *name,
1281 uint64_t size)
1282 {
1283 memory_region_init(mr, owner, name, size);
1284 mr->ops = ops ? ops : &unassigned_mem_ops;
1285 mr->opaque = opaque;
1286 mr->terminates = true;
1287 }
1288
1289 void memory_region_init_ram(MemoryRegion *mr,
1290 Object *owner,
1291 const char *name,
1292 uint64_t size,
1293 Error **errp)
1294 {
1295 memory_region_init(mr, owner, name, size);
1296 mr->ram = true;
1297 mr->terminates = true;
1298 mr->destructor = memory_region_destructor_ram;
1299 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1300 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1301 }
1302
1303 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1304 Object *owner,
1305 const char *name,
1306 uint64_t size,
1307 uint64_t max_size,
1308 void (*resized)(const char*,
1309 uint64_t length,
1310 void *host),
1311 Error **errp)
1312 {
1313 memory_region_init(mr, owner, name, size);
1314 mr->ram = true;
1315 mr->terminates = true;
1316 mr->destructor = memory_region_destructor_ram;
1317 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1318 mr, errp);
1319 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1320 }
1321
1322 #ifdef __linux__
1323 void memory_region_init_ram_from_file(MemoryRegion *mr,
1324 struct Object *owner,
1325 const char *name,
1326 uint64_t size,
1327 bool share,
1328 const char *path,
1329 Error **errp)
1330 {
1331 memory_region_init(mr, owner, name, size);
1332 mr->ram = true;
1333 mr->terminates = true;
1334 mr->destructor = memory_region_destructor_ram;
1335 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1336 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1337 }
1338 #endif
1339
1340 void memory_region_init_ram_ptr(MemoryRegion *mr,
1341 Object *owner,
1342 const char *name,
1343 uint64_t size,
1344 void *ptr)
1345 {
1346 memory_region_init(mr, owner, name, size);
1347 mr->ram = true;
1348 mr->terminates = true;
1349 mr->destructor = memory_region_destructor_ram;
1350 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1351
1352 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1353 assert(ptr != NULL);
1354 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1355 }
1356
1357 void memory_region_set_skip_dump(MemoryRegion *mr)
1358 {
1359 mr->skip_dump = true;
1360 }
1361
1362 void memory_region_init_alias(MemoryRegion *mr,
1363 Object *owner,
1364 const char *name,
1365 MemoryRegion *orig,
1366 hwaddr offset,
1367 uint64_t size)
1368 {
1369 memory_region_init(mr, owner, name, size);
1370 mr->alias = orig;
1371 mr->alias_offset = offset;
1372 }
1373
1374 void memory_region_init_rom(MemoryRegion *mr,
1375 struct Object *owner,
1376 const char *name,
1377 uint64_t size,
1378 Error **errp)
1379 {
1380 memory_region_init(mr, owner, name, size);
1381 mr->ram = true;
1382 mr->readonly = true;
1383 mr->terminates = true;
1384 mr->destructor = memory_region_destructor_ram;
1385 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1386 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1387 }
1388
1389 void memory_region_init_rom_device(MemoryRegion *mr,
1390 Object *owner,
1391 const MemoryRegionOps *ops,
1392 void *opaque,
1393 const char *name,
1394 uint64_t size,
1395 Error **errp)
1396 {
1397 assert(ops);
1398 memory_region_init(mr, owner, name, size);
1399 mr->ops = ops;
1400 mr->opaque = opaque;
1401 mr->terminates = true;
1402 mr->rom_device = true;
1403 mr->destructor = memory_region_destructor_ram;
1404 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1405 }
1406
1407 void memory_region_init_iommu(MemoryRegion *mr,
1408 Object *owner,
1409 const MemoryRegionIOMMUOps *ops,
1410 const char *name,
1411 uint64_t size)
1412 {
1413 memory_region_init(mr, owner, name, size);
1414 mr->iommu_ops = ops,
1415 mr->terminates = true; /* then re-forwards */
1416 notifier_list_init(&mr->iommu_notify);
1417 }
1418
1419 static void memory_region_finalize(Object *obj)
1420 {
1421 MemoryRegion *mr = MEMORY_REGION(obj);
1422
1423 assert(!mr->container);
1424
1425 /* We know the region is not visible in any address space (it
1426 * does not have a container and cannot be a root either because
1427 * it has no references, so we can blindly clear mr->enabled.
1428 * memory_region_set_enabled instead could trigger a transaction
1429 * and cause an infinite loop.
1430 */
1431 mr->enabled = false;
1432 memory_region_transaction_begin();
1433 while (!QTAILQ_EMPTY(&mr->subregions)) {
1434 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1435 memory_region_del_subregion(mr, subregion);
1436 }
1437 memory_region_transaction_commit();
1438
1439 mr->destructor(mr);
1440 memory_region_clear_coalescing(mr);
1441 g_free((char *)mr->name);
1442 g_free(mr->ioeventfds);
1443 }
1444
1445 Object *memory_region_owner(MemoryRegion *mr)
1446 {
1447 Object *obj = OBJECT(mr);
1448 return obj->parent;
1449 }
1450
1451 void memory_region_ref(MemoryRegion *mr)
1452 {
1453 /* MMIO callbacks most likely will access data that belongs
1454 * to the owner, hence the need to ref/unref the owner whenever
1455 * the memory region is in use.
1456 *
1457 * The memory region is a child of its owner. As long as the
1458 * owner doesn't call unparent itself on the memory region,
1459 * ref-ing the owner will also keep the memory region alive.
1460 * Memory regions without an owner are supposed to never go away;
1461 * we do not ref/unref them because it slows down DMA sensibly.
1462 */
1463 if (mr && mr->owner) {
1464 object_ref(mr->owner);
1465 }
1466 }
1467
1468 void memory_region_unref(MemoryRegion *mr)
1469 {
1470 if (mr && mr->owner) {
1471 object_unref(mr->owner);
1472 }
1473 }
1474
1475 uint64_t memory_region_size(MemoryRegion *mr)
1476 {
1477 if (int128_eq(mr->size, int128_2_64())) {
1478 return UINT64_MAX;
1479 }
1480 return int128_get64(mr->size);
1481 }
1482
1483 const char *memory_region_name(const MemoryRegion *mr)
1484 {
1485 if (!mr->name) {
1486 ((MemoryRegion *)mr)->name =
1487 object_get_canonical_path_component(OBJECT(mr));
1488 }
1489 return mr->name;
1490 }
1491
1492 bool memory_region_is_skip_dump(MemoryRegion *mr)
1493 {
1494 return mr->skip_dump;
1495 }
1496
1497 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1498 {
1499 uint8_t mask = mr->dirty_log_mask;
1500 if (global_dirty_log) {
1501 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1502 }
1503 return mask;
1504 }
1505
1506 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1507 {
1508 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1509 }
1510
1511 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1512 {
1513 if (mr->iommu_ops->notify_started &&
1514 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1515 mr->iommu_ops->notify_started(mr);
1516 }
1517 notifier_list_add(&mr->iommu_notify, n);
1518 }
1519
1520 uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
1521 {
1522 assert(memory_region_is_iommu(mr));
1523 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1524 return mr->iommu_ops->get_min_page_size(mr);
1525 }
1526 return TARGET_PAGE_SIZE;
1527 }
1528
1529 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, bool is_write)
1530 {
1531 hwaddr addr, granularity;
1532 IOMMUTLBEntry iotlb;
1533
1534 granularity = memory_region_iommu_get_min_page_size(mr);
1535
1536 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1537 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1538 if (iotlb.perm != IOMMU_NONE) {
1539 n->notify(n, &iotlb);
1540 }
1541
1542 /* if (2^64 - MR size) < granularity, it's possible to get an
1543 * infinite loop here. This should catch such a wraparound */
1544 if ((addr + granularity) < addr) {
1545 break;
1546 }
1547 }
1548 }
1549
1550 void memory_region_unregister_iommu_notifier(MemoryRegion *mr, Notifier *n)
1551 {
1552 notifier_remove(n);
1553 if (mr->iommu_ops->notify_stopped &&
1554 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1555 mr->iommu_ops->notify_stopped(mr);
1556 }
1557 }
1558
1559 void memory_region_notify_iommu(MemoryRegion *mr,
1560 IOMMUTLBEntry entry)
1561 {
1562 assert(memory_region_is_iommu(mr));
1563 notifier_list_notify(&mr->iommu_notify, &entry);
1564 }
1565
1566 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1567 {
1568 uint8_t mask = 1 << client;
1569 uint8_t old_logging;
1570
1571 assert(client == DIRTY_MEMORY_VGA);
1572 old_logging = mr->vga_logging_count;
1573 mr->vga_logging_count += log ? 1 : -1;
1574 if (!!old_logging == !!mr->vga_logging_count) {
1575 return;
1576 }
1577
1578 memory_region_transaction_begin();
1579 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1580 memory_region_update_pending |= mr->enabled;
1581 memory_region_transaction_commit();
1582 }
1583
1584 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1585 hwaddr size, unsigned client)
1586 {
1587 assert(mr->ram_block);
1588 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1589 size, client);
1590 }
1591
1592 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1593 hwaddr size)
1594 {
1595 assert(mr->ram_block);
1596 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1597 size,
1598 memory_region_get_dirty_log_mask(mr));
1599 }
1600
1601 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1602 hwaddr size, unsigned client)
1603 {
1604 assert(mr->ram_block);
1605 return cpu_physical_memory_test_and_clear_dirty(
1606 memory_region_get_ram_addr(mr) + addr, size, client);
1607 }
1608
1609
1610 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1611 {
1612 AddressSpace *as;
1613 FlatRange *fr;
1614
1615 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1616 FlatView *view = address_space_get_flatview(as);
1617 FOR_EACH_FLAT_RANGE(fr, view) {
1618 if (fr->mr == mr) {
1619 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1620 }
1621 }
1622 flatview_unref(view);
1623 }
1624 }
1625
1626 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1627 {
1628 if (mr->readonly != readonly) {
1629 memory_region_transaction_begin();
1630 mr->readonly = readonly;
1631 memory_region_update_pending |= mr->enabled;
1632 memory_region_transaction_commit();
1633 }
1634 }
1635
1636 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1637 {
1638 if (mr->romd_mode != romd_mode) {
1639 memory_region_transaction_begin();
1640 mr->romd_mode = romd_mode;
1641 memory_region_update_pending |= mr->enabled;
1642 memory_region_transaction_commit();
1643 }
1644 }
1645
1646 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1647 hwaddr size, unsigned client)
1648 {
1649 assert(mr->ram_block);
1650 cpu_physical_memory_test_and_clear_dirty(
1651 memory_region_get_ram_addr(mr) + addr, size, client);
1652 }
1653
1654 int memory_region_get_fd(MemoryRegion *mr)
1655 {
1656 int fd;
1657
1658 rcu_read_lock();
1659 while (mr->alias) {
1660 mr = mr->alias;
1661 }
1662 fd = mr->ram_block->fd;
1663 rcu_read_unlock();
1664
1665 return fd;
1666 }
1667
1668 void memory_region_set_fd(MemoryRegion *mr, int fd)
1669 {
1670 rcu_read_lock();
1671 while (mr->alias) {
1672 mr = mr->alias;
1673 }
1674 mr->ram_block->fd = fd;
1675 rcu_read_unlock();
1676 }
1677
1678 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1679 {
1680 void *ptr;
1681 uint64_t offset = 0;
1682
1683 rcu_read_lock();
1684 while (mr->alias) {
1685 offset += mr->alias_offset;
1686 mr = mr->alias;
1687 }
1688 assert(mr->ram_block);
1689 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
1690 rcu_read_unlock();
1691
1692 return ptr;
1693 }
1694
1695 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1696 {
1697 RAMBlock *block;
1698
1699 block = qemu_ram_block_from_host(ptr, false, offset);
1700 if (!block) {
1701 return NULL;
1702 }
1703
1704 return block->mr;
1705 }
1706
1707 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1708 {
1709 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1710 }
1711
1712 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1713 {
1714 assert(mr->ram_block);
1715
1716 qemu_ram_resize(mr->ram_block, newsize, errp);
1717 }
1718
1719 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1720 {
1721 FlatView *view;
1722 FlatRange *fr;
1723 CoalescedMemoryRange *cmr;
1724 AddrRange tmp;
1725 MemoryRegionSection section;
1726
1727 view = address_space_get_flatview(as);
1728 FOR_EACH_FLAT_RANGE(fr, view) {
1729 if (fr->mr == mr) {
1730 section = (MemoryRegionSection) {
1731 .address_space = as,
1732 .offset_within_address_space = int128_get64(fr->addr.start),
1733 .size = fr->addr.size,
1734 };
1735
1736 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1737 int128_get64(fr->addr.start),
1738 int128_get64(fr->addr.size));
1739 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1740 tmp = addrrange_shift(cmr->addr,
1741 int128_sub(fr->addr.start,
1742 int128_make64(fr->offset_in_region)));
1743 if (!addrrange_intersects(tmp, fr->addr)) {
1744 continue;
1745 }
1746 tmp = addrrange_intersection(tmp, fr->addr);
1747 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1748 int128_get64(tmp.start),
1749 int128_get64(tmp.size));
1750 }
1751 }
1752 }
1753 flatview_unref(view);
1754 }
1755
1756 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1757 {
1758 AddressSpace *as;
1759
1760 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1761 memory_region_update_coalesced_range_as(mr, as);
1762 }
1763 }
1764
1765 void memory_region_set_coalescing(MemoryRegion *mr)
1766 {
1767 memory_region_clear_coalescing(mr);
1768 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1769 }
1770
1771 void memory_region_add_coalescing(MemoryRegion *mr,
1772 hwaddr offset,
1773 uint64_t size)
1774 {
1775 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1776
1777 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1778 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1779 memory_region_update_coalesced_range(mr);
1780 memory_region_set_flush_coalesced(mr);
1781 }
1782
1783 void memory_region_clear_coalescing(MemoryRegion *mr)
1784 {
1785 CoalescedMemoryRange *cmr;
1786 bool updated = false;
1787
1788 qemu_flush_coalesced_mmio_buffer();
1789 mr->flush_coalesced_mmio = false;
1790
1791 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1792 cmr = QTAILQ_FIRST(&mr->coalesced);
1793 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1794 g_free(cmr);
1795 updated = true;
1796 }
1797
1798 if (updated) {
1799 memory_region_update_coalesced_range(mr);
1800 }
1801 }
1802
1803 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1804 {
1805 mr->flush_coalesced_mmio = true;
1806 }
1807
1808 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1809 {
1810 qemu_flush_coalesced_mmio_buffer();
1811 if (QTAILQ_EMPTY(&mr->coalesced)) {
1812 mr->flush_coalesced_mmio = false;
1813 }
1814 }
1815
1816 void memory_region_set_global_locking(MemoryRegion *mr)
1817 {
1818 mr->global_locking = true;
1819 }
1820
1821 void memory_region_clear_global_locking(MemoryRegion *mr)
1822 {
1823 mr->global_locking = false;
1824 }
1825
1826 static bool userspace_eventfd_warning;
1827
1828 void memory_region_add_eventfd(MemoryRegion *mr,
1829 hwaddr addr,
1830 unsigned size,
1831 bool match_data,
1832 uint64_t data,
1833 EventNotifier *e)
1834 {
1835 MemoryRegionIoeventfd mrfd = {
1836 .addr.start = int128_make64(addr),
1837 .addr.size = int128_make64(size),
1838 .match_data = match_data,
1839 .data = data,
1840 .e = e,
1841 };
1842 unsigned i;
1843
1844 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1845 userspace_eventfd_warning))) {
1846 userspace_eventfd_warning = true;
1847 error_report("Using eventfd without MMIO binding in KVM. "
1848 "Suboptimal performance expected");
1849 }
1850
1851 if (size) {
1852 adjust_endianness(mr, &mrfd.data, size);
1853 }
1854 memory_region_transaction_begin();
1855 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1856 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1857 break;
1858 }
1859 }
1860 ++mr->ioeventfd_nb;
1861 mr->ioeventfds = g_realloc(mr->ioeventfds,
1862 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1863 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1864 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1865 mr->ioeventfds[i] = mrfd;
1866 ioeventfd_update_pending |= mr->enabled;
1867 memory_region_transaction_commit();
1868 }
1869
1870 void memory_region_del_eventfd(MemoryRegion *mr,
1871 hwaddr addr,
1872 unsigned size,
1873 bool match_data,
1874 uint64_t data,
1875 EventNotifier *e)
1876 {
1877 MemoryRegionIoeventfd mrfd = {
1878 .addr.start = int128_make64(addr),
1879 .addr.size = int128_make64(size),
1880 .match_data = match_data,
1881 .data = data,
1882 .e = e,
1883 };
1884 unsigned i;
1885
1886 if (size) {
1887 adjust_endianness(mr, &mrfd.data, size);
1888 }
1889 memory_region_transaction_begin();
1890 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1891 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1892 break;
1893 }
1894 }
1895 assert(i != mr->ioeventfd_nb);
1896 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1897 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1898 --mr->ioeventfd_nb;
1899 mr->ioeventfds = g_realloc(mr->ioeventfds,
1900 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1901 ioeventfd_update_pending |= mr->enabled;
1902 memory_region_transaction_commit();
1903 }
1904
1905 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1906 {
1907 MemoryRegion *mr = subregion->container;
1908 MemoryRegion *other;
1909
1910 memory_region_transaction_begin();
1911
1912 memory_region_ref(subregion);
1913 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1914 if (subregion->priority >= other->priority) {
1915 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1916 goto done;
1917 }
1918 }
1919 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1920 done:
1921 memory_region_update_pending |= mr->enabled && subregion->enabled;
1922 memory_region_transaction_commit();
1923 }
1924
1925 static void memory_region_add_subregion_common(MemoryRegion *mr,
1926 hwaddr offset,
1927 MemoryRegion *subregion)
1928 {
1929 assert(!subregion->container);
1930 subregion->container = mr;
1931 subregion->addr = offset;
1932 memory_region_update_container_subregions(subregion);
1933 }
1934
1935 void memory_region_add_subregion(MemoryRegion *mr,
1936 hwaddr offset,
1937 MemoryRegion *subregion)
1938 {
1939 subregion->priority = 0;
1940 memory_region_add_subregion_common(mr, offset, subregion);
1941 }
1942
1943 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1944 hwaddr offset,
1945 MemoryRegion *subregion,
1946 int priority)
1947 {
1948 subregion->priority = priority;
1949 memory_region_add_subregion_common(mr, offset, subregion);
1950 }
1951
1952 void memory_region_del_subregion(MemoryRegion *mr,
1953 MemoryRegion *subregion)
1954 {
1955 memory_region_transaction_begin();
1956 assert(subregion->container == mr);
1957 subregion->container = NULL;
1958 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1959 memory_region_unref(subregion);
1960 memory_region_update_pending |= mr->enabled && subregion->enabled;
1961 memory_region_transaction_commit();
1962 }
1963
1964 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1965 {
1966 if (enabled == mr->enabled) {
1967 return;
1968 }
1969 memory_region_transaction_begin();
1970 mr->enabled = enabled;
1971 memory_region_update_pending = true;
1972 memory_region_transaction_commit();
1973 }
1974
1975 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1976 {
1977 Int128 s = int128_make64(size);
1978
1979 if (size == UINT64_MAX) {
1980 s = int128_2_64();
1981 }
1982 if (int128_eq(s, mr->size)) {
1983 return;
1984 }
1985 memory_region_transaction_begin();
1986 mr->size = s;
1987 memory_region_update_pending = true;
1988 memory_region_transaction_commit();
1989 }
1990
1991 static void memory_region_readd_subregion(MemoryRegion *mr)
1992 {
1993 MemoryRegion *container = mr->container;
1994
1995 if (container) {
1996 memory_region_transaction_begin();
1997 memory_region_ref(mr);
1998 memory_region_del_subregion(container, mr);
1999 mr->container = container;
2000 memory_region_update_container_subregions(mr);
2001 memory_region_unref(mr);
2002 memory_region_transaction_commit();
2003 }
2004 }
2005
2006 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2007 {
2008 if (addr != mr->addr) {
2009 mr->addr = addr;
2010 memory_region_readd_subregion(mr);
2011 }
2012 }
2013
2014 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2015 {
2016 assert(mr->alias);
2017
2018 if (offset == mr->alias_offset) {
2019 return;
2020 }
2021
2022 memory_region_transaction_begin();
2023 mr->alias_offset = offset;
2024 memory_region_update_pending |= mr->enabled;
2025 memory_region_transaction_commit();
2026 }
2027
2028 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2029 {
2030 return mr->align;
2031 }
2032
2033 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2034 {
2035 const AddrRange *addr = addr_;
2036 const FlatRange *fr = fr_;
2037
2038 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2039 return -1;
2040 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2041 return 1;
2042 }
2043 return 0;
2044 }
2045
2046 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2047 {
2048 return bsearch(&addr, view->ranges, view->nr,
2049 sizeof(FlatRange), cmp_flatrange_addr);
2050 }
2051
2052 bool memory_region_is_mapped(MemoryRegion *mr)
2053 {
2054 return mr->container ? true : false;
2055 }
2056
2057 /* Same as memory_region_find, but it does not add a reference to the
2058 * returned region. It must be called from an RCU critical section.
2059 */
2060 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2061 hwaddr addr, uint64_t size)
2062 {
2063 MemoryRegionSection ret = { .mr = NULL };
2064 MemoryRegion *root;
2065 AddressSpace *as;
2066 AddrRange range;
2067 FlatView *view;
2068 FlatRange *fr;
2069
2070 addr += mr->addr;
2071 for (root = mr; root->container; ) {
2072 root = root->container;
2073 addr += root->addr;
2074 }
2075
2076 as = memory_region_to_address_space(root);
2077 if (!as) {
2078 return ret;
2079 }
2080 range = addrrange_make(int128_make64(addr), int128_make64(size));
2081
2082 view = atomic_rcu_read(&as->current_map);
2083 fr = flatview_lookup(view, range);
2084 if (!fr) {
2085 return ret;
2086 }
2087
2088 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2089 --fr;
2090 }
2091
2092 ret.mr = fr->mr;
2093 ret.address_space = as;
2094 range = addrrange_intersection(range, fr->addr);
2095 ret.offset_within_region = fr->offset_in_region;
2096 ret.offset_within_region += int128_get64(int128_sub(range.start,
2097 fr->addr.start));
2098 ret.size = range.size;
2099 ret.offset_within_address_space = int128_get64(range.start);
2100 ret.readonly = fr->readonly;
2101 return ret;
2102 }
2103
2104 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2105 hwaddr addr, uint64_t size)
2106 {
2107 MemoryRegionSection ret;
2108 rcu_read_lock();
2109 ret = memory_region_find_rcu(mr, addr, size);
2110 if (ret.mr) {
2111 memory_region_ref(ret.mr);
2112 }
2113 rcu_read_unlock();
2114 return ret;
2115 }
2116
2117 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2118 {
2119 MemoryRegion *mr;
2120
2121 rcu_read_lock();
2122 mr = memory_region_find_rcu(container, addr, 1).mr;
2123 rcu_read_unlock();
2124 return mr && mr != container;
2125 }
2126
2127 void address_space_sync_dirty_bitmap(AddressSpace *as)
2128 {
2129 FlatView *view;
2130 FlatRange *fr;
2131
2132 view = address_space_get_flatview(as);
2133 FOR_EACH_FLAT_RANGE(fr, view) {
2134 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2135 }
2136 flatview_unref(view);
2137 }
2138
2139 void memory_global_dirty_log_start(void)
2140 {
2141 global_dirty_log = true;
2142
2143 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2144
2145 /* Refresh DIRTY_LOG_MIGRATION bit. */
2146 memory_region_transaction_begin();
2147 memory_region_update_pending = true;
2148 memory_region_transaction_commit();
2149 }
2150
2151 void memory_global_dirty_log_stop(void)
2152 {
2153 global_dirty_log = false;
2154
2155 /* Refresh DIRTY_LOG_MIGRATION bit. */
2156 memory_region_transaction_begin();
2157 memory_region_update_pending = true;
2158 memory_region_transaction_commit();
2159
2160 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2161 }
2162
2163 static void listener_add_address_space(MemoryListener *listener,
2164 AddressSpace *as)
2165 {
2166 FlatView *view;
2167 FlatRange *fr;
2168
2169 if (listener->address_space_filter
2170 && listener->address_space_filter != as) {
2171 return;
2172 }
2173
2174 if (listener->begin) {
2175 listener->begin(listener);
2176 }
2177 if (global_dirty_log) {
2178 if (listener->log_global_start) {
2179 listener->log_global_start(listener);
2180 }
2181 }
2182
2183 view = address_space_get_flatview(as);
2184 FOR_EACH_FLAT_RANGE(fr, view) {
2185 MemoryRegionSection section = {
2186 .mr = fr->mr,
2187 .address_space = as,
2188 .offset_within_region = fr->offset_in_region,
2189 .size = fr->addr.size,
2190 .offset_within_address_space = int128_get64(fr->addr.start),
2191 .readonly = fr->readonly,
2192 };
2193 if (fr->dirty_log_mask && listener->log_start) {
2194 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2195 }
2196 if (listener->region_add) {
2197 listener->region_add(listener, &section);
2198 }
2199 }
2200 if (listener->commit) {
2201 listener->commit(listener);
2202 }
2203 flatview_unref(view);
2204 }
2205
2206 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2207 {
2208 MemoryListener *other = NULL;
2209 AddressSpace *as;
2210
2211 listener->address_space_filter = filter;
2212 if (QTAILQ_EMPTY(&memory_listeners)
2213 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2214 memory_listeners)->priority) {
2215 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2216 } else {
2217 QTAILQ_FOREACH(other, &memory_listeners, link) {
2218 if (listener->priority < other->priority) {
2219 break;
2220 }
2221 }
2222 QTAILQ_INSERT_BEFORE(other, listener, link);
2223 }
2224
2225 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2226 listener_add_address_space(listener, as);
2227 }
2228 }
2229
2230 void memory_listener_unregister(MemoryListener *listener)
2231 {
2232 QTAILQ_REMOVE(&memory_listeners, listener, link);
2233 }
2234
2235 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2236 {
2237 memory_region_ref(root);
2238 memory_region_transaction_begin();
2239 as->ref_count = 1;
2240 as->root = root;
2241 as->malloced = false;
2242 as->current_map = g_new(FlatView, 1);
2243 flatview_init(as->current_map);
2244 as->ioeventfd_nb = 0;
2245 as->ioeventfds = NULL;
2246 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2247 as->name = g_strdup(name ? name : "anonymous");
2248 address_space_init_dispatch(as);
2249 memory_region_update_pending |= root->enabled;
2250 memory_region_transaction_commit();
2251 }
2252
2253 static void do_address_space_destroy(AddressSpace *as)
2254 {
2255 MemoryListener *listener;
2256 bool do_free = as->malloced;
2257
2258 address_space_destroy_dispatch(as);
2259
2260 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2261 assert(listener->address_space_filter != as);
2262 }
2263
2264 flatview_unref(as->current_map);
2265 g_free(as->name);
2266 g_free(as->ioeventfds);
2267 memory_region_unref(as->root);
2268 if (do_free) {
2269 g_free(as);
2270 }
2271 }
2272
2273 AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2274 {
2275 AddressSpace *as;
2276
2277 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2278 if (root == as->root && as->malloced) {
2279 as->ref_count++;
2280 return as;
2281 }
2282 }
2283
2284 as = g_malloc0(sizeof *as);
2285 address_space_init(as, root, name);
2286 as->malloced = true;
2287 return as;
2288 }
2289
2290 void address_space_destroy(AddressSpace *as)
2291 {
2292 MemoryRegion *root = as->root;
2293
2294 as->ref_count--;
2295 if (as->ref_count) {
2296 return;
2297 }
2298 /* Flush out anything from MemoryListeners listening in on this */
2299 memory_region_transaction_begin();
2300 as->root = NULL;
2301 memory_region_transaction_commit();
2302 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2303 address_space_unregister(as);
2304
2305 /* At this point, as->dispatch and as->current_map are dummy
2306 * entries that the guest should never use. Wait for the old
2307 * values to expire before freeing the data.
2308 */
2309 as->root = root;
2310 call_rcu(as, do_address_space_destroy, rcu);
2311 }
2312
2313 typedef struct MemoryRegionList MemoryRegionList;
2314
2315 struct MemoryRegionList {
2316 const MemoryRegion *mr;
2317 QTAILQ_ENTRY(MemoryRegionList) queue;
2318 };
2319
2320 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2321
2322 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2323 const MemoryRegion *mr, unsigned int level,
2324 hwaddr base,
2325 MemoryRegionListHead *alias_print_queue)
2326 {
2327 MemoryRegionList *new_ml, *ml, *next_ml;
2328 MemoryRegionListHead submr_print_queue;
2329 const MemoryRegion *submr;
2330 unsigned int i;
2331
2332 if (!mr) {
2333 return;
2334 }
2335
2336 for (i = 0; i < level; i++) {
2337 mon_printf(f, " ");
2338 }
2339
2340 if (mr->alias) {
2341 MemoryRegionList *ml;
2342 bool found = false;
2343
2344 /* check if the alias is already in the queue */
2345 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2346 if (ml->mr == mr->alias) {
2347 found = true;
2348 }
2349 }
2350
2351 if (!found) {
2352 ml = g_new(MemoryRegionList, 1);
2353 ml->mr = mr->alias;
2354 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2355 }
2356 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2357 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2358 "-" TARGET_FMT_plx "%s\n",
2359 base + mr->addr,
2360 base + mr->addr
2361 + (int128_nz(mr->size) ?
2362 (hwaddr)int128_get64(int128_sub(mr->size,
2363 int128_one())) : 0),
2364 mr->priority,
2365 mr->romd_mode ? 'R' : '-',
2366 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2367 : '-',
2368 memory_region_name(mr),
2369 memory_region_name(mr->alias),
2370 mr->alias_offset,
2371 mr->alias_offset
2372 + (int128_nz(mr->size) ?
2373 (hwaddr)int128_get64(int128_sub(mr->size,
2374 int128_one())) : 0),
2375 mr->enabled ? "" : " [disabled]");
2376 } else {
2377 mon_printf(f,
2378 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2379 base + mr->addr,
2380 base + mr->addr
2381 + (int128_nz(mr->size) ?
2382 (hwaddr)int128_get64(int128_sub(mr->size,
2383 int128_one())) : 0),
2384 mr->priority,
2385 mr->romd_mode ? 'R' : '-',
2386 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2387 : '-',
2388 memory_region_name(mr),
2389 mr->enabled ? "" : " [disabled]");
2390 }
2391
2392 QTAILQ_INIT(&submr_print_queue);
2393
2394 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2395 new_ml = g_new(MemoryRegionList, 1);
2396 new_ml->mr = submr;
2397 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2398 if (new_ml->mr->addr < ml->mr->addr ||
2399 (new_ml->mr->addr == ml->mr->addr &&
2400 new_ml->mr->priority > ml->mr->priority)) {
2401 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2402 new_ml = NULL;
2403 break;
2404 }
2405 }
2406 if (new_ml) {
2407 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2408 }
2409 }
2410
2411 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2412 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2413 alias_print_queue);
2414 }
2415
2416 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2417 g_free(ml);
2418 }
2419 }
2420
2421 void mtree_info(fprintf_function mon_printf, void *f)
2422 {
2423 MemoryRegionListHead ml_head;
2424 MemoryRegionList *ml, *ml2;
2425 AddressSpace *as;
2426
2427 QTAILQ_INIT(&ml_head);
2428
2429 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2430 mon_printf(f, "address-space: %s\n", as->name);
2431 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2432 mon_printf(f, "\n");
2433 }
2434
2435 /* print aliased regions */
2436 QTAILQ_FOREACH(ml, &ml_head, queue) {
2437 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2438 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2439 mon_printf(f, "\n");
2440 }
2441
2442 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2443 g_free(ml);
2444 }
2445 }
2446
2447 static const TypeInfo memory_region_info = {
2448 .parent = TYPE_OBJECT,
2449 .name = TYPE_MEMORY_REGION,
2450 .instance_size = sizeof(MemoryRegion),
2451 .instance_init = memory_region_initfn,
2452 .instance_finalize = memory_region_finalize,
2453 };
2454
2455 static void memory_register_types(void)
2456 {
2457 type_register_static(&memory_region_info);
2458 }
2459
2460 type_init(memory_register_types)
AR7 emulation for QEMU