target-s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "cpu.h"
  22 #include "memory.h"
  23 #include "host-utils.h"
  24 #include "helper.h"
  25 #include <string.h>
  26 #include "kvm.h"
  27 #include "qemu-timer.h"
  28 #ifdef CONFIG_KVM
  29 #include <linux/kvm.h>
  30 #endif
  31
  32 #if !defined(CONFIG_USER_ONLY)
  33 #include "softmmu_exec.h"
  34 #include "sysemu.h"
  35 #endif
  36
  37 /* #define DEBUG_HELPER */
  38 #ifdef DEBUG_HELPER
  39 #define HELPER_LOG(x...) qemu_log(x)
  40 #else
  41 #define HELPER_LOG(x...)
  42 #endif
  43
  44 /* raise an exception */
  45 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  46 {
  47     HELPER_LOG("%s: exception %d\n", __func__, excp);
  48     env->exception_index = excp;
  49     cpu_loop_exit(env);
  50 }
  51
  52 #ifndef CONFIG_USER_ONLY
  53 void program_interrupt(CPUS390XState *env, uint32_t code, int ilc)
  54 {
  55     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  56                   env->psw.addr);
  57
  58     if (kvm_enabled()) {
  59 #ifdef CONFIG_KVM
  60         kvm_s390_interrupt(env, KVM_S390_PROGRAM_INT, code);
  61 #endif
  62     } else {
  63         env->int_pgm_code = code;
  64         env->int_pgm_ilc = ilc;
  65         env->exception_index = EXCP_PGM;
  66         cpu_loop_exit(env);
  67     }
  68 }
  69
  70 /*
  71  * ret < 0 indicates program check, ret = 0, 1, 2, 3 -> cc
  72  */
  73 int sclp_service_call(CPUS390XState *env, uint32_t sccb, uint64_t code)
  74 {
  75     int r = 0;
  76     int shift = 0;
  77
  78 #ifdef DEBUG_HELPER
  79     printf("sclp(0x%x, 0x%" PRIx64 ")\n", sccb, code);
  80 #endif
  81
  82     /* basic checks */
  83     if (cpu_physical_memory_is_io(sccb)) {
  84         return -PGM_ADDRESSING;
  85     }
  86     if (sccb & ~0x7ffffff8ul) {
  87         return -PGM_SPECIFICATION;
  88     }
  89
  90     switch (code) {
  91     case SCLP_CMDW_READ_SCP_INFO:
  92     case SCLP_CMDW_READ_SCP_INFO_FORCED:
  93         while ((ram_size >> (20 + shift)) > 65535) {
  94             shift++;
  95         }
  96         stw_phys(sccb + SCP_MEM_CODE, ram_size >> (20 + shift));
  97         stb_phys(sccb + SCP_INCREMENT, 1 << shift);
  98         stw_phys(sccb + SCP_RESPONSE_CODE, 0x10);
  99
 100         s390_sclp_extint(sccb & ~3);
 101         break;
 102     default:
 103 #ifdef DEBUG_HELPER
 104         printf("KVM: invalid sclp call 0x%x / 0x%" PRIx64 "x\n", sccb, code);
 105 #endif
 106         r = 3;
 107         break;
 108     }
 109
 110     return r;
 111 }
 112
 113 /* SCLP service call */
 114 uint32_t HELPER(servc)(CPUS390XState *env, uint32_t r1, uint64_t r2)
 115 {
 116     int r;
 117
 118     r = sclp_service_call(env, r1, r2);
 119     if (r < 0) {
 120         program_interrupt(env, -r, 4);
 121         return 0;
 122     }
 123     return r;
 124 }
 125
 126 /* DIAG */
 127 uint64_t HELPER(diag)(CPUS390XState *env, uint32_t num, uint64_t mem,
 128                       uint64_t code)
 129 {
 130     uint64_t r;
 131
 132     switch (num) {
 133     case 0x500:
 134         /* KVM hypercall */
 135         r = s390_virtio_hypercall(env, mem, code);
 136         break;
 137     case 0x44:
 138         /* yield */
 139         r = 0;
 140         break;
 141     case 0x308:
 142         /* ipl */
 143         r = 0;
 144         break;
 145     default:
 146         r = -1;
 147         break;
 148     }
 149
 150     if (r) {
 151         program_interrupt(env, PGM_OPERATION, ILC_LATER_INC);
 152     }
 153
 154     return r;
 155 }
 156
 157 /* Store CPU ID */
 158 void HELPER(stidp)(CPUS390XState *env, uint64_t a1)
 159 {
 160     cpu_stq_data(env, a1, env->cpu_num);
 161 }
 162
 163 /* Set Prefix */
 164 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 165 {
 166     uint32_t prefix;
 167
 168     prefix = cpu_ldl_data(env, a1);
 169     env->psa = prefix & 0xfffff000;
 170     qemu_log("prefix: %#x\n", prefix);
 171     tlb_flush_page(env, 0);
 172     tlb_flush_page(env, TARGET_PAGE_SIZE);
 173 }
 174
 175 /* Set Clock */
 176 uint32_t HELPER(sck)(uint64_t a1)
 177 {
 178     /* XXX not implemented - is it necessary? */
 179
 180     return 0;
 181 }
 182
 183 static inline uint64_t clock_value(CPUS390XState *env)
 184 {
 185     uint64_t time;
 186
 187     time = env->tod_offset +
 188         time2tod(qemu_get_clock_ns(vm_clock) - env->tod_basetime);
 189
 190     return time;
 191 }
 192
 193 /* Store Clock */
 194 uint32_t HELPER(stck)(CPUS390XState *env, uint64_t a1)
 195 {
 196     cpu_stq_data(env, a1, clock_value(env));
 197
 198     return 0;
 199 }
 200
 201 /* Store Clock Extended */
 202 uint32_t HELPER(stcke)(CPUS390XState *env, uint64_t a1)
 203 {
 204     cpu_stb_data(env, a1, 0);
 205     /* basically the same value as stck */
 206     cpu_stq_data(env, a1 + 1, clock_value(env) | env->cpu_num);
 207     /* more fine grained than stck */
 208     cpu_stq_data(env, a1 + 9, 0);
 209     /* XXX programmable fields */
 210     cpu_stw_data(env, a1 + 17, 0);
 211
 212     return 0;
 213 }
 214
 215 /* Set Clock Comparator */
 216 void HELPER(sckc)(CPUS390XState *env, uint64_t a1)
 217 {
 218     uint64_t time = cpu_ldq_data(env, a1);
 219
 220     if (time == -1ULL) {
 221         return;
 222     }
 223
 224     /* difference between now and then */
 225     time -= clock_value(env);
 226     /* nanoseconds */
 227     time = (time * 125) >> 9;
 228
 229     qemu_mod_timer(env->tod_timer, qemu_get_clock_ns(vm_clock) + time);
 230 }
 231
 232 /* Store Clock Comparator */
 233 void HELPER(stckc)(CPUS390XState *env, uint64_t a1)
 234 {
 235     /* XXX implement */
 236     cpu_stq_data(env, a1, 0);
 237 }
 238
 239 /* Set CPU Timer */
 240 void HELPER(spt)(CPUS390XState *env, uint64_t a1)
 241 {
 242     uint64_t time = cpu_ldq_data(env, a1);
 243
 244     if (time == -1ULL) {
 245         return;
 246     }
 247
 248     /* nanoseconds */
 249     time = (time * 125) >> 9;
 250
 251     qemu_mod_timer(env->cpu_timer, qemu_get_clock_ns(vm_clock) + time);
 252 }
 253
 254 /* Store CPU Timer */
 255 void HELPER(stpt)(CPUS390XState *env, uint64_t a1)
 256 {
 257     /* XXX implement */
 258     cpu_stq_data(env, a1, 0);
 259 }
 260
 261 /* Store System Information */
 262 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, uint32_t r0,
 263                       uint32_t r1)
 264 {
 265     int cc = 0;
 266     int sel1, sel2;
 267
 268     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 269         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 270         /* valid function code, invalid reserved bits */
 271         program_interrupt(env, PGM_SPECIFICATION, 2);
 272     }
 273
 274     sel1 = r0 & STSI_R0_SEL1_MASK;
 275     sel2 = r1 & STSI_R1_SEL2_MASK;
 276
 277     /* XXX: spec exception if sysib is not 4k-aligned */
 278
 279     switch (r0 & STSI_LEVEL_MASK) {
 280     case STSI_LEVEL_1:
 281         if ((sel1 == 1) && (sel2 == 1)) {
 282             /* Basic Machine Configuration */
 283             struct sysib_111 sysib;
 284
 285             memset(&sysib, 0, sizeof(sysib));
 286             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 287             /* same as machine type number in STORE CPU ID */
 288             ebcdic_put(sysib.type, "QEMU", 4);
 289             /* same as model number in STORE CPU ID */
 290             ebcdic_put(sysib.model, "QEMU            ", 16);
 291             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 292             ebcdic_put(sysib.plant, "QEMU", 4);
 293             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 294         } else if ((sel1 == 2) && (sel2 == 1)) {
 295             /* Basic Machine CPU */
 296             struct sysib_121 sysib;
 297
 298             memset(&sysib, 0, sizeof(sysib));
 299             /* XXX make different for different CPUs? */
 300             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 301             ebcdic_put(sysib.plant, "QEMU", 4);
 302             stw_p(&sysib.cpu_addr, env->cpu_num);
 303             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 304         } else if ((sel1 == 2) && (sel2 == 2)) {
 305             /* Basic Machine CPUs */
 306             struct sysib_122 sysib;
 307
 308             memset(&sysib, 0, sizeof(sysib));
 309             stl_p(&sysib.capability, 0x443afc29);
 310             /* XXX change when SMP comes */
 311             stw_p(&sysib.total_cpus, 1);
 312             stw_p(&sysib.active_cpus, 1);
 313             stw_p(&sysib.standby_cpus, 0);
 314             stw_p(&sysib.reserved_cpus, 0);
 315             cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 316         } else {
 317             cc = 3;
 318         }
 319         break;
 320     case STSI_LEVEL_2:
 321         {
 322             if ((sel1 == 2) && (sel2 == 1)) {
 323                 /* LPAR CPU */
 324                 struct sysib_221 sysib;
 325
 326                 memset(&sysib, 0, sizeof(sysib));
 327                 /* XXX make different for different CPUs? */
 328                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 329                 ebcdic_put(sysib.plant, "QEMU", 4);
 330                 stw_p(&sysib.cpu_addr, env->cpu_num);
 331                 stw_p(&sysib.cpu_id, 0);
 332                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 333             } else if ((sel1 == 2) && (sel2 == 2)) {
 334                 /* LPAR CPUs */
 335                 struct sysib_222 sysib;
 336
 337                 memset(&sysib, 0, sizeof(sysib));
 338                 stw_p(&sysib.lpar_num, 0);
 339                 sysib.lcpuc = 0;
 340                 /* XXX change when SMP comes */
 341                 stw_p(&sysib.total_cpus, 1);
 342                 stw_p(&sysib.conf_cpus, 1);
 343                 stw_p(&sysib.standby_cpus, 0);
 344                 stw_p(&sysib.reserved_cpus, 0);
 345                 ebcdic_put(sysib.name, "QEMU    ", 8);
 346                 stl_p(&sysib.caf, 1000);
 347                 stw_p(&sysib.dedicated_cpus, 0);
 348                 stw_p(&sysib.shared_cpus, 0);
 349                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 350             } else {
 351                 cc = 3;
 352             }
 353             break;
 354         }
 355     case STSI_LEVEL_3:
 356         {
 357             if ((sel1 == 2) && (sel2 == 2)) {
 358                 /* VM CPUs */
 359                 struct sysib_322 sysib;
 360
 361                 memset(&sysib, 0, sizeof(sysib));
 362                 sysib.count = 1;
 363                 /* XXX change when SMP comes */
 364                 stw_p(&sysib.vm[0].total_cpus, 1);
 365                 stw_p(&sysib.vm[0].conf_cpus, 1);
 366                 stw_p(&sysib.vm[0].standby_cpus, 0);
 367                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 368                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 369                 stl_p(&sysib.vm[0].caf, 1000);
 370                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 371                 cpu_physical_memory_rw(a0, (uint8_t *)&sysib, sizeof(sysib), 1);
 372             } else {
 373                 cc = 3;
 374             }
 375             break;
 376         }
 377     case STSI_LEVEL_CURRENT:
 378         env->regs[0] = STSI_LEVEL_3;
 379         break;
 380     default:
 381         cc = 3;
 382         break;
 383     }
 384
 385     return cc;
 386 }
 387
 388 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 389                       uint64_t cpu_addr)
 390 {
 391     int cc = 0;
 392
 393     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 394                __func__, order_code, r1, cpu_addr);
 395
 396     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 397        as parameter (input). Status (output) is always R1. */
 398
 399     switch (order_code) {
 400     case SIGP_SET_ARCH:
 401         /* switch arch */
 402         break;
 403     case SIGP_SENSE:
 404         /* enumerate CPU status */
 405         if (cpu_addr) {
 406             /* XXX implement when SMP comes */
 407             return 3;
 408         }
 409         env->regs[r1] &= 0xffffffff00000000ULL;
 410         cc = 1;
 411         break;
 412 #if !defined(CONFIG_USER_ONLY)
 413     case SIGP_RESTART:
 414         qemu_system_reset_request();
 415         cpu_loop_exit(env);
 416         break;
 417     case SIGP_STOP:
 418         qemu_system_shutdown_request();
 419         cpu_loop_exit(env);
 420         break;
 421 #endif
 422     default:
 423         /* unknown sigp */
 424         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 425         cc = 3;
 426     }
 427
 428     return cc;
 429 }
 430 #endif