hw/timer/twl92230.c

   1 /*
   2  * TI TWL92230C energy-management companion device for the OMAP24xx.
   3  * Aka. Menelaus (N4200 MENELAUS1_V2.2)
   4  *
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Written by Andrzej Zaborowski <andrew@openedhand.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 or
  11  * (at your option) version 3 of the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qemu-common.h"
  24 #include "hw/hw.h"
  25 #include "qemu/timer.h"
  26 #include "hw/i2c/i2c.h"
  27 #include "sysemu/sysemu.h"
  28 #include "ui/console.h"
  29 #include "qemu/bcd.h"
  30 #include "qemu/module.h"
  31
  32 #define VERBOSE 1
  33
  34 #define TYPE_TWL92230 "twl92230"
  35 #define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230)
  36
  37 typedef struct MenelausState {
  38     I2CSlave parent_obj;
  39
  40     int firstbyte;
  41     uint8_t reg;
  42
  43     uint8_t vcore[5];
  44     uint8_t dcdc[3];
  45     uint8_t ldo[8];
  46     uint8_t sleep[2];
  47     uint8_t osc;
  48     uint8_t detect;
  49     uint16_t mask;
  50     uint16_t status;
  51     uint8_t dir;
  52     uint8_t inputs;
  53     uint8_t outputs;
  54     uint8_t bbsms;
  55     uint8_t pull[4];
  56     uint8_t mmc_ctrl[3];
  57     uint8_t mmc_debounce;
  58     struct {
  59         uint8_t ctrl;
  60         uint16_t comp;
  61         QEMUTimer *hz_tm;
  62         int64_t next;
  63         struct tm tm;
  64         struct tm new;
  65         struct tm alm;
  66         int sec_offset;
  67         int alm_sec;
  68         int next_comp;
  69     } rtc;
  70     uint16_t rtc_next_vmstate;
  71     qemu_irq out[4];
  72     uint8_t pwrbtn_state;
  73 } MenelausState;
  74
  75 static inline void menelaus_update(MenelausState *s)
  76 {
  77     qemu_set_irq(s->out[3], s->status & ~s->mask);
  78 }
  79
  80 static inline void menelaus_rtc_start(MenelausState *s)
  81 {
  82     s->rtc.next += qemu_clock_get_ms(rtc_clock);
  83     timer_mod(s->rtc.hz_tm, s->rtc.next);
  84 }
  85
  86 static inline void menelaus_rtc_stop(MenelausState *s)
  87 {
  88     timer_del(s->rtc.hz_tm);
  89     s->rtc.next -= qemu_clock_get_ms(rtc_clock);
  90     if (s->rtc.next < 1)
  91         s->rtc.next = 1;
  92 }
  93
  94 static void menelaus_rtc_update(MenelausState *s)
  95 {
  96     qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
  97 }
  98
  99 static void menelaus_alm_update(MenelausState *s)
 100 {
 101     if ((s->rtc.ctrl & 3) == 3)
 102         s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
 103 }
 104
 105 static void menelaus_rtc_hz(void *opaque)
 106 {
 107     MenelausState *s = (MenelausState *) opaque;
 108
 109     s->rtc.next_comp --;
 110     s->rtc.alm_sec --;
 111     s->rtc.next += 1000;
 112     timer_mod(s->rtc.hz_tm, s->rtc.next);
 113     if ((s->rtc.ctrl >> 3) & 3) {                               /* EVERY */
 114         menelaus_rtc_update(s);
 115         if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
 116             s->status |= 1 << 8;                                /* RTCTMR */
 117         else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
 118             s->status |= 1 << 8;                                /* RTCTMR */
 119         else if (!s->rtc.tm.tm_hour)
 120             s->status |= 1 << 8;                                /* RTCTMR */
 121     } else
 122         s->status |= 1 << 8;                                    /* RTCTMR */
 123     if ((s->rtc.ctrl >> 1) & 1) {                               /* RTC_AL_EN */
 124         if (s->rtc.alm_sec == 0)
 125             s->status |= 1 << 9;                                /* RTCALM */
 126         /* TODO: wake-up */
 127     }
 128     if (s->rtc.next_comp <= 0) {
 129         s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
 130         s->rtc.next_comp = 3600;
 131     }
 132     menelaus_update(s);
 133 }
 134
 135 static void menelaus_reset(I2CSlave *i2c)
 136 {
 137     MenelausState *s = TWL92230(i2c);
 138
 139     s->reg = 0x00;
 140
 141     s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check!  */
 142     s->vcore[1] = 0x05;
 143     s->vcore[2] = 0x02;
 144     s->vcore[3] = 0x0c;
 145     s->vcore[4] = 0x03;
 146     s->dcdc[0] = 0x33;  /* Depends on wiring */
 147     s->dcdc[1] = 0x03;
 148     s->dcdc[2] = 0x00;
 149     s->ldo[0] = 0x95;
 150     s->ldo[1] = 0x7e;
 151     s->ldo[2] = 0x00;
 152     s->ldo[3] = 0x00;   /* Depends on wiring */
 153     s->ldo[4] = 0x03;   /* Depends on wiring */
 154     s->ldo[5] = 0x00;
 155     s->ldo[6] = 0x00;
 156     s->ldo[7] = 0x00;
 157     s->sleep[0] = 0x00;
 158     s->sleep[1] = 0x00;
 159     s->osc = 0x01;
 160     s->detect = 0x09;
 161     s->mask = 0x0fff;
 162     s->status = 0;
 163     s->dir = 0x07;
 164     s->outputs = 0x00;
 165     s->bbsms = 0x00;
 166     s->pull[0] = 0x00;
 167     s->pull[1] = 0x00;
 168     s->pull[2] = 0x00;
 169     s->pull[3] = 0x00;
 170     s->mmc_ctrl[0] = 0x03;
 171     s->mmc_ctrl[1] = 0xc0;
 172     s->mmc_ctrl[2] = 0x00;
 173     s->mmc_debounce = 0x05;
 174
 175     if (s->rtc.ctrl & 1)
 176         menelaus_rtc_stop(s);
 177     s->rtc.ctrl = 0x00;
 178     s->rtc.comp = 0x0000;
 179     s->rtc.next = 1000;
 180     s->rtc.sec_offset = 0;
 181     s->rtc.next_comp = 1800;
 182     s->rtc.alm_sec = 1800;
 183     s->rtc.alm.tm_sec = 0x00;
 184     s->rtc.alm.tm_min = 0x00;
 185     s->rtc.alm.tm_hour = 0x00;
 186     s->rtc.alm.tm_mday = 0x01;
 187     s->rtc.alm.tm_mon = 0x00;
 188     s->rtc.alm.tm_year = 2004;
 189     menelaus_update(s);
 190 }
 191
 192 static void menelaus_gpio_set(void *opaque, int line, int level)
 193 {
 194     MenelausState *s = (MenelausState *) opaque;
 195
 196     if (line < 3) {
 197         /* No interrupt generated */
 198         s->inputs &= ~(1 << line);
 199         s->inputs |= level << line;
 200         return;
 201     }
 202
 203     if (!s->pwrbtn_state && level) {
 204         s->status |= 1 << 11;                                   /* PSHBTN */
 205         menelaus_update(s);
 206     }
 207     s->pwrbtn_state = level;
 208 }
 209
 210 #define MENELAUS_REV            0x01
 211 #define MENELAUS_VCORE_CTRL1    0x02
 212 #define MENELAUS_VCORE_CTRL2    0x03
 213 #define MENELAUS_VCORE_CTRL3    0x04
 214 #define MENELAUS_VCORE_CTRL4    0x05
 215 #define MENELAUS_VCORE_CTRL5    0x06
 216 #define MENELAUS_DCDC_CTRL1     0x07
 217 #define MENELAUS_DCDC_CTRL2     0x08
 218 #define MENELAUS_DCDC_CTRL3     0x09
 219 #define MENELAUS_LDO_CTRL1      0x0a
 220 #define MENELAUS_LDO_CTRL2      0x0b
 221 #define MENELAUS_LDO_CTRL3      0x0c
 222 #define MENELAUS_LDO_CTRL4      0x0d
 223 #define MENELAUS_LDO_CTRL5      0x0e
 224 #define MENELAUS_LDO_CTRL6      0x0f
 225 #define MENELAUS_LDO_CTRL7      0x10
 226 #define MENELAUS_LDO_CTRL8      0x11
 227 #define MENELAUS_SLEEP_CTRL1    0x12
 228 #define MENELAUS_SLEEP_CTRL2    0x13
 229 #define MENELAUS_DEVICE_OFF     0x14
 230 #define MENELAUS_OSC_CTRL       0x15
 231 #define MENELAUS_DETECT_CTRL    0x16
 232 #define MENELAUS_INT_MASK1      0x17
 233 #define MENELAUS_INT_MASK2      0x18
 234 #define MENELAUS_INT_STATUS1    0x19
 235 #define MENELAUS_INT_STATUS2    0x1a
 236 #define MENELAUS_INT_ACK1       0x1b
 237 #define MENELAUS_INT_ACK2       0x1c
 238 #define MENELAUS_GPIO_CTRL      0x1d
 239 #define MENELAUS_GPIO_IN        0x1e
 240 #define MENELAUS_GPIO_OUT       0x1f
 241 #define MENELAUS_BBSMS          0x20
 242 #define MENELAUS_RTC_CTRL       0x21
 243 #define MENELAUS_RTC_UPDATE     0x22
 244 #define MENELAUS_RTC_SEC        0x23
 245 #define MENELAUS_RTC_MIN        0x24
 246 #define MENELAUS_RTC_HR         0x25
 247 #define MENELAUS_RTC_DAY        0x26
 248 #define MENELAUS_RTC_MON        0x27
 249 #define MENELAUS_RTC_YR         0x28
 250 #define MENELAUS_RTC_WKDAY      0x29
 251 #define MENELAUS_RTC_AL_SEC     0x2a
 252 #define MENELAUS_RTC_AL_MIN     0x2b
 253 #define MENELAUS_RTC_AL_HR      0x2c
 254 #define MENELAUS_RTC_AL_DAY     0x2d
 255 #define MENELAUS_RTC_AL_MON     0x2e
 256 #define MENELAUS_RTC_AL_YR      0x2f
 257 #define MENELAUS_RTC_COMP_MSB   0x30
 258 #define MENELAUS_RTC_COMP_LSB   0x31
 259 #define MENELAUS_S1_PULL_EN     0x32
 260 #define MENELAUS_S1_PULL_DIR    0x33
 261 #define MENELAUS_S2_PULL_EN     0x34
 262 #define MENELAUS_S2_PULL_DIR    0x35
 263 #define MENELAUS_MCT_CTRL1      0x36
 264 #define MENELAUS_MCT_CTRL2      0x37
 265 #define MENELAUS_MCT_CTRL3      0x38
 266 #define MENELAUS_MCT_PIN_ST     0x39
 267 #define MENELAUS_DEBOUNCE1      0x3a
 268
 269 static uint8_t menelaus_read(void *opaque, uint8_t addr)
 270 {
 271     MenelausState *s = (MenelausState *) opaque;
 272     int reg = 0;
 273
 274     switch (addr) {
 275     case MENELAUS_REV:
 276         return 0x22;
 277
 278     case MENELAUS_VCORE_CTRL5: reg ++;
 279     case MENELAUS_VCORE_CTRL4: reg ++;
 280     case MENELAUS_VCORE_CTRL3: reg ++;
 281     case MENELAUS_VCORE_CTRL2: reg ++;
 282     case MENELAUS_VCORE_CTRL1:
 283         return s->vcore[reg];
 284
 285     case MENELAUS_DCDC_CTRL3: reg ++;
 286     case MENELAUS_DCDC_CTRL2: reg ++;
 287     case MENELAUS_DCDC_CTRL1:
 288         return s->dcdc[reg];
 289
 290     case MENELAUS_LDO_CTRL8: reg ++;
 291     case MENELAUS_LDO_CTRL7: reg ++;
 292     case MENELAUS_LDO_CTRL6: reg ++;
 293     case MENELAUS_LDO_CTRL5: reg ++;
 294     case MENELAUS_LDO_CTRL4: reg ++;
 295     case MENELAUS_LDO_CTRL3: reg ++;
 296     case MENELAUS_LDO_CTRL2: reg ++;
 297     case MENELAUS_LDO_CTRL1:
 298         return s->ldo[reg];
 299
 300     case MENELAUS_SLEEP_CTRL2: reg ++;
 301     case MENELAUS_SLEEP_CTRL1:
 302         return s->sleep[reg];
 303
 304     case MENELAUS_DEVICE_OFF:
 305         return 0;
 306
 307     case MENELAUS_OSC_CTRL:
 308         return s->osc | (1 << 7);                       /* CLK32K_GOOD */
 309
 310     case MENELAUS_DETECT_CTRL:
 311         return s->detect;
 312
 313     case MENELAUS_INT_MASK1:
 314         return (s->mask >> 0) & 0xff;
 315     case MENELAUS_INT_MASK2:
 316         return (s->mask >> 8) & 0xff;
 317
 318     case MENELAUS_INT_STATUS1:
 319         return (s->status >> 0) & 0xff;
 320     case MENELAUS_INT_STATUS2:
 321         return (s->status >> 8) & 0xff;
 322
 323     case MENELAUS_INT_ACK1:
 324     case MENELAUS_INT_ACK2:
 325         return 0;
 326
 327     case MENELAUS_GPIO_CTRL:
 328         return s->dir;
 329     case MENELAUS_GPIO_IN:
 330         return s->inputs | (~s->dir & s->outputs);
 331     case MENELAUS_GPIO_OUT:
 332         return s->outputs;
 333
 334     case MENELAUS_BBSMS:
 335         return s->bbsms;
 336
 337     case MENELAUS_RTC_CTRL:
 338         return s->rtc.ctrl;
 339     case MENELAUS_RTC_UPDATE:
 340         return 0x00;
 341     case MENELAUS_RTC_SEC:
 342         menelaus_rtc_update(s);
 343         return to_bcd(s->rtc.tm.tm_sec);
 344     case MENELAUS_RTC_MIN:
 345         menelaus_rtc_update(s);
 346         return to_bcd(s->rtc.tm.tm_min);
 347     case MENELAUS_RTC_HR:
 348         menelaus_rtc_update(s);
 349         if ((s->rtc.ctrl >> 2) & 1)                     /* MODE12_n24 */
 350             return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
 351                     (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
 352         else
 353             return to_bcd(s->rtc.tm.tm_hour);
 354     case MENELAUS_RTC_DAY:
 355         menelaus_rtc_update(s);
 356         return to_bcd(s->rtc.tm.tm_mday);
 357     case MENELAUS_RTC_MON:
 358         menelaus_rtc_update(s);
 359         return to_bcd(s->rtc.tm.tm_mon + 1);
 360     case MENELAUS_RTC_YR:
 361         menelaus_rtc_update(s);
 362         return to_bcd(s->rtc.tm.tm_year - 2000);
 363     case MENELAUS_RTC_WKDAY:
 364         menelaus_rtc_update(s);
 365         return to_bcd(s->rtc.tm.tm_wday);
 366     case MENELAUS_RTC_AL_SEC:
 367         return to_bcd(s->rtc.alm.tm_sec);
 368     case MENELAUS_RTC_AL_MIN:
 369         return to_bcd(s->rtc.alm.tm_min);
 370     case MENELAUS_RTC_AL_HR:
 371         if ((s->rtc.ctrl >> 2) & 1)                     /* MODE12_n24 */
 372             return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
 373                     (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
 374         else
 375             return to_bcd(s->rtc.alm.tm_hour);
 376     case MENELAUS_RTC_AL_DAY:
 377         return to_bcd(s->rtc.alm.tm_mday);
 378     case MENELAUS_RTC_AL_MON:
 379         return to_bcd(s->rtc.alm.tm_mon + 1);
 380     case MENELAUS_RTC_AL_YR:
 381         return to_bcd(s->rtc.alm.tm_year - 2000);
 382     case MENELAUS_RTC_COMP_MSB:
 383         return (s->rtc.comp >> 8) & 0xff;
 384     case MENELAUS_RTC_COMP_LSB:
 385         return (s->rtc.comp >> 0) & 0xff;
 386
 387     case MENELAUS_S1_PULL_EN:
 388         return s->pull[0];
 389     case MENELAUS_S1_PULL_DIR:
 390         return s->pull[1];
 391     case MENELAUS_S2_PULL_EN:
 392         return s->pull[2];
 393     case MENELAUS_S2_PULL_DIR:
 394         return s->pull[3];
 395
 396     case MENELAUS_MCT_CTRL3: reg ++;
 397     case MENELAUS_MCT_CTRL2: reg ++;
 398     case MENELAUS_MCT_CTRL1:
 399         return s->mmc_ctrl[reg];
 400     case MENELAUS_MCT_PIN_ST:
 401         /* TODO: return the real Card Detect */
 402         return 0;
 403     case MENELAUS_DEBOUNCE1:
 404         return s->mmc_debounce;
 405
 406     default:
 407 #ifdef VERBOSE
 408         printf("%s: unknown register %02x\n", __func__, addr);
 409 #endif
 410         break;
 411     }
 412     return 0;
 413 }
 414
 415 static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
 416 {
 417     MenelausState *s = (MenelausState *) opaque;
 418     int line;
 419     int reg = 0;
 420     struct tm tm;
 421
 422     switch (addr) {
 423     case MENELAUS_VCORE_CTRL1:
 424         s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
 425         break;
 426     case MENELAUS_VCORE_CTRL2:
 427         s->vcore[1] = value;
 428         break;
 429     case MENELAUS_VCORE_CTRL3:
 430         s->vcore[2] = MIN(value & 0x1f, 0x12);
 431         break;
 432     case MENELAUS_VCORE_CTRL4:
 433         s->vcore[3] = MIN(value & 0x1f, 0x12);
 434         break;
 435     case MENELAUS_VCORE_CTRL5:
 436         s->vcore[4] = value & 3;
 437         /* XXX
 438          * auto set to 3 on M_Active, nRESWARM
 439          * auto set to 0 on M_WaitOn, M_Backup
 440          */
 441         break;
 442
 443     case MENELAUS_DCDC_CTRL1:
 444         s->dcdc[0] = value & 0x3f;
 445         break;
 446     case MENELAUS_DCDC_CTRL2:
 447         s->dcdc[1] = value & 0x07;
 448         /* XXX
 449          * auto set to 3 on M_Active, nRESWARM
 450          * auto set to 0 on M_WaitOn, M_Backup
 451          */
 452         break;
 453     case MENELAUS_DCDC_CTRL3:
 454         s->dcdc[2] = value & 0x07;
 455         break;
 456
 457     case MENELAUS_LDO_CTRL1:
 458         s->ldo[0] = value;
 459         break;
 460     case MENELAUS_LDO_CTRL2:
 461         s->ldo[1] = value & 0x7f;
 462         /* XXX
 463          * auto set to 0x7e on M_WaitOn, M_Backup
 464          */
 465         break;
 466     case MENELAUS_LDO_CTRL3:
 467         s->ldo[2] = value & 3;
 468         /* XXX
 469          * auto set to 3 on M_Active, nRESWARM
 470          * auto set to 0 on M_WaitOn, M_Backup
 471          */
 472         break;
 473     case MENELAUS_LDO_CTRL4:
 474         s->ldo[3] = value & 3;
 475         /* XXX
 476          * auto set to 3 on M_Active, nRESWARM
 477          * auto set to 0 on M_WaitOn, M_Backup
 478          */
 479         break;
 480     case MENELAUS_LDO_CTRL5:
 481         s->ldo[4] = value & 3;
 482         /* XXX
 483          * auto set to 3 on M_Active, nRESWARM
 484          * auto set to 0 on M_WaitOn, M_Backup
 485          */
 486         break;
 487     case MENELAUS_LDO_CTRL6:
 488         s->ldo[5] = value & 3;
 489         break;
 490     case MENELAUS_LDO_CTRL7:
 491         s->ldo[6] = value & 3;
 492         break;
 493     case MENELAUS_LDO_CTRL8:
 494         s->ldo[7] = value & 3;
 495         break;
 496
 497     case MENELAUS_SLEEP_CTRL2: reg ++;
 498     case MENELAUS_SLEEP_CTRL1:
 499         s->sleep[reg] = value;
 500         break;
 501
 502     case MENELAUS_DEVICE_OFF:
 503         if (value & 1) {
 504             menelaus_reset(I2C_SLAVE(s));
 505         }
 506         break;
 507
 508     case MENELAUS_OSC_CTRL:
 509         s->osc = value & 7;
 510         break;
 511
 512     case MENELAUS_DETECT_CTRL:
 513         s->detect = value & 0x7f;
 514         break;
 515
 516     case MENELAUS_INT_MASK1:
 517         s->mask &= 0xf00;
 518         s->mask |= value << 0;
 519         menelaus_update(s);
 520         break;
 521     case MENELAUS_INT_MASK2:
 522         s->mask &= 0x0ff;
 523         s->mask |= value << 8;
 524         menelaus_update(s);
 525         break;
 526
 527     case MENELAUS_INT_ACK1:
 528         s->status &= ~(((uint16_t) value) << 0);
 529         menelaus_update(s);
 530         break;
 531     case MENELAUS_INT_ACK2:
 532         s->status &= ~(((uint16_t) value) << 8);
 533         menelaus_update(s);
 534         break;
 535
 536     case MENELAUS_GPIO_CTRL:
 537         for (line = 0; line < 3; line ++) {
 538             if (((s->dir ^ value) >> line) & 1) {
 539                 qemu_set_irq(s->out[line],
 540                              ((s->outputs & ~s->dir) >> line) & 1);
 541             }
 542         }
 543         s->dir = value & 0x67;
 544         break;
 545     case MENELAUS_GPIO_OUT:
 546         for (line = 0; line < 3; line ++) {
 547             if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) {
 548                 qemu_set_irq(s->out[line], (s->outputs >> line) & 1);
 549             }
 550         }
 551         s->outputs = value & 0x07;
 552         break;
 553
 554     case MENELAUS_BBSMS:
 555         s->bbsms = 0x0d;
 556         break;
 557
 558     case MENELAUS_RTC_CTRL:
 559         if ((s->rtc.ctrl ^ value) & 1) {                        /* RTC_EN */
 560             if (value & 1)
 561                 menelaus_rtc_start(s);
 562             else
 563                 menelaus_rtc_stop(s);
 564         }
 565         s->rtc.ctrl = value & 0x1f;
 566         menelaus_alm_update(s);
 567         break;
 568     case MENELAUS_RTC_UPDATE:
 569         menelaus_rtc_update(s);
 570         memcpy(&tm, &s->rtc.tm, sizeof(tm));
 571         switch (value & 0xf) {
 572         case 0:
 573             break;
 574         case 1:
 575             tm.tm_sec = s->rtc.new.tm_sec;
 576             break;
 577         case 2:
 578             tm.tm_min = s->rtc.new.tm_min;
 579             break;
 580         case 3:
 581             if (s->rtc.new.tm_hour > 23)
 582                 goto rtc_badness;
 583             tm.tm_hour = s->rtc.new.tm_hour;
 584             break;
 585         case 4:
 586             if (s->rtc.new.tm_mday < 1)
 587                 goto rtc_badness;
 588             /* TODO check range */
 589             tm.tm_mday = s->rtc.new.tm_mday;
 590             break;
 591         case 5:
 592             if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
 593                 goto rtc_badness;
 594             tm.tm_mon = s->rtc.new.tm_mon;
 595             break;
 596         case 6:
 597             tm.tm_year = s->rtc.new.tm_year;
 598             break;
 599         case 7:
 600             /* TODO set .tm_mday instead */
 601             tm.tm_wday = s->rtc.new.tm_wday;
 602             break;
 603         case 8:
 604             if (s->rtc.new.tm_hour > 23)
 605                 goto rtc_badness;
 606             if (s->rtc.new.tm_mday < 1)
 607                 goto rtc_badness;
 608             if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
 609                 goto rtc_badness;
 610             tm.tm_sec = s->rtc.new.tm_sec;
 611             tm.tm_min = s->rtc.new.tm_min;
 612             tm.tm_hour = s->rtc.new.tm_hour;
 613             tm.tm_mday = s->rtc.new.tm_mday;
 614             tm.tm_mon = s->rtc.new.tm_mon;
 615             tm.tm_year = s->rtc.new.tm_year;
 616             break;
 617         rtc_badness:
 618         default:
 619             fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
 620                             __func__, value);
 621             s->status |= 1 << 10;                               /* RTCERR */
 622             menelaus_update(s);
 623         }
 624         s->rtc.sec_offset = qemu_timedate_diff(&tm);
 625         break;
 626     case MENELAUS_RTC_SEC:
 627         s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
 628         break;
 629     case MENELAUS_RTC_MIN:
 630         s->rtc.tm.tm_min = from_bcd(value & 0x7f);
 631         break;
 632     case MENELAUS_RTC_HR:
 633         s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ?  /* MODE12_n24 */
 634                 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
 635                 from_bcd(value & 0x3f);
 636         break;
 637     case MENELAUS_RTC_DAY:
 638         s->rtc.tm.tm_mday = from_bcd(value);
 639         break;
 640     case MENELAUS_RTC_MON:
 641         s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
 642         break;
 643     case MENELAUS_RTC_YR:
 644         s->rtc.tm.tm_year = 2000 + from_bcd(value);
 645         break;
 646     case MENELAUS_RTC_WKDAY:
 647         s->rtc.tm.tm_mday = from_bcd(value);
 648         break;
 649     case MENELAUS_RTC_AL_SEC:
 650         s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
 651         menelaus_alm_update(s);
 652         break;
 653     case MENELAUS_RTC_AL_MIN:
 654         s->rtc.alm.tm_min = from_bcd(value & 0x7f);
 655         menelaus_alm_update(s);
 656         break;
 657     case MENELAUS_RTC_AL_HR:
 658         s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
 659                 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
 660                 from_bcd(value & 0x3f);
 661         menelaus_alm_update(s);
 662         break;
 663     case MENELAUS_RTC_AL_DAY:
 664         s->rtc.alm.tm_mday = from_bcd(value);
 665         menelaus_alm_update(s);
 666         break;
 667     case MENELAUS_RTC_AL_MON:
 668         s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
 669         menelaus_alm_update(s);
 670         break;
 671     case MENELAUS_RTC_AL_YR:
 672         s->rtc.alm.tm_year = 2000 + from_bcd(value);
 673         menelaus_alm_update(s);
 674         break;
 675     case MENELAUS_RTC_COMP_MSB:
 676         s->rtc.comp &= 0xff;
 677         s->rtc.comp |= value << 8;
 678         break;
 679     case MENELAUS_RTC_COMP_LSB:
 680         s->rtc.comp &= 0xff << 8;
 681         s->rtc.comp |= value;
 682         break;
 683
 684     case MENELAUS_S1_PULL_EN:
 685         s->pull[0] = value;
 686         break;
 687     case MENELAUS_S1_PULL_DIR:
 688         s->pull[1] = value & 0x1f;
 689         break;
 690     case MENELAUS_S2_PULL_EN:
 691         s->pull[2] = value;
 692         break;
 693     case MENELAUS_S2_PULL_DIR:
 694         s->pull[3] = value & 0x1f;
 695         break;
 696
 697     case MENELAUS_MCT_CTRL1:
 698         s->mmc_ctrl[0] = value & 0x7f;
 699         break;
 700     case MENELAUS_MCT_CTRL2:
 701         s->mmc_ctrl[1] = value;
 702         /* TODO update Card Detect interrupts */
 703         break;
 704     case MENELAUS_MCT_CTRL3:
 705         s->mmc_ctrl[2] = value & 0xf;
 706         break;
 707     case MENELAUS_DEBOUNCE1:
 708         s->mmc_debounce = value & 0x3f;
 709         break;
 710
 711     default:
 712 #ifdef VERBOSE
 713         printf("%s: unknown register %02x\n", __func__, addr);
 714 #endif
 715     }
 716 }
 717
 718 static int menelaus_event(I2CSlave *i2c, enum i2c_event event)
 719 {
 720     MenelausState *s = TWL92230(i2c);
 721
 722     if (event == I2C_START_SEND)
 723         s->firstbyte = 1;
 724
 725     return 0;
 726 }
 727
 728 static int menelaus_tx(I2CSlave *i2c, uint8_t data)
 729 {
 730     MenelausState *s = TWL92230(i2c);
 731
 732     /* Interpret register address byte */
 733     if (s->firstbyte) {
 734         s->reg = data;
 735         s->firstbyte = 0;
 736     } else
 737         menelaus_write(s, s->reg ++, data);
 738
 739     return 0;
 740 }
 741
 742 static uint8_t menelaus_rx(I2CSlave *i2c)
 743 {
 744     MenelausState *s = TWL92230(i2c);
 745
 746     return menelaus_read(s, s->reg ++);
 747 }
 748
 749 /* Save restore 32 bit int as uint16_t
 750    This is a Big hack, but it is how the old state did it.
 751    Or we broke compatibility in the state, or we can't use struct tm
 752  */
 753
 754 static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size,
 755                                const VMStateField *field)
 756 {
 757     int *v = pv;
 758     *v = qemu_get_be16(f);
 759     return 0;
 760 }
 761
 762 static int put_int32_as_uint16(QEMUFile *f, void *pv, size_t size,
 763                                const VMStateField *field, QJSON *vmdesc)
 764 {
 765     int *v = pv;
 766     qemu_put_be16(f, *v);
 767
 768     return 0;
 769 }
 770
 771 static const VMStateInfo vmstate_hack_int32_as_uint16 = {
 772     .name = "int32_as_uint16",
 773     .get  = get_int32_as_uint16,
 774     .put  = put_int32_as_uint16,
 775 };
 776
 777 #define VMSTATE_UINT16_HACK(_f, _s)                                  \
 778     VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t)
 779
 780
 781 static const VMStateDescription vmstate_menelaus_tm = {
 782     .name = "menelaus_tm",
 783     .version_id = 0,
 784     .minimum_version_id = 0,
 785     .fields = (VMStateField[]) {
 786         VMSTATE_UINT16_HACK(tm_sec, struct tm),
 787         VMSTATE_UINT16_HACK(tm_min, struct tm),
 788         VMSTATE_UINT16_HACK(tm_hour, struct tm),
 789         VMSTATE_UINT16_HACK(tm_mday, struct tm),
 790         VMSTATE_UINT16_HACK(tm_min, struct tm),
 791         VMSTATE_UINT16_HACK(tm_year, struct tm),
 792         VMSTATE_END_OF_LIST()
 793     }
 794 };
 795
 796 static int menelaus_pre_save(void *opaque)
 797 {
 798     MenelausState *s = opaque;
 799     /* Should be <= 1000 */
 800     s->rtc_next_vmstate =  s->rtc.next - qemu_clock_get_ms(rtc_clock);
 801
 802     return 0;
 803 }
 804
 805 static int menelaus_post_load(void *opaque, int version_id)
 806 {
 807     MenelausState *s = opaque;
 808
 809     if (s->rtc.ctrl & 1)                                        /* RTC_EN */
 810         menelaus_rtc_stop(s);
 811
 812     s->rtc.next = s->rtc_next_vmstate;
 813
 814     menelaus_alm_update(s);
 815     menelaus_update(s);
 816     if (s->rtc.ctrl & 1)                                        /* RTC_EN */
 817         menelaus_rtc_start(s);
 818     return 0;
 819 }
 820
 821 static const VMStateDescription vmstate_menelaus = {
 822     .name = "menelaus",
 823     .version_id = 0,
 824     .minimum_version_id = 0,
 825     .pre_save = menelaus_pre_save,
 826     .post_load = menelaus_post_load,
 827     .fields = (VMStateField[]) {
 828         VMSTATE_INT32(firstbyte, MenelausState),
 829         VMSTATE_UINT8(reg, MenelausState),
 830         VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5),
 831         VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3),
 832         VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8),
 833         VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2),
 834         VMSTATE_UINT8(osc, MenelausState),
 835         VMSTATE_UINT8(detect, MenelausState),
 836         VMSTATE_UINT16(mask, MenelausState),
 837         VMSTATE_UINT16(status, MenelausState),
 838         VMSTATE_UINT8(dir, MenelausState),
 839         VMSTATE_UINT8(inputs, MenelausState),
 840         VMSTATE_UINT8(outputs, MenelausState),
 841         VMSTATE_UINT8(bbsms, MenelausState),
 842         VMSTATE_UINT8_ARRAY(pull, MenelausState, 4),
 843         VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3),
 844         VMSTATE_UINT8(mmc_debounce, MenelausState),
 845         VMSTATE_UINT8(rtc.ctrl, MenelausState),
 846         VMSTATE_UINT16(rtc.comp, MenelausState),
 847         VMSTATE_UINT16(rtc_next_vmstate, MenelausState),
 848         VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm,
 849                        struct tm),
 850         VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm,
 851                        struct tm),
 852         VMSTATE_UINT8(pwrbtn_state, MenelausState),
 853         VMSTATE_I2C_SLAVE(parent_obj, MenelausState),
 854         VMSTATE_END_OF_LIST()
 855     }
 856 };
 857
 858 static void twl92230_realize(DeviceState *dev, Error **errp)
 859 {
 860     MenelausState *s = TWL92230(dev);
 861
 862     s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s);
 863     /* Three output pins plus one interrupt pin.  */
 864     qdev_init_gpio_out(dev, s->out, 4);
 865
 866     /* Three input pins plus one power-button pin.  */
 867     qdev_init_gpio_in(dev, menelaus_gpio_set, 4);
 868
 869     menelaus_reset(I2C_SLAVE(dev));
 870 }
 871
 872 static void twl92230_class_init(ObjectClass *klass, void *data)
 873 {
 874     DeviceClass *dc = DEVICE_CLASS(klass);
 875     I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
 876
 877     dc->realize = twl92230_realize;
 878     sc->event = menelaus_event;
 879     sc->recv = menelaus_rx;
 880     sc->send = menelaus_tx;
 881     dc->vmsd = &vmstate_menelaus;
 882 }
 883
 884 static const TypeInfo twl92230_info = {
 885     .name          = TYPE_TWL92230,
 886     .parent        = TYPE_I2C_SLAVE,
 887     .instance_size = sizeof(MenelausState),
 888     .class_init    = twl92230_class_init,
 889 };
 890
 891 static void twl92230_register_types(void)
 892 {
 893     type_register_static(&twl92230_info);
 894 }
 895
 896 type_init(twl92230_register_types)