hw/sparc/leon3.c

   1 /*
   2  * QEMU Leon3 System Emulator
   3  *
   4  * Copyright (c) 2010-2019 AdaCore
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "qemu/osdep.h"
  25 #include "qemu/units.h"
  26 #include "qemu/error-report.h"
  27 #include "qapi/error.h"
  28 #include "qemu-common.h"
  29 #include "cpu.h"
  30 #include "hw/hw.h"
  31 #include "qemu/timer.h"
  32 #include "hw/ptimer.h"
  33 #include "sysemu/sysemu.h"
  34 #include "sysemu/qtest.h"
  35 #include "hw/boards.h"
  36 #include "hw/loader.h"
  37 #include "elf.h"
  38 #include "trace.h"
  39 #include "exec/address-spaces.h"
  40
  41 #include "hw/sparc/grlib.h"
  42 #include "hw/misc/grlib_ahb_apb_pnp.h"
  43
  44 /* Default system clock.  */
  45 #define CPU_CLK (40 * 1000 * 1000)
  46
  47 #define LEON3_PROM_FILENAME "u-boot.bin"
  48 #define LEON3_PROM_OFFSET    (0x00000000)
  49 #define LEON3_RAM_OFFSET     (0x40000000)
  50
  51 #define MAX_PILS 16
  52
  53 #define LEON3_UART_OFFSET  (0x80000100)
  54 #define LEON3_UART_IRQ     (3)
  55
  56 #define LEON3_IRQMP_OFFSET (0x80000200)
  57
  58 #define LEON3_TIMER_OFFSET (0x80000300)
  59 #define LEON3_TIMER_IRQ    (6)
  60 #define LEON3_TIMER_COUNT  (2)
  61
  62 #define LEON3_APB_PNP_OFFSET (0x800FF000)
  63 #define LEON3_AHB_PNP_OFFSET (0xFFFFF000)
  64
  65 typedef struct ResetData {
  66     SPARCCPU *cpu;
  67     uint32_t  entry;            /* save kernel entry in case of reset */
  68     target_ulong sp;            /* initial stack pointer */
  69 } ResetData;
  70
  71 static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val)
  72 {
  73     stl_p(code++, 0x82100000); /* mov %g0, %g1                */
  74     stl_p(code++, 0x84100000); /* mov %g0, %g2                */
  75     stl_p(code++, 0x03000000 +
  76       extract32(addr, 10, 22));
  77                                /* sethi %hi(addr), %g1        */
  78     stl_p(code++, 0x82106000 +
  79       extract32(addr, 0, 10));
  80                                /* or %g1, addr, %g1           */
  81     stl_p(code++, 0x05000000 +
  82       extract32(val, 10, 22));
  83                                /* sethi %hi(val), %g2         */
  84     stl_p(code++, 0x8410a000 +
  85       extract32(val, 0, 10));
  86                                /* or %g2, val, %g2            */
  87     stl_p(code++, 0xc4204000); /* st %g2, [ %g1 ]             */
  88
  89     return code;
  90 }
  91
  92 /*
  93  * When loading a kernel in RAM the machine is expected to be in a different
  94  * state (eg: initialized by the bootloader). This little code reproduces
  95  * this behavior.
  96  */
  97 static void write_bootloader(CPUSPARCState *env, uint8_t *base,
  98                              hwaddr kernel_addr)
  99 {
 100     uint32_t *p = (uint32_t *) base;
 101
 102     /* Initialize the UARTs                                        */
 103     /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */
 104     p = gen_store_u32(p, 0x80000108, 3);
 105
 106     /* Initialize the TIMER 0                                      */
 107     /* *GPTIMER_SCALER_RELOAD = 40 - 1;                            */
 108     p = gen_store_u32(p, 0x80000304, 39);
 109     /* *GPTIMER0_COUNTER_RELOAD = 0xFFFE;                          */
 110     p = gen_store_u32(p, 0x80000314, 0xFFFFFFFE);
 111     /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART;        */
 112     p = gen_store_u32(p, 0x80000318, 3);
 113
 114     /* JUMP to the entry point                                     */
 115     stl_p(p++, 0x82100000); /* mov %g0, %g1 */
 116     stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22));
 117                             /* sethi %hi(kernel_addr), %g1 */
 118     stl_p(p++, 0x82106000 + extract32(kernel_addr, 0, 10));
 119                             /* or kernel_addr, %g1 */
 120     stl_p(p++, 0x81c04000); /* jmp  %g1 */
 121     stl_p(p++, 0x01000000); /* nop */
 122 }
 123
 124 static void main_cpu_reset(void *opaque)
 125 {
 126     ResetData *s   = (ResetData *)opaque;
 127     CPUState *cpu = CPU(s->cpu);
 128     CPUSPARCState  *env = &s->cpu->env;
 129
 130     cpu_reset(cpu);
 131
 132     cpu->halted = 0;
 133     env->pc     = s->entry;
 134     env->npc    = s->entry + 4;
 135     env->regbase[6] = s->sp;
 136 }
 137
 138 void leon3_irq_ack(void *irq_manager, int intno)
 139 {
 140     grlib_irqmp_ack((DeviceState *)irq_manager, intno);
 141 }
 142
 143 static void leon3_set_pil_in(void *opaque, uint32_t pil_in)
 144 {
 145     CPUSPARCState *env = (CPUSPARCState *)opaque;
 146     CPUState *cs;
 147
 148     assert(env != NULL);
 149
 150     env->pil_in = pil_in;
 151
 152     if (env->pil_in && (env->interrupt_index == 0 ||
 153                         (env->interrupt_index & ~15) == TT_EXTINT)) {
 154         unsigned int i;
 155
 156         for (i = 15; i > 0; i--) {
 157             if (env->pil_in & (1 << i)) {
 158                 int old_interrupt = env->interrupt_index;
 159
 160                 env->interrupt_index = TT_EXTINT | i;
 161                 if (old_interrupt != env->interrupt_index) {
 162                     cs = env_cpu(env);
 163                     trace_leon3_set_irq(i);
 164                     cpu_interrupt(cs, CPU_INTERRUPT_HARD);
 165                 }
 166                 break;
 167             }
 168         }
 169     } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
 170         cs = env_cpu(env);
 171         trace_leon3_reset_irq(env->interrupt_index & 15);
 172         env->interrupt_index = 0;
 173         cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
 174     }
 175 }
 176
 177 static void leon3_generic_hw_init(MachineState *machine)
 178 {
 179     ram_addr_t ram_size = machine->ram_size;
 180     const char *kernel_filename = machine->kernel_filename;
 181     SPARCCPU *cpu;
 182     CPUSPARCState   *env;
 183     MemoryRegion *address_space_mem = get_system_memory();
 184     MemoryRegion *ram = g_new(MemoryRegion, 1);
 185     MemoryRegion *prom = g_new(MemoryRegion, 1);
 186     int         ret;
 187     char       *filename;
 188     qemu_irq   *cpu_irqs = NULL;
 189     int         bios_size;
 190     int         prom_size;
 191     ResetData  *reset_info;
 192     DeviceState *dev;
 193     int i;
 194     AHBPnp *ahb_pnp;
 195     APBPnp *apb_pnp;
 196
 197     /* Init CPU */
 198     cpu = SPARC_CPU(cpu_create(machine->cpu_type));
 199     env = &cpu->env;
 200
 201     cpu_sparc_set_id(env, 0);
 202
 203     /* Reset data */
 204     reset_info        = g_malloc0(sizeof(ResetData));
 205     reset_info->cpu   = cpu;
 206     reset_info->sp    = LEON3_RAM_OFFSET + ram_size;
 207     qemu_register_reset(main_cpu_reset, reset_info);
 208
 209     ahb_pnp = GRLIB_AHB_PNP(object_new(TYPE_GRLIB_AHB_PNP));
 210     object_property_set_bool(OBJECT(ahb_pnp), true, "realized", &error_fatal);
 211     sysbus_mmio_map(SYS_BUS_DEVICE(ahb_pnp), 0, LEON3_AHB_PNP_OFFSET);
 212     grlib_ahb_pnp_add_entry(ahb_pnp, 0, 0, GRLIB_VENDOR_GAISLER,
 213                             GRLIB_LEON3_DEV, GRLIB_AHB_MASTER,
 214                             GRLIB_CPU_AREA);
 215
 216     apb_pnp = GRLIB_APB_PNP(object_new(TYPE_GRLIB_APB_PNP));
 217     object_property_set_bool(OBJECT(apb_pnp), true, "realized", &error_fatal);
 218     sysbus_mmio_map(SYS_BUS_DEVICE(apb_pnp), 0, LEON3_APB_PNP_OFFSET);
 219     grlib_ahb_pnp_add_entry(ahb_pnp, LEON3_APB_PNP_OFFSET, 0xFFF,
 220                             GRLIB_VENDOR_GAISLER, GRLIB_APBMST_DEV,
 221                             GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA);
 222
 223     /* Allocate IRQ manager */
 224     dev = qdev_create(NULL, TYPE_GRLIB_IRQMP);
 225     qdev_prop_set_ptr(dev, "set_pil_in", leon3_set_pil_in);
 226     qdev_prop_set_ptr(dev, "set_pil_in_opaque", env);
 227     qdev_init_nofail(dev);
 228     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET);
 229     env->irq_manager = dev;
 230     env->qemu_irq_ack = leon3_irq_manager;
 231     cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS);
 232     grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF,
 233                             GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV,
 234                             2, 0, GRLIB_APBIO_AREA);
 235
 236     /* Allocate RAM */
 237     if (ram_size > 1 * GiB) {
 238         error_report("Too much memory for this machine: %" PRId64 "MB,"
 239                      " maximum 1G",
 240                      ram_size / MiB);
 241         exit(1);
 242     }
 243
 244     memory_region_allocate_system_memory(ram, NULL, "leon3.ram", ram_size);
 245     memory_region_add_subregion(address_space_mem, LEON3_RAM_OFFSET, ram);
 246
 247     /* Allocate BIOS */
 248     prom_size = 8 * MiB;
 249     memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size, &error_fatal);
 250     memory_region_set_readonly(prom, true);
 251     memory_region_add_subregion(address_space_mem, LEON3_PROM_OFFSET, prom);
 252
 253     /* Load boot prom */
 254     if (bios_name == NULL) {
 255         bios_name = LEON3_PROM_FILENAME;
 256     }
 257     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 258
 259     if (filename) {
 260         bios_size = get_image_size(filename);
 261     } else {
 262         bios_size = -1;
 263     }
 264
 265     if (bios_size > prom_size) {
 266         error_report("could not load prom '%s': file too big", filename);
 267         exit(1);
 268     }
 269
 270     if (bios_size > 0) {
 271         ret = load_image_targphys(filename, LEON3_PROM_OFFSET, bios_size);
 272         if (ret < 0 || ret > prom_size) {
 273             error_report("could not load prom '%s'", filename);
 274             exit(1);
 275         }
 276     } else if (kernel_filename == NULL && !qtest_enabled()) {
 277         error_report("Can't read bios image '%s'", filename
 278                                                    ? filename
 279                                                    : LEON3_PROM_FILENAME);
 280         exit(1);
 281     }
 282     g_free(filename);
 283
 284     /* Can directly load an application. */
 285     if (kernel_filename != NULL) {
 286         long     kernel_size;
 287         uint64_t entry;
 288
 289         kernel_size = load_elf(kernel_filename, NULL, NULL, NULL,
 290                                &entry, NULL, NULL,
 291                                1 /* big endian */, EM_SPARC, 0, 0);
 292         if (kernel_size < 0) {
 293             kernel_size = load_uimage(kernel_filename, NULL, &entry,
 294                                       NULL, NULL, NULL);
 295         }
 296         if (kernel_size < 0) {
 297             error_report("could not load kernel '%s'", kernel_filename);
 298             exit(1);
 299         }
 300         if (bios_size <= 0) {
 301             /*
 302              * If there is no bios/monitor just start the application but put
 303              * the machine in an initialized state through a little
 304              * bootloader.
 305              */
 306             uint8_t *bootloader_entry;
 307
 308             bootloader_entry = memory_region_get_ram_ptr(prom);
 309             write_bootloader(env, bootloader_entry, entry);
 310             env->pc = LEON3_PROM_OFFSET;
 311             env->npc = LEON3_PROM_OFFSET + 4;
 312             reset_info->entry = LEON3_PROM_OFFSET;
 313         }
 314     }
 315
 316     /* Allocate timers */
 317     dev = qdev_create(NULL, TYPE_GRLIB_GPTIMER);
 318     qdev_prop_set_uint32(dev, "nr-timers", LEON3_TIMER_COUNT);
 319     qdev_prop_set_uint32(dev, "frequency", CPU_CLK);
 320     qdev_prop_set_uint32(dev, "irq-line", LEON3_TIMER_IRQ);
 321     qdev_init_nofail(dev);
 322
 323     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET);
 324     for (i = 0; i < LEON3_TIMER_COUNT; i++) {
 325         sysbus_connect_irq(SYS_BUS_DEVICE(dev), i,
 326                            cpu_irqs[LEON3_TIMER_IRQ + i]);
 327     }
 328
 329     grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF,
 330                             GRLIB_VENDOR_GAISLER, GRLIB_GPTIMER_DEV,
 331                             0, LEON3_TIMER_IRQ, GRLIB_APBIO_AREA);
 332
 333     /* Allocate uart */
 334     if (serial_hd(0)) {
 335         dev = qdev_create(NULL, TYPE_GRLIB_APB_UART);
 336         qdev_prop_set_chr(dev, "chrdev", serial_hd(0));
 337         qdev_init_nofail(dev);
 338         sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET);
 339         sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]);
 340         grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF,
 341                                 GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1,
 342                                 LEON3_UART_IRQ, GRLIB_APBIO_AREA);
 343     }
 344 }
 345
 346 static void leon3_generic_machine_init(MachineClass *mc)
 347 {
 348     mc->desc = "Leon-3 generic";
 349     mc->init = leon3_generic_hw_init;
 350     mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
 351 }
 352
 353 DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)