2 * QEMU Uninorth PCI host (for all Mac99 and newer machines)
4 * Copyright (c) 2006 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 #include "qemu/osdep.h"
27 #include "hw/ppc/mac.h"
28 #include "qemu/module.h"
29 #include "hw/pci/pci.h"
30 #include "hw/pci/pci_host.h"
31 #include "hw/pci-host/uninorth.h"
34 static const int unin_irq_line
[] = { 0x1b, 0x1c, 0x1d, 0x1e };
36 static int pci_unin_map_irq(PCIDevice
*pci_dev
, int irq_num
)
38 return (irq_num
+ (pci_dev
->devfn
>> 3)) & 3;
41 static void pci_unin_set_irq(void *opaque
, int irq_num
, int level
)
43 UNINHostState
*s
= opaque
;
45 trace_unin_set_irq(unin_irq_line
[irq_num
], level
);
46 qemu_set_irq(s
->irqs
[irq_num
], level
);
49 static uint32_t unin_get_config_reg(uint32_t reg
, uint32_t addr
)
53 if (reg
& (1u << 31)) {
54 /* XXX OpenBIOS compatibility hack */
55 retval
= reg
| (addr
& 3);
58 retval
= (reg
& ~7u) | (addr
& 7);
62 /* Grab CFA0 style values */
63 slot
= ctz32(reg
& 0xfffff800);
65 slot
= -1; /* XXX: should this be 0? */
67 func
= (reg
>> 8) & 7;
69 /* ... and then convert them to x86 format */
71 retval
= (reg
& (0xff - 7)) | (addr
& 7);
78 trace_unin_get_config_reg(reg
, addr
, retval
);
83 static void unin_data_write(void *opaque
, hwaddr addr
,
84 uint64_t val
, unsigned len
)
86 UNINHostState
*s
= opaque
;
87 PCIHostState
*phb
= PCI_HOST_BRIDGE(s
);
88 trace_unin_data_write(addr
, len
, val
);
89 pci_data_write(phb
->bus
,
90 unin_get_config_reg(phb
->config_reg
, addr
),
94 static uint64_t unin_data_read(void *opaque
, hwaddr addr
,
97 UNINHostState
*s
= opaque
;
98 PCIHostState
*phb
= PCI_HOST_BRIDGE(s
);
101 val
= pci_data_read(phb
->bus
,
102 unin_get_config_reg(phb
->config_reg
, addr
),
104 trace_unin_data_read(addr
, len
, val
);
108 static const MemoryRegionOps unin_data_ops
= {
109 .read
= unin_data_read
,
110 .write
= unin_data_write
,
111 .endianness
= DEVICE_LITTLE_ENDIAN
,
114 static void pci_unin_init_irqs(UNINHostState
*s
)
118 for (i
= 0; i
< ARRAY_SIZE(s
->irqs
); i
++) {
119 s
->irqs
[i
] = qdev_get_gpio_in(DEVICE(s
->pic
), unin_irq_line
[i
]);
123 static char *pci_unin_main_ofw_unit_address(const SysBusDevice
*dev
)
125 UNINHostState
*s
= UNI_NORTH_PCI_HOST_BRIDGE(dev
);
127 return g_strdup_printf("%x", s
->ofw_addr
);
130 static void pci_unin_main_realize(DeviceState
*dev
, Error
**errp
)
132 UNINHostState
*s
= UNI_NORTH_PCI_HOST_BRIDGE(dev
);
133 PCIHostState
*h
= PCI_HOST_BRIDGE(dev
);
135 h
->bus
= pci_register_root_bus(dev
, NULL
,
136 pci_unin_set_irq
, pci_unin_map_irq
,
140 PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS
);
142 pci_create_simple(h
->bus
, PCI_DEVFN(11, 0), "uni-north-pci");
143 pci_unin_init_irqs(s
);
145 /* DEC 21154 bridge */
147 /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
148 pci_create_simple(h
->bus
, PCI_DEVFN(12, 0), "dec-21154");
152 static void pci_unin_main_init(Object
*obj
)
154 UNINHostState
*s
= UNI_NORTH_PCI_HOST_BRIDGE(obj
);
155 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
156 PCIHostState
*h
= PCI_HOST_BRIDGE(obj
);
158 /* Use values found on a real PowerMac */
159 /* Uninorth main bus */
160 memory_region_init_io(&h
->conf_mem
, OBJECT(h
), &pci_host_conf_le_ops
,
161 obj
, "unin-pci-conf-idx", 0x1000);
162 memory_region_init_io(&h
->data_mem
, OBJECT(h
), &unin_data_ops
, obj
,
163 "unin-pci-conf-data", 0x1000);
165 memory_region_init(&s
->pci_mmio
, OBJECT(s
), "unin-pci-mmio",
167 memory_region_init_io(&s
->pci_io
, OBJECT(s
), &unassigned_io_ops
, obj
,
168 "unin-pci-isa-mmio", 0x00800000);
170 memory_region_init_alias(&s
->pci_hole
, OBJECT(s
),
171 "unin-pci-hole", &s
->pci_mmio
,
172 0x80000000ULL
, 0x10000000ULL
);
174 object_property_add_link(obj
, "pic", TYPE_OPENPIC
,
176 qdev_prop_allow_set_link_before_realize
,
179 sysbus_init_mmio(sbd
, &h
->conf_mem
);
180 sysbus_init_mmio(sbd
, &h
->data_mem
);
181 sysbus_init_mmio(sbd
, &s
->pci_hole
);
182 sysbus_init_mmio(sbd
, &s
->pci_io
);
185 static void pci_u3_agp_realize(DeviceState
*dev
, Error
**errp
)
187 UNINHostState
*s
= U3_AGP_HOST_BRIDGE(dev
);
188 PCIHostState
*h
= PCI_HOST_BRIDGE(dev
);
190 h
->bus
= pci_register_root_bus(dev
, NULL
,
191 pci_unin_set_irq
, pci_unin_map_irq
,
195 PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS
);
197 pci_create_simple(h
->bus
, PCI_DEVFN(11, 0), "u3-agp");
198 pci_unin_init_irqs(s
);
201 static void pci_u3_agp_init(Object
*obj
)
203 UNINHostState
*s
= U3_AGP_HOST_BRIDGE(obj
);
204 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
205 PCIHostState
*h
= PCI_HOST_BRIDGE(obj
);
207 /* Uninorth U3 AGP bus */
208 memory_region_init_io(&h
->conf_mem
, OBJECT(h
), &pci_host_conf_le_ops
,
209 obj
, "unin-pci-conf-idx", 0x1000);
210 memory_region_init_io(&h
->data_mem
, OBJECT(h
), &unin_data_ops
, obj
,
211 "unin-pci-conf-data", 0x1000);
213 memory_region_init(&s
->pci_mmio
, OBJECT(s
), "unin-pci-mmio",
215 memory_region_init_io(&s
->pci_io
, OBJECT(s
), &unassigned_io_ops
, obj
,
216 "unin-pci-isa-mmio", 0x00800000);
218 memory_region_init_alias(&s
->pci_hole
, OBJECT(s
),
219 "unin-pci-hole", &s
->pci_mmio
,
220 0x80000000ULL
, 0x70000000ULL
);
222 object_property_add_link(obj
, "pic", TYPE_OPENPIC
,
224 qdev_prop_allow_set_link_before_realize
,
227 sysbus_init_mmio(sbd
, &h
->conf_mem
);
228 sysbus_init_mmio(sbd
, &h
->data_mem
);
229 sysbus_init_mmio(sbd
, &s
->pci_hole
);
230 sysbus_init_mmio(sbd
, &s
->pci_io
);
233 static void pci_unin_agp_realize(DeviceState
*dev
, Error
**errp
)
235 UNINHostState
*s
= UNI_NORTH_AGP_HOST_BRIDGE(dev
);
236 PCIHostState
*h
= PCI_HOST_BRIDGE(dev
);
238 h
->bus
= pci_register_root_bus(dev
, NULL
,
239 pci_unin_set_irq
, pci_unin_map_irq
,
243 PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS
);
245 pci_create_simple(h
->bus
, PCI_DEVFN(11, 0), "uni-north-agp");
246 pci_unin_init_irqs(s
);
249 static void pci_unin_agp_init(Object
*obj
)
251 UNINHostState
*s
= UNI_NORTH_AGP_HOST_BRIDGE(obj
);
252 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
253 PCIHostState
*h
= PCI_HOST_BRIDGE(obj
);
255 /* Uninorth AGP bus */
256 memory_region_init_io(&h
->conf_mem
, OBJECT(h
), &pci_host_conf_le_ops
,
257 obj
, "unin-agp-conf-idx", 0x1000);
258 memory_region_init_io(&h
->data_mem
, OBJECT(h
), &pci_host_data_le_ops
,
259 obj
, "unin-agp-conf-data", 0x1000);
261 object_property_add_link(obj
, "pic", TYPE_OPENPIC
,
263 qdev_prop_allow_set_link_before_realize
,
266 sysbus_init_mmio(sbd
, &h
->conf_mem
);
267 sysbus_init_mmio(sbd
, &h
->data_mem
);
270 static void pci_unin_internal_realize(DeviceState
*dev
, Error
**errp
)
272 UNINHostState
*s
= UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev
);
273 PCIHostState
*h
= PCI_HOST_BRIDGE(dev
);
275 h
->bus
= pci_register_root_bus(dev
, NULL
,
276 pci_unin_set_irq
, pci_unin_map_irq
,
280 PCI_DEVFN(14, 0), 4, TYPE_PCI_BUS
);
282 pci_create_simple(h
->bus
, PCI_DEVFN(14, 0), "uni-north-internal-pci");
283 pci_unin_init_irqs(s
);
286 static void pci_unin_internal_init(Object
*obj
)
288 UNINHostState
*s
= UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj
);
289 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
290 PCIHostState
*h
= PCI_HOST_BRIDGE(obj
);
292 /* Uninorth internal bus */
293 memory_region_init_io(&h
->conf_mem
, OBJECT(h
), &pci_host_conf_le_ops
,
294 obj
, "unin-pci-conf-idx", 0x1000);
295 memory_region_init_io(&h
->data_mem
, OBJECT(h
), &pci_host_data_le_ops
,
296 obj
, "unin-pci-conf-data", 0x1000);
298 object_property_add_link(obj
, "pic", TYPE_OPENPIC
,
300 qdev_prop_allow_set_link_before_realize
,
303 sysbus_init_mmio(sbd
, &h
->conf_mem
);
304 sysbus_init_mmio(sbd
, &h
->data_mem
);
307 static void unin_main_pci_host_realize(PCIDevice
*d
, Error
**errp
)
309 /* cache_line_size */
310 d
->config
[0x0C] = 0x08;
312 d
->config
[0x0D] = 0x10;
313 /* capabilities_pointer */
314 d
->config
[0x34] = 0x00;
317 * Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
318 * memory space with base 0x80000000, size 0x10000000 for Apple's
319 * AppleMacRiscPCI driver
321 d
->config
[0x48] = 0x0;
322 d
->config
[0x49] = 0x0;
323 d
->config
[0x4a] = 0x0;
324 d
->config
[0x4b] = 0x1;
327 static void unin_agp_pci_host_realize(PCIDevice
*d
, Error
**errp
)
329 /* cache_line_size */
330 d
->config
[0x0C] = 0x08;
332 d
->config
[0x0D] = 0x10;
333 /* capabilities_pointer
334 d->config[0x34] = 0x80; */
337 static void u3_agp_pci_host_realize(PCIDevice
*d
, Error
**errp
)
339 /* cache line size */
340 d
->config
[0x0C] = 0x08;
342 d
->config
[0x0D] = 0x10;
345 static void unin_internal_pci_host_realize(PCIDevice
*d
, Error
**errp
)
347 /* cache_line_size */
348 d
->config
[0x0C] = 0x08;
350 d
->config
[0x0D] = 0x10;
351 /* capabilities_pointer */
352 d
->config
[0x34] = 0x00;
355 static void unin_main_pci_host_class_init(ObjectClass
*klass
, void *data
)
357 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
358 DeviceClass
*dc
= DEVICE_CLASS(klass
);
360 k
->realize
= unin_main_pci_host_realize
;
361 k
->vendor_id
= PCI_VENDOR_ID_APPLE
;
362 k
->device_id
= PCI_DEVICE_ID_APPLE_UNI_N_PCI
;
364 k
->class_id
= PCI_CLASS_BRIDGE_HOST
;
366 * PCI-facing part of the host bridge, not usable without the
367 * host-facing part, which can't be device_add'ed, yet.
369 dc
->user_creatable
= false;
372 static const TypeInfo unin_main_pci_host_info
= {
373 .name
= "uni-north-pci",
374 .parent
= TYPE_PCI_DEVICE
,
375 .instance_size
= sizeof(PCIDevice
),
376 .class_init
= unin_main_pci_host_class_init
,
377 .interfaces
= (InterfaceInfo
[]) {
378 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
383 static void u3_agp_pci_host_class_init(ObjectClass
*klass
, void *data
)
385 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
386 DeviceClass
*dc
= DEVICE_CLASS(klass
);
388 k
->realize
= u3_agp_pci_host_realize
;
389 k
->vendor_id
= PCI_VENDOR_ID_APPLE
;
390 k
->device_id
= PCI_DEVICE_ID_APPLE_U3_AGP
;
392 k
->class_id
= PCI_CLASS_BRIDGE_HOST
;
394 * PCI-facing part of the host bridge, not usable without the
395 * host-facing part, which can't be device_add'ed, yet.
397 dc
->user_creatable
= false;
400 static const TypeInfo u3_agp_pci_host_info
= {
402 .parent
= TYPE_PCI_DEVICE
,
403 .instance_size
= sizeof(PCIDevice
),
404 .class_init
= u3_agp_pci_host_class_init
,
405 .interfaces
= (InterfaceInfo
[]) {
406 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
411 static void unin_agp_pci_host_class_init(ObjectClass
*klass
, void *data
)
413 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
414 DeviceClass
*dc
= DEVICE_CLASS(klass
);
416 k
->realize
= unin_agp_pci_host_realize
;
417 k
->vendor_id
= PCI_VENDOR_ID_APPLE
;
418 k
->device_id
= PCI_DEVICE_ID_APPLE_UNI_N_AGP
;
420 k
->class_id
= PCI_CLASS_BRIDGE_HOST
;
422 * PCI-facing part of the host bridge, not usable without the
423 * host-facing part, which can't be device_add'ed, yet.
425 dc
->user_creatable
= false;
428 static const TypeInfo unin_agp_pci_host_info
= {
429 .name
= "uni-north-agp",
430 .parent
= TYPE_PCI_DEVICE
,
431 .instance_size
= sizeof(PCIDevice
),
432 .class_init
= unin_agp_pci_host_class_init
,
433 .interfaces
= (InterfaceInfo
[]) {
434 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
439 static void unin_internal_pci_host_class_init(ObjectClass
*klass
, void *data
)
441 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
442 DeviceClass
*dc
= DEVICE_CLASS(klass
);
444 k
->realize
= unin_internal_pci_host_realize
;
445 k
->vendor_id
= PCI_VENDOR_ID_APPLE
;
446 k
->device_id
= PCI_DEVICE_ID_APPLE_UNI_N_I_PCI
;
448 k
->class_id
= PCI_CLASS_BRIDGE_HOST
;
450 * PCI-facing part of the host bridge, not usable without the
451 * host-facing part, which can't be device_add'ed, yet.
453 dc
->user_creatable
= false;
456 static const TypeInfo unin_internal_pci_host_info
= {
457 .name
= "uni-north-internal-pci",
458 .parent
= TYPE_PCI_DEVICE
,
459 .instance_size
= sizeof(PCIDevice
),
460 .class_init
= unin_internal_pci_host_class_init
,
461 .interfaces
= (InterfaceInfo
[]) {
462 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
467 static Property pci_unin_main_pci_host_props
[] = {
468 DEFINE_PROP_UINT32("ofw-addr", UNINHostState
, ofw_addr
, -1),
469 DEFINE_PROP_END_OF_LIST()
472 static void pci_unin_main_class_init(ObjectClass
*klass
, void *data
)
474 DeviceClass
*dc
= DEVICE_CLASS(klass
);
475 SysBusDeviceClass
*sbc
= SYS_BUS_DEVICE_CLASS(klass
);
477 dc
->realize
= pci_unin_main_realize
;
478 dc
->props
= pci_unin_main_pci_host_props
;
479 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
481 sbc
->explicit_ofw_unit_address
= pci_unin_main_ofw_unit_address
;
484 static const TypeInfo pci_unin_main_info
= {
485 .name
= TYPE_UNI_NORTH_PCI_HOST_BRIDGE
,
486 .parent
= TYPE_PCI_HOST_BRIDGE
,
487 .instance_size
= sizeof(UNINHostState
),
488 .instance_init
= pci_unin_main_init
,
489 .class_init
= pci_unin_main_class_init
,
492 static void pci_u3_agp_class_init(ObjectClass
*klass
, void *data
)
494 DeviceClass
*dc
= DEVICE_CLASS(klass
);
496 dc
->realize
= pci_u3_agp_realize
;
497 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
500 static const TypeInfo pci_u3_agp_info
= {
501 .name
= TYPE_U3_AGP_HOST_BRIDGE
,
502 .parent
= TYPE_PCI_HOST_BRIDGE
,
503 .instance_size
= sizeof(UNINHostState
),
504 .instance_init
= pci_u3_agp_init
,
505 .class_init
= pci_u3_agp_class_init
,
508 static void pci_unin_agp_class_init(ObjectClass
*klass
, void *data
)
510 DeviceClass
*dc
= DEVICE_CLASS(klass
);
512 dc
->realize
= pci_unin_agp_realize
;
513 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
516 static const TypeInfo pci_unin_agp_info
= {
517 .name
= TYPE_UNI_NORTH_AGP_HOST_BRIDGE
,
518 .parent
= TYPE_PCI_HOST_BRIDGE
,
519 .instance_size
= sizeof(UNINHostState
),
520 .instance_init
= pci_unin_agp_init
,
521 .class_init
= pci_unin_agp_class_init
,
524 static void pci_unin_internal_class_init(ObjectClass
*klass
, void *data
)
526 DeviceClass
*dc
= DEVICE_CLASS(klass
);
528 dc
->realize
= pci_unin_internal_realize
;
529 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
532 static const TypeInfo pci_unin_internal_info
= {
533 .name
= TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE
,
534 .parent
= TYPE_PCI_HOST_BRIDGE
,
535 .instance_size
= sizeof(UNINHostState
),
536 .instance_init
= pci_unin_internal_init
,
537 .class_init
= pci_unin_internal_class_init
,
541 static void unin_write(void *opaque
, hwaddr addr
, uint64_t value
,
544 trace_unin_write(addr
, value
);
547 static uint64_t unin_read(void *opaque
, hwaddr addr
, unsigned size
)
553 value
= UNINORTH_VERSION_10A
;
559 trace_unin_read(addr
, value
);
564 static const MemoryRegionOps unin_ops
= {
567 .endianness
= DEVICE_BIG_ENDIAN
,
570 static void unin_init(Object
*obj
)
572 UNINState
*s
= UNI_NORTH(obj
);
573 SysBusDevice
*sbd
= SYS_BUS_DEVICE(obj
);
575 memory_region_init_io(&s
->mem
, obj
, &unin_ops
, s
, "unin", 0x1000);
577 sysbus_init_mmio(sbd
, &s
->mem
);
580 static void unin_class_init(ObjectClass
*klass
, void *data
)
582 DeviceClass
*dc
= DEVICE_CLASS(klass
);
584 set_bit(DEVICE_CATEGORY_BRIDGE
, dc
->categories
);
587 static const TypeInfo unin_info
= {
588 .name
= TYPE_UNI_NORTH
,
589 .parent
= TYPE_SYS_BUS_DEVICE
,
590 .instance_size
= sizeof(UNINState
),
591 .instance_init
= unin_init
,
592 .class_init
= unin_class_init
,
595 static void unin_register_types(void)
597 type_register_static(&unin_main_pci_host_info
);
598 type_register_static(&u3_agp_pci_host_info
);
599 type_register_static(&unin_agp_pci_host_info
);
600 type_register_static(&unin_internal_pci_host_info
);
602 type_register_static(&pci_unin_main_info
);
603 type_register_static(&pci_u3_agp_info
);
604 type_register_static(&pci_unin_agp_info
);
605 type_register_static(&pci_unin_internal_info
);
607 type_register_static(&unin_info
);
610 type_init(unin_register_types
)