target/mips/tx79: Introduce PCEQ* opcodes (Parallel Compare for Equal)
[qemu/ar7.git] / linux-headers / asm-x86 / kvm.h
bloba6c327f8ad9e5f079dd7039229e3df7e296fc345
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 #ifndef _ASM_X86_KVM_H
3 #define _ASM_X86_KVM_H
5 /*
6 * KVM x86 specific structures and definitions
8 */
10 #include <linux/types.h>
11 #include <linux/ioctl.h>
13 #define KVM_PIO_PAGE_OFFSET 1
14 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
15 #define KVM_DIRTY_LOG_PAGE_OFFSET 64
17 #define DE_VECTOR 0
18 #define DB_VECTOR 1
19 #define BP_VECTOR 3
20 #define OF_VECTOR 4
21 #define BR_VECTOR 5
22 #define UD_VECTOR 6
23 #define NM_VECTOR 7
24 #define DF_VECTOR 8
25 #define TS_VECTOR 10
26 #define NP_VECTOR 11
27 #define SS_VECTOR 12
28 #define GP_VECTOR 13
29 #define PF_VECTOR 14
30 #define MF_VECTOR 16
31 #define AC_VECTOR 17
32 #define MC_VECTOR 18
33 #define XM_VECTOR 19
34 #define VE_VECTOR 20
36 /* Select x86 specific features in <linux/kvm.h> */
37 #define __KVM_HAVE_PIT
38 #define __KVM_HAVE_IOAPIC
39 #define __KVM_HAVE_IRQ_LINE
40 #define __KVM_HAVE_MSI
41 #define __KVM_HAVE_USER_NMI
42 #define __KVM_HAVE_GUEST_DEBUG
43 #define __KVM_HAVE_MSIX
44 #define __KVM_HAVE_MCE
45 #define __KVM_HAVE_PIT_STATE2
46 #define __KVM_HAVE_XEN_HVM
47 #define __KVM_HAVE_VCPU_EVENTS
48 #define __KVM_HAVE_DEBUGREGS
49 #define __KVM_HAVE_XSAVE
50 #define __KVM_HAVE_XCRS
51 #define __KVM_HAVE_READONLY_MEM
53 /* Architectural interrupt line count. */
54 #define KVM_NR_INTERRUPTS 256
56 struct kvm_memory_alias {
57 __u32 slot; /* this has a different namespace than memory slots */
58 __u32 flags;
59 __u64 guest_phys_addr;
60 __u64 memory_size;
61 __u64 target_phys_addr;
64 /* for KVM_GET_IRQCHIP and KVM_SET_IRQCHIP */
65 struct kvm_pic_state {
66 __u8 last_irr; /* edge detection */
67 __u8 irr; /* interrupt request register */
68 __u8 imr; /* interrupt mask register */
69 __u8 isr; /* interrupt service register */
70 __u8 priority_add; /* highest irq priority */
71 __u8 irq_base;
72 __u8 read_reg_select;
73 __u8 poll;
74 __u8 special_mask;
75 __u8 init_state;
76 __u8 auto_eoi;
77 __u8 rotate_on_auto_eoi;
78 __u8 special_fully_nested_mode;
79 __u8 init4; /* true if 4 byte init */
80 __u8 elcr; /* PIIX edge/trigger selection */
81 __u8 elcr_mask;
84 #define KVM_IOAPIC_NUM_PINS 24
85 struct kvm_ioapic_state {
86 __u64 base_address;
87 __u32 ioregsel;
88 __u32 id;
89 __u32 irr;
90 __u32 pad;
91 union {
92 __u64 bits;
93 struct {
94 __u8 vector;
95 __u8 delivery_mode:3;
96 __u8 dest_mode:1;
97 __u8 delivery_status:1;
98 __u8 polarity:1;
99 __u8 remote_irr:1;
100 __u8 trig_mode:1;
101 __u8 mask:1;
102 __u8 reserve:7;
103 __u8 reserved[4];
104 __u8 dest_id;
105 } fields;
106 } redirtbl[KVM_IOAPIC_NUM_PINS];
109 #define KVM_IRQCHIP_PIC_MASTER 0
110 #define KVM_IRQCHIP_PIC_SLAVE 1
111 #define KVM_IRQCHIP_IOAPIC 2
112 #define KVM_NR_IRQCHIPS 3
114 #define KVM_RUN_X86_SMM (1 << 0)
115 #define KVM_RUN_X86_BUS_LOCK (1 << 1)
117 /* for KVM_GET_REGS and KVM_SET_REGS */
118 struct kvm_regs {
119 /* out (KVM_GET_REGS) / in (KVM_SET_REGS) */
120 __u64 rax, rbx, rcx, rdx;
121 __u64 rsi, rdi, rsp, rbp;
122 __u64 r8, r9, r10, r11;
123 __u64 r12, r13, r14, r15;
124 __u64 rip, rflags;
127 /* for KVM_GET_LAPIC and KVM_SET_LAPIC */
128 #define KVM_APIC_REG_SIZE 0x400
129 struct kvm_lapic_state {
130 char regs[KVM_APIC_REG_SIZE];
133 struct kvm_segment {
134 __u64 base;
135 __u32 limit;
136 __u16 selector;
137 __u8 type;
138 __u8 present, dpl, db, s, l, g, avl;
139 __u8 unusable;
140 __u8 padding;
143 struct kvm_dtable {
144 __u64 base;
145 __u16 limit;
146 __u16 padding[3];
150 /* for KVM_GET_SREGS and KVM_SET_SREGS */
151 struct kvm_sregs {
152 /* out (KVM_GET_SREGS) / in (KVM_SET_SREGS) */
153 struct kvm_segment cs, ds, es, fs, gs, ss;
154 struct kvm_segment tr, ldt;
155 struct kvm_dtable gdt, idt;
156 __u64 cr0, cr2, cr3, cr4, cr8;
157 __u64 efer;
158 __u64 apic_base;
159 __u64 interrupt_bitmap[(KVM_NR_INTERRUPTS + 63) / 64];
162 struct kvm_sregs2 {
163 /* out (KVM_GET_SREGS2) / in (KVM_SET_SREGS2) */
164 struct kvm_segment cs, ds, es, fs, gs, ss;
165 struct kvm_segment tr, ldt;
166 struct kvm_dtable gdt, idt;
167 __u64 cr0, cr2, cr3, cr4, cr8;
168 __u64 efer;
169 __u64 apic_base;
170 __u64 flags;
171 __u64 pdptrs[4];
173 #define KVM_SREGS2_FLAGS_PDPTRS_VALID 1
175 /* for KVM_GET_FPU and KVM_SET_FPU */
176 struct kvm_fpu {
177 __u8 fpr[8][16];
178 __u16 fcw;
179 __u16 fsw;
180 __u8 ftwx; /* in fxsave format */
181 __u8 pad1;
182 __u16 last_opcode;
183 __u64 last_ip;
184 __u64 last_dp;
185 __u8 xmm[16][16];
186 __u32 mxcsr;
187 __u32 pad2;
190 struct kvm_msr_entry {
191 __u32 index;
192 __u32 reserved;
193 __u64 data;
196 /* for KVM_GET_MSRS and KVM_SET_MSRS */
197 struct kvm_msrs {
198 __u32 nmsrs; /* number of msrs in entries */
199 __u32 pad;
201 struct kvm_msr_entry entries[0];
204 /* for KVM_GET_MSR_INDEX_LIST */
205 struct kvm_msr_list {
206 __u32 nmsrs; /* number of msrs in entries */
207 __u32 indices[0];
210 /* Maximum size of any access bitmap in bytes */
211 #define KVM_MSR_FILTER_MAX_BITMAP_SIZE 0x600
213 /* for KVM_X86_SET_MSR_FILTER */
214 struct kvm_msr_filter_range {
215 #define KVM_MSR_FILTER_READ (1 << 0)
216 #define KVM_MSR_FILTER_WRITE (1 << 1)
217 __u32 flags;
218 __u32 nmsrs; /* number of msrs in bitmap */
219 __u32 base; /* MSR index the bitmap starts at */
220 __u8 *bitmap; /* a 1 bit allows the operations in flags, 0 denies */
223 #define KVM_MSR_FILTER_MAX_RANGES 16
224 struct kvm_msr_filter {
225 #define KVM_MSR_FILTER_DEFAULT_ALLOW (0 << 0)
226 #define KVM_MSR_FILTER_DEFAULT_DENY (1 << 0)
227 __u32 flags;
228 struct kvm_msr_filter_range ranges[KVM_MSR_FILTER_MAX_RANGES];
231 struct kvm_cpuid_entry {
232 __u32 function;
233 __u32 eax;
234 __u32 ebx;
235 __u32 ecx;
236 __u32 edx;
237 __u32 padding;
240 /* for KVM_SET_CPUID */
241 struct kvm_cpuid {
242 __u32 nent;
243 __u32 padding;
244 struct kvm_cpuid_entry entries[0];
247 struct kvm_cpuid_entry2 {
248 __u32 function;
249 __u32 index;
250 __u32 flags;
251 __u32 eax;
252 __u32 ebx;
253 __u32 ecx;
254 __u32 edx;
255 __u32 padding[3];
258 #define KVM_CPUID_FLAG_SIGNIFCANT_INDEX (1 << 0)
259 #define KVM_CPUID_FLAG_STATEFUL_FUNC (1 << 1)
260 #define KVM_CPUID_FLAG_STATE_READ_NEXT (1 << 2)
262 /* for KVM_SET_CPUID2 */
263 struct kvm_cpuid2 {
264 __u32 nent;
265 __u32 padding;
266 struct kvm_cpuid_entry2 entries[0];
269 /* for KVM_GET_PIT and KVM_SET_PIT */
270 struct kvm_pit_channel_state {
271 __u32 count; /* can be 65536 */
272 __u16 latched_count;
273 __u8 count_latched;
274 __u8 status_latched;
275 __u8 status;
276 __u8 read_state;
277 __u8 write_state;
278 __u8 write_latch;
279 __u8 rw_mode;
280 __u8 mode;
281 __u8 bcd;
282 __u8 gate;
283 __s64 count_load_time;
286 struct kvm_debug_exit_arch {
287 __u32 exception;
288 __u32 pad;
289 __u64 pc;
290 __u64 dr6;
291 __u64 dr7;
294 #define KVM_GUESTDBG_USE_SW_BP 0x00010000
295 #define KVM_GUESTDBG_USE_HW_BP 0x00020000
296 #define KVM_GUESTDBG_INJECT_DB 0x00040000
297 #define KVM_GUESTDBG_INJECT_BP 0x00080000
299 /* for KVM_SET_GUEST_DEBUG */
300 struct kvm_guest_debug_arch {
301 __u64 debugreg[8];
304 struct kvm_pit_state {
305 struct kvm_pit_channel_state channels[3];
308 #define KVM_PIT_FLAGS_HPET_LEGACY 0x00000001
310 struct kvm_pit_state2 {
311 struct kvm_pit_channel_state channels[3];
312 __u32 flags;
313 __u32 reserved[9];
316 struct kvm_reinject_control {
317 __u8 pit_reinject;
318 __u8 reserved[31];
321 /* When set in flags, include corresponding fields on KVM_SET_VCPU_EVENTS */
322 #define KVM_VCPUEVENT_VALID_NMI_PENDING 0x00000001
323 #define KVM_VCPUEVENT_VALID_SIPI_VECTOR 0x00000002
324 #define KVM_VCPUEVENT_VALID_SHADOW 0x00000004
325 #define KVM_VCPUEVENT_VALID_SMM 0x00000008
326 #define KVM_VCPUEVENT_VALID_PAYLOAD 0x00000010
328 /* Interrupt shadow states */
329 #define KVM_X86_SHADOW_INT_MOV_SS 0x01
330 #define KVM_X86_SHADOW_INT_STI 0x02
332 /* for KVM_GET/SET_VCPU_EVENTS */
333 struct kvm_vcpu_events {
334 struct {
335 __u8 injected;
336 __u8 nr;
337 __u8 has_error_code;
338 __u8 pending;
339 __u32 error_code;
340 } exception;
341 struct {
342 __u8 injected;
343 __u8 nr;
344 __u8 soft;
345 __u8 shadow;
346 } interrupt;
347 struct {
348 __u8 injected;
349 __u8 pending;
350 __u8 masked;
351 __u8 pad;
352 } nmi;
353 __u32 sipi_vector;
354 __u32 flags;
355 struct {
356 __u8 smm;
357 __u8 pending;
358 __u8 smm_inside_nmi;
359 __u8 latched_init;
360 } smi;
361 __u8 reserved[27];
362 __u8 exception_has_payload;
363 __u64 exception_payload;
366 /* for KVM_GET/SET_DEBUGREGS */
367 struct kvm_debugregs {
368 __u64 db[4];
369 __u64 dr6;
370 __u64 dr7;
371 __u64 flags;
372 __u64 reserved[9];
375 /* for KVM_CAP_XSAVE */
376 struct kvm_xsave {
377 __u32 region[1024];
380 #define KVM_MAX_XCRS 16
382 struct kvm_xcr {
383 __u32 xcr;
384 __u32 reserved;
385 __u64 value;
388 struct kvm_xcrs {
389 __u32 nr_xcrs;
390 __u32 flags;
391 struct kvm_xcr xcrs[KVM_MAX_XCRS];
392 __u64 padding[16];
395 #define KVM_SYNC_X86_REGS (1UL << 0)
396 #define KVM_SYNC_X86_SREGS (1UL << 1)
397 #define KVM_SYNC_X86_EVENTS (1UL << 2)
399 #define KVM_SYNC_X86_VALID_FIELDS \
400 (KVM_SYNC_X86_REGS| \
401 KVM_SYNC_X86_SREGS| \
402 KVM_SYNC_X86_EVENTS)
404 /* kvm_sync_regs struct included by kvm_run struct */
405 struct kvm_sync_regs {
406 /* Members of this structure are potentially malicious.
407 * Care must be taken by code reading, esp. interpreting,
408 * data fields from them inside KVM to prevent TOCTOU and
409 * double-fetch types of vulnerabilities.
411 struct kvm_regs regs;
412 struct kvm_sregs sregs;
413 struct kvm_vcpu_events events;
416 #define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
417 #define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
418 #define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
419 #define KVM_X86_QUIRK_OUT_7E_INC_RIP (1 << 3)
420 #define KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT (1 << 4)
422 #define KVM_STATE_NESTED_FORMAT_VMX 0
423 #define KVM_STATE_NESTED_FORMAT_SVM 1
425 #define KVM_STATE_NESTED_GUEST_MODE 0x00000001
426 #define KVM_STATE_NESTED_RUN_PENDING 0x00000002
427 #define KVM_STATE_NESTED_EVMCS 0x00000004
428 #define KVM_STATE_NESTED_MTF_PENDING 0x00000008
429 #define KVM_STATE_NESTED_GIF_SET 0x00000100
431 #define KVM_STATE_NESTED_SMM_GUEST_MODE 0x00000001
432 #define KVM_STATE_NESTED_SMM_VMXON 0x00000002
434 #define KVM_STATE_NESTED_VMX_VMCS_SIZE 0x1000
436 #define KVM_STATE_NESTED_SVM_VMCB_SIZE 0x1000
438 #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
440 struct kvm_vmx_nested_state_data {
441 __u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
442 __u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
445 struct kvm_vmx_nested_state_hdr {
446 __u64 vmxon_pa;
447 __u64 vmcs12_pa;
449 struct {
450 __u16 flags;
451 } smm;
453 __u16 pad;
455 __u32 flags;
456 __u64 preemption_timer_deadline;
459 struct kvm_svm_nested_state_data {
460 /* Save area only used if KVM_STATE_NESTED_RUN_PENDING. */
461 __u8 vmcb12[KVM_STATE_NESTED_SVM_VMCB_SIZE];
464 struct kvm_svm_nested_state_hdr {
465 __u64 vmcb_pa;
468 /* for KVM_CAP_NESTED_STATE */
469 struct kvm_nested_state {
470 __u16 flags;
471 __u16 format;
472 __u32 size;
474 union {
475 struct kvm_vmx_nested_state_hdr vmx;
476 struct kvm_svm_nested_state_hdr svm;
478 /* Pad the header to 128 bytes. */
479 __u8 pad[120];
480 } hdr;
483 * Define data region as 0 bytes to preserve backwards-compatability
484 * to old definition of kvm_nested_state in order to avoid changing
485 * KVM_{GET,PUT}_NESTED_STATE ioctl values.
487 union {
488 struct kvm_vmx_nested_state_data vmx[0];
489 struct kvm_svm_nested_state_data svm[0];
490 } data;
493 /* for KVM_CAP_PMU_EVENT_FILTER */
494 struct kvm_pmu_event_filter {
495 __u32 action;
496 __u32 nevents;
497 __u32 fixed_counter_bitmap;
498 __u32 flags;
499 __u32 pad[4];
500 __u64 events[0];
503 #define KVM_PMU_EVENT_ALLOW 0
504 #define KVM_PMU_EVENT_DENY 1
506 #endif /* _ASM_X86_KVM_H */