4 * Copyright (c) 2007 Jocelyn Mayer
5 * Copyright (c) 2012 SUSE LINUX Products GmbH
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see
19 * <http://www.gnu.org/licenses/lgpl-2.1.html>
22 #include "qemu/osdep.h"
23 #include "qapi/error.h"
25 #include "qemu-common.h"
26 #include "exec/exec-all.h"
29 static void alpha_cpu_set_pc(CPUState
*cs
, vaddr value
)
31 AlphaCPU
*cpu
= ALPHA_CPU(cs
);
36 static bool alpha_cpu_has_work(CPUState
*cs
)
38 /* Here we are checking to see if the CPU should wake up from HALT.
39 We will have gotten into this state only for WTINT from PALmode. */
40 /* ??? I'm not sure how the IPL state works with WTINT to keep a CPU
41 asleep even if (some) interrupts have been asserted. For now,
42 assume that if a CPU really wants to stay asleep, it will mask
43 interrupts at the chipset level, which will prevent these bits
44 from being set in the first place. */
45 return cs
->interrupt_request
& (CPU_INTERRUPT_HARD
48 | CPU_INTERRUPT_MCHK
);
51 static void alpha_cpu_disas_set_info(CPUState
*cpu
, disassemble_info
*info
)
53 info
->mach
= bfd_mach_alpha_ev6
;
54 info
->print_insn
= print_insn_alpha
;
57 static void alpha_cpu_realizefn(DeviceState
*dev
, Error
**errp
)
59 CPUState
*cs
= CPU(dev
);
60 AlphaCPUClass
*acc
= ALPHA_CPU_GET_CLASS(dev
);
61 Error
*local_err
= NULL
;
63 cpu_exec_realizefn(cs
, &local_err
);
64 if (local_err
!= NULL
) {
65 error_propagate(errp
, local_err
);
71 acc
->parent_realize(dev
, errp
);
74 /* Sort alphabetically by type name. */
75 static gint
alpha_cpu_list_compare(gconstpointer a
, gconstpointer b
)
77 ObjectClass
*class_a
= (ObjectClass
*)a
;
78 ObjectClass
*class_b
= (ObjectClass
*)b
;
79 const char *name_a
, *name_b
;
81 name_a
= object_class_get_name(class_a
);
82 name_b
= object_class_get_name(class_b
);
83 return strcmp(name_a
, name_b
);
86 static void alpha_cpu_list_entry(gpointer data
, gpointer user_data
)
88 ObjectClass
*oc
= data
;
89 CPUListState
*s
= user_data
;
91 (*s
->cpu_fprintf
)(s
->file
, " %s\n",
92 object_class_get_name(oc
));
95 void alpha_cpu_list(FILE *f
, fprintf_function cpu_fprintf
)
99 .cpu_fprintf
= cpu_fprintf
,
103 list
= object_class_get_list(TYPE_ALPHA_CPU
, false);
104 list
= g_slist_sort(list
, alpha_cpu_list_compare
);
105 (*cpu_fprintf
)(f
, "Available CPUs:\n");
106 g_slist_foreach(list
, alpha_cpu_list_entry
, &s
);
112 #define TYPE(model) model "-" TYPE_ALPHA_CPU
114 typedef struct AlphaCPUAlias
{
116 const char *typename
;
119 static const AlphaCPUAlias alpha_cpu_aliases
[] = {
120 { "21064", TYPE("ev4") },
121 { "21164", TYPE("ev5") },
122 { "21164a", TYPE("ev56") },
123 { "21164pc", TYPE("pca56") },
124 { "21264", TYPE("ev6") },
125 { "21264a", TYPE("ev67") },
128 static ObjectClass
*alpha_cpu_class_by_name(const char *cpu_model
)
130 ObjectClass
*oc
= NULL
;
134 if (cpu_model
== NULL
) {
138 oc
= object_class_by_name(cpu_model
);
139 if (oc
!= NULL
&& object_class_dynamic_cast(oc
, TYPE_ALPHA_CPU
) != NULL
&&
140 !object_class_is_abstract(oc
)) {
144 for (i
= 0; i
< ARRAY_SIZE(alpha_cpu_aliases
); i
++) {
145 if (strcmp(cpu_model
, alpha_cpu_aliases
[i
].alias
) == 0) {
146 oc
= object_class_by_name(alpha_cpu_aliases
[i
].typename
);
147 assert(oc
!= NULL
&& !object_class_is_abstract(oc
));
152 typename
= g_strdup_printf("%s-" TYPE_ALPHA_CPU
, cpu_model
);
153 oc
= object_class_by_name(typename
);
155 if (oc
!= NULL
&& object_class_is_abstract(oc
)) {
159 /* TODO: remove match everything nonsense */
160 /* Default to ev67; no reason not to emulate insns by default. */
162 oc
= object_class_by_name(TYPE("ev67"));
168 static void ev4_cpu_initfn(Object
*obj
)
170 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
171 CPUAlphaState
*env
= &cpu
->env
;
173 env
->implver
= IMPLVER_2106x
;
176 static const TypeInfo ev4_cpu_type_info
= {
178 .parent
= TYPE_ALPHA_CPU
,
179 .instance_init
= ev4_cpu_initfn
,
182 static void ev5_cpu_initfn(Object
*obj
)
184 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
185 CPUAlphaState
*env
= &cpu
->env
;
187 env
->implver
= IMPLVER_21164
;
190 static const TypeInfo ev5_cpu_type_info
= {
192 .parent
= TYPE_ALPHA_CPU
,
193 .instance_init
= ev5_cpu_initfn
,
196 static void ev56_cpu_initfn(Object
*obj
)
198 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
199 CPUAlphaState
*env
= &cpu
->env
;
201 env
->amask
|= AMASK_BWX
;
204 static const TypeInfo ev56_cpu_type_info
= {
205 .name
= TYPE("ev56"),
206 .parent
= TYPE("ev5"),
207 .instance_init
= ev56_cpu_initfn
,
210 static void pca56_cpu_initfn(Object
*obj
)
212 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
213 CPUAlphaState
*env
= &cpu
->env
;
215 env
->amask
|= AMASK_MVI
;
218 static const TypeInfo pca56_cpu_type_info
= {
219 .name
= TYPE("pca56"),
220 .parent
= TYPE("ev56"),
221 .instance_init
= pca56_cpu_initfn
,
224 static void ev6_cpu_initfn(Object
*obj
)
226 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
227 CPUAlphaState
*env
= &cpu
->env
;
229 env
->implver
= IMPLVER_21264
;
230 env
->amask
= AMASK_BWX
| AMASK_FIX
| AMASK_MVI
| AMASK_TRAP
;
233 static const TypeInfo ev6_cpu_type_info
= {
235 .parent
= TYPE_ALPHA_CPU
,
236 .instance_init
= ev6_cpu_initfn
,
239 static void ev67_cpu_initfn(Object
*obj
)
241 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
242 CPUAlphaState
*env
= &cpu
->env
;
244 env
->amask
|= AMASK_CIX
| AMASK_PREFETCH
;
247 static const TypeInfo ev67_cpu_type_info
= {
248 .name
= TYPE("ev67"),
249 .parent
= TYPE("ev6"),
250 .instance_init
= ev67_cpu_initfn
,
253 static const TypeInfo ev68_cpu_type_info
= {
254 .name
= TYPE("ev68"),
255 .parent
= TYPE("ev67"),
258 static void alpha_cpu_initfn(Object
*obj
)
260 CPUState
*cs
= CPU(obj
);
261 AlphaCPU
*cpu
= ALPHA_CPU(obj
);
262 CPUAlphaState
*env
= &cpu
->env
;
267 alpha_translate_init();
270 #if defined(CONFIG_USER_ONLY)
271 env
->flags
= ENV_FLAG_PS_USER
| ENV_FLAG_FEN
;
272 cpu_alpha_store_fpcr(env
, (FPCR_INVD
| FPCR_DZED
| FPCR_OVFD
273 | FPCR_UNFD
| FPCR_INED
| FPCR_DNOD
276 env
->flags
= ENV_FLAG_PAL_MODE
| ENV_FLAG_FEN
;
280 static void alpha_cpu_class_init(ObjectClass
*oc
, void *data
)
282 DeviceClass
*dc
= DEVICE_CLASS(oc
);
283 CPUClass
*cc
= CPU_CLASS(oc
);
284 AlphaCPUClass
*acc
= ALPHA_CPU_CLASS(oc
);
286 acc
->parent_realize
= dc
->realize
;
287 dc
->realize
= alpha_cpu_realizefn
;
289 cc
->class_by_name
= alpha_cpu_class_by_name
;
290 cc
->has_work
= alpha_cpu_has_work
;
291 cc
->do_interrupt
= alpha_cpu_do_interrupt
;
292 cc
->cpu_exec_interrupt
= alpha_cpu_exec_interrupt
;
293 cc
->dump_state
= alpha_cpu_dump_state
;
294 cc
->set_pc
= alpha_cpu_set_pc
;
295 cc
->gdb_read_register
= alpha_cpu_gdb_read_register
;
296 cc
->gdb_write_register
= alpha_cpu_gdb_write_register
;
297 #ifdef CONFIG_USER_ONLY
298 cc
->handle_mmu_fault
= alpha_cpu_handle_mmu_fault
;
300 cc
->do_unassigned_access
= alpha_cpu_unassigned_access
;
301 cc
->do_unaligned_access
= alpha_cpu_do_unaligned_access
;
302 cc
->get_phys_page_debug
= alpha_cpu_get_phys_page_debug
;
303 dc
->vmsd
= &vmstate_alpha_cpu
;
305 cc
->disas_set_info
= alpha_cpu_disas_set_info
;
307 cc
->gdb_num_core_regs
= 67;
310 static const TypeInfo alpha_cpu_type_info
= {
311 .name
= TYPE_ALPHA_CPU
,
313 .instance_size
= sizeof(AlphaCPU
),
314 .instance_init
= alpha_cpu_initfn
,
316 .class_size
= sizeof(AlphaCPUClass
),
317 .class_init
= alpha_cpu_class_init
,
320 static void alpha_cpu_register_types(void)
322 type_register_static(&alpha_cpu_type_info
);
323 type_register_static(&ev4_cpu_type_info
);
324 type_register_static(&ev5_cpu_type_info
);
325 type_register_static(&ev56_cpu_type_info
);
326 type_register_static(&pca56_cpu_type_info
);
327 type_register_static(&ev6_cpu_type_info
);
328 type_register_static(&ev67_cpu_type_info
);
329 type_register_static(&ev68_cpu_type_info
);
332 type_init(alpha_cpu_register_types
)