4 * Copyright (c) 2009 Red Hat
6 * This work is licensed under the terms of the GNU General Public License
7 * (GNU GPL), version 2 or later.
10 #include "sysemu/block-backend.h"
11 #include "sysemu/dma.h"
13 #include "qemu/range.h"
14 #include "qemu/thread.h"
15 #include "qemu/main-loop.h"
17 /* #define DEBUG_IOMMU */
19 int dma_memory_set(AddressSpace
*as
, dma_addr_t addr
, uint8_t c
, dma_addr_t len
)
21 dma_barrier(as
, DMA_DIRECTION_FROM_DEVICE
);
23 #define FILLBUF_SIZE 512
24 uint8_t fillbuf
[FILLBUF_SIZE
];
28 memset(fillbuf
, c
, FILLBUF_SIZE
);
30 l
= len
< FILLBUF_SIZE
? len
: FILLBUF_SIZE
;
31 error
|= address_space_rw(as
, addr
, MEMTXATTRS_UNSPECIFIED
,
40 void qemu_sglist_init(QEMUSGList
*qsg
, DeviceState
*dev
, int alloc_hint
,
43 qsg
->sg
= g_malloc(alloc_hint
* sizeof(ScatterGatherEntry
));
45 qsg
->nalloc
= alloc_hint
;
49 object_ref(OBJECT(dev
));
52 void qemu_sglist_add(QEMUSGList
*qsg
, dma_addr_t base
, dma_addr_t len
)
54 if (qsg
->nsg
== qsg
->nalloc
) {
55 qsg
->nalloc
= 2 * qsg
->nalloc
+ 1;
56 qsg
->sg
= g_realloc(qsg
->sg
, qsg
->nalloc
* sizeof(ScatterGatherEntry
));
58 qsg
->sg
[qsg
->nsg
].base
= base
;
59 qsg
->sg
[qsg
->nsg
].len
= len
;
64 void qemu_sglist_destroy(QEMUSGList
*qsg
)
66 object_unref(OBJECT(qsg
->dev
));
68 memset(qsg
, 0, sizeof(*qsg
));
79 dma_addr_t sg_cur_byte
;
85 static void dma_blk_cb(void *opaque
, int ret
);
87 static void reschedule_dma(void *opaque
)
89 DMAAIOCB
*dbs
= (DMAAIOCB
*)opaque
;
91 qemu_bh_delete(dbs
->bh
);
96 static void continue_after_map_failure(void *opaque
)
98 DMAAIOCB
*dbs
= (DMAAIOCB
*)opaque
;
100 dbs
->bh
= qemu_bh_new(reschedule_dma
, dbs
);
101 qemu_bh_schedule(dbs
->bh
);
104 static void dma_blk_unmap(DMAAIOCB
*dbs
)
108 for (i
= 0; i
< dbs
->iov
.niov
; ++i
) {
109 dma_memory_unmap(dbs
->sg
->as
, dbs
->iov
.iov
[i
].iov_base
,
110 dbs
->iov
.iov
[i
].iov_len
, dbs
->dir
,
111 dbs
->iov
.iov
[i
].iov_len
);
113 qemu_iovec_reset(&dbs
->iov
);
116 static void dma_complete(DMAAIOCB
*dbs
, int ret
)
118 trace_dma_complete(dbs
, ret
, dbs
->common
.cb
);
121 if (dbs
->common
.cb
) {
122 dbs
->common
.cb(dbs
->common
.opaque
, ret
);
124 qemu_iovec_destroy(&dbs
->iov
);
126 qemu_bh_delete(dbs
->bh
);
132 static void dma_blk_cb(void *opaque
, int ret
)
134 DMAAIOCB
*dbs
= (DMAAIOCB
*)opaque
;
135 dma_addr_t cur_addr
, cur_len
;
138 trace_dma_blk_cb(dbs
, ret
);
141 dbs
->sector_num
+= dbs
->iov
.size
/ 512;
143 if (dbs
->sg_cur_index
== dbs
->sg
->nsg
|| ret
< 0) {
144 dma_complete(dbs
, ret
);
149 while (dbs
->sg_cur_index
< dbs
->sg
->nsg
) {
150 cur_addr
= dbs
->sg
->sg
[dbs
->sg_cur_index
].base
+ dbs
->sg_cur_byte
;
151 cur_len
= dbs
->sg
->sg
[dbs
->sg_cur_index
].len
- dbs
->sg_cur_byte
;
152 mem
= dma_memory_map(dbs
->sg
->as
, cur_addr
, &cur_len
, dbs
->dir
);
155 qemu_iovec_add(&dbs
->iov
, mem
, cur_len
);
156 dbs
->sg_cur_byte
+= cur_len
;
157 if (dbs
->sg_cur_byte
== dbs
->sg
->sg
[dbs
->sg_cur_index
].len
) {
158 dbs
->sg_cur_byte
= 0;
163 if (dbs
->iov
.size
== 0) {
164 trace_dma_map_wait(dbs
);
165 cpu_register_map_client(dbs
, continue_after_map_failure
);
169 if (dbs
->iov
.size
& ~BDRV_SECTOR_MASK
) {
170 qemu_iovec_discard_back(&dbs
->iov
, dbs
->iov
.size
& ~BDRV_SECTOR_MASK
);
173 dbs
->acb
= dbs
->io_func(dbs
->blk
, dbs
->sector_num
, &dbs
->iov
,
174 dbs
->iov
.size
/ 512, dma_blk_cb
, dbs
);
178 static void dma_aio_cancel(BlockAIOCB
*acb
)
180 DMAAIOCB
*dbs
= container_of(acb
, DMAAIOCB
, common
);
182 trace_dma_aio_cancel(dbs
);
185 blk_aio_cancel_async(dbs
->acb
);
190 static const AIOCBInfo dma_aiocb_info
= {
191 .aiocb_size
= sizeof(DMAAIOCB
),
192 .cancel_async
= dma_aio_cancel
,
195 BlockAIOCB
*dma_blk_io(
196 BlockBackend
*blk
, QEMUSGList
*sg
, uint64_t sector_num
,
197 DMAIOFunc
*io_func
, BlockCompletionFunc
*cb
,
198 void *opaque
, DMADirection dir
)
200 DMAAIOCB
*dbs
= blk_aio_get(&dma_aiocb_info
, blk
, cb
, opaque
);
202 trace_dma_blk_io(dbs
, blk
, sector_num
, (dir
== DMA_DIRECTION_TO_DEVICE
));
207 dbs
->sector_num
= sector_num
;
208 dbs
->sg_cur_index
= 0;
209 dbs
->sg_cur_byte
= 0;
211 dbs
->io_func
= io_func
;
213 qemu_iovec_init(&dbs
->iov
, sg
->nsg
);
219 BlockAIOCB
*dma_blk_read(BlockBackend
*blk
,
220 QEMUSGList
*sg
, uint64_t sector
,
221 void (*cb
)(void *opaque
, int ret
), void *opaque
)
223 return dma_blk_io(blk
, sg
, sector
, blk_aio_readv
, cb
, opaque
,
224 DMA_DIRECTION_FROM_DEVICE
);
227 BlockAIOCB
*dma_blk_write(BlockBackend
*blk
,
228 QEMUSGList
*sg
, uint64_t sector
,
229 void (*cb
)(void *opaque
, int ret
), void *opaque
)
231 return dma_blk_io(blk
, sg
, sector
, blk_aio_writev
, cb
, opaque
,
232 DMA_DIRECTION_TO_DEVICE
);
236 static uint64_t dma_buf_rw(uint8_t *ptr
, int32_t len
, QEMUSGList
*sg
,
244 len
= MIN(len
, resid
);
246 ScatterGatherEntry entry
= sg
->sg
[sg_cur_index
++];
247 int32_t xfer
= MIN(len
, entry
.len
);
248 dma_memory_rw(sg
->as
, entry
.base
, ptr
, xfer
, dir
);
257 uint64_t dma_buf_read(uint8_t *ptr
, int32_t len
, QEMUSGList
*sg
)
259 return dma_buf_rw(ptr
, len
, sg
, DMA_DIRECTION_FROM_DEVICE
);
262 uint64_t dma_buf_write(uint8_t *ptr
, int32_t len
, QEMUSGList
*sg
)
264 return dma_buf_rw(ptr
, len
, sg
, DMA_DIRECTION_TO_DEVICE
);
267 void dma_acct_start(BlockBackend
*blk
, BlockAcctCookie
*cookie
,
268 QEMUSGList
*sg
, enum BlockAcctType type
)
270 block_acct_start(blk_get_stats(blk
), cookie
, sg
->size
, type
);