target/ppc/internal.h

   1 /*
   2  *  PowerPC internal definitions for qemu.
   3  *
   4  * This library is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU Lesser General Public
   6  * License as published by the Free Software Foundation; either
   7  * version 2.1 of the License, or (at your option) any later version.
   8  *
   9  * This library is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  12  * Lesser General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU Lesser General Public
  15  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #ifndef PPC_INTERNAL_H
  19 #define PPC_INTERNAL_H
  20
  21 #include "hw/registerfields.h"
  22
  23 /* PM instructions */
  24 typedef enum {
  25     PPC_PM_DOZE,
  26     PPC_PM_NAP,
  27     PPC_PM_SLEEP,
  28     PPC_PM_RVWINKLE,
  29     PPC_PM_STOP,
  30 } powerpc_pm_insn_t;
  31
  32 #define FUNC_MASK(name, ret_type, size, max_val)                  \
  33 static inline ret_type name(uint##size##_t start,                 \
  34                               uint##size##_t end)                 \
  35 {                                                                 \
  36     ret_type ret, max_bit = size - 1;                             \
  37                                                                   \
  38     if (likely(start == 0)) {                                     \
  39         ret = max_val << (max_bit - end);                         \
  40     } else if (likely(end == max_bit)) {                          \
  41         ret = max_val >> start;                                   \
  42     } else {                                                      \
  43         ret = (((uint##size##_t)(-1ULL)) >> (start)) ^            \
  44             (((uint##size##_t)(-1ULL) >> (end)) >> 1);            \
  45         if (unlikely(start > end)) {                              \
  46             return ~ret;                                          \
  47         }                                                         \
  48     }                                                             \
  49                                                                   \
  50     return ret;                                                   \
  51 }
  52
  53 #if defined(TARGET_PPC64)
  54 FUNC_MASK(MASK, target_ulong, 64, UINT64_MAX);
  55 #else
  56 FUNC_MASK(MASK, target_ulong, 32, UINT32_MAX);
  57 #endif
  58 FUNC_MASK(mask_u32, uint32_t, 32, UINT32_MAX);
  59 FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX);
  60
  61 /*****************************************************************************/
  62 /***                           Instruction decoding                        ***/
  63 #define EXTRACT_HELPER(name, shift, nb)                                       \
  64 static inline uint32_t name(uint32_t opcode)                                  \
  65 {                                                                             \
  66     return extract32(opcode, shift, nb);                                      \
  67 }
  68
  69 #define EXTRACT_SHELPER(name, shift, nb)                                      \
  70 static inline int32_t name(uint32_t opcode)                                   \
  71 {                                                                             \
  72     return sextract32(opcode, shift, nb);                                     \
  73 }
  74
  75 #define EXTRACT_HELPER_SPLIT(name, shift1, nb1, shift2, nb2)                  \
  76 static inline uint32_t name(uint32_t opcode)                                  \
  77 {                                                                             \
  78     return extract32(opcode, shift1, nb1) << nb2 |                            \
  79                extract32(opcode, shift2, nb2);                                \
  80 }
  81
  82 #define EXTRACT_HELPER_SPLIT_3(name,                                          \
  83                               d0_bits, shift_op_d0, shift_d0,                 \
  84                               d1_bits, shift_op_d1, shift_d1,                 \
  85                               d2_bits, shift_op_d2, shift_d2)                 \
  86 static inline int16_t name(uint32_t opcode)                                   \
  87 {                                                                             \
  88     return                                                                    \
  89         (((opcode >> (shift_op_d0)) & ((1 << (d0_bits)) - 1)) << (shift_d0)) | \
  90         (((opcode >> (shift_op_d1)) & ((1 << (d1_bits)) - 1)) << (shift_d1)) | \
  91         (((opcode >> (shift_op_d2)) & ((1 << (d2_bits)) - 1)) << (shift_d2));  \
  92 }
  93
  94
  95 /* Opcode part 1 */
  96 EXTRACT_HELPER(opc1, 26, 6);
  97 /* Opcode part 2 */
  98 EXTRACT_HELPER(opc2, 1, 5);
  99 /* Opcode part 3 */
 100 EXTRACT_HELPER(opc3, 6, 5);
 101 /* Opcode part 4 */
 102 EXTRACT_HELPER(opc4, 16, 5);
 103 /* Update Cr0 flags */
 104 EXTRACT_HELPER(Rc, 0, 1);
 105 /* Update Cr6 flags (Altivec) */
 106 EXTRACT_HELPER(Rc21, 10, 1);
 107 /* Destination */
 108 EXTRACT_HELPER(rD, 21, 5);
 109 /* Source */
 110 EXTRACT_HELPER(rS, 21, 5);
 111 /* First operand */
 112 EXTRACT_HELPER(rA, 16, 5);
 113 /* Second operand */
 114 EXTRACT_HELPER(rB, 11, 5);
 115 /* Third operand */
 116 EXTRACT_HELPER(rC, 6, 5);
 117 /***                               Get CRn                                 ***/
 118 EXTRACT_HELPER(crfD, 23, 3);
 119 EXTRACT_HELPER(BF, 23, 3);
 120 EXTRACT_HELPER(crfS, 18, 3);
 121 EXTRACT_HELPER(crbD, 21, 5);
 122 EXTRACT_HELPER(crbA, 16, 5);
 123 EXTRACT_HELPER(crbB, 11, 5);
 124 /* SPR / TBL */
 125 EXTRACT_HELPER(_SPR, 11, 10);
 126 static inline uint32_t SPR(uint32_t opcode)
 127 {
 128     uint32_t sprn = _SPR(opcode);
 129
 130     return ((sprn >> 5) & 0x1F) | ((sprn & 0x1F) << 5);
 131 }
 132 /***                              Get constants                            ***/
 133 /* 16 bits signed immediate value */
 134 EXTRACT_SHELPER(SIMM, 0, 16);
 135 /* 16 bits unsigned immediate value */
 136 EXTRACT_HELPER(UIMM, 0, 16);
 137 /* 5 bits signed immediate value */
 138 EXTRACT_SHELPER(SIMM5, 16, 5);
 139 /* 5 bits signed immediate value */
 140 EXTRACT_HELPER(UIMM5, 16, 5);
 141 /* 4 bits unsigned immediate value */
 142 EXTRACT_HELPER(UIMM4, 16, 4);
 143 /* Bit count */
 144 EXTRACT_HELPER(NB, 11, 5);
 145 /* Shift count */
 146 EXTRACT_HELPER(SH, 11, 5);
 147 /* lwat/stwat/ldat/lwat */
 148 EXTRACT_HELPER(FC, 11, 5);
 149 /* Vector shift count */
 150 EXTRACT_HELPER(VSH, 6, 4);
 151 /* Mask start */
 152 EXTRACT_HELPER(MB, 6, 5);
 153 /* Mask end */
 154 EXTRACT_HELPER(ME, 1, 5);
 155 /* Trap operand */
 156 EXTRACT_HELPER(TO, 21, 5);
 157
 158 EXTRACT_HELPER(CRM, 12, 8);
 159
 160 #ifndef CONFIG_USER_ONLY
 161 EXTRACT_HELPER(SR, 16, 4);
 162 #endif
 163
 164 /* mtfsf/mtfsfi */
 165 EXTRACT_HELPER(FPBF, 23, 3);
 166 EXTRACT_HELPER(FPIMM, 12, 4);
 167 EXTRACT_HELPER(FPL, 25, 1);
 168 EXTRACT_HELPER(FPFLM, 17, 8);
 169 EXTRACT_HELPER(FPW, 16, 1);
 170
 171 /* addpcis */
 172 EXTRACT_HELPER_SPLIT_3(DX, 10, 6, 6, 5, 16, 1, 1, 0, 0)
 173 #if defined(TARGET_PPC64)
 174 /* darn */
 175 EXTRACT_HELPER(L, 16, 2);
 176 #endif
 177 /* wait */
 178 EXTRACT_HELPER(WC, 21, 2);
 179 EXTRACT_HELPER(PL, 16, 2);
 180
 181 /***                            Jump target decoding                       ***/
 182 /* Immediate address */
 183 static inline target_ulong LI(uint32_t opcode)
 184 {
 185     return (opcode >> 0) & 0x03FFFFFC;
 186 }
 187
 188 static inline uint32_t BD(uint32_t opcode)
 189 {
 190     return (opcode >> 0) & 0xFFFC;
 191 }
 192
 193 EXTRACT_HELPER(BO, 21, 5);
 194 EXTRACT_HELPER(BI, 16, 5);
 195 /* Absolute/relative address */
 196 EXTRACT_HELPER(AA, 1, 1);
 197 /* Link */
 198 EXTRACT_HELPER(LK, 0, 1);
 199
 200 /* DFP Z22-form */
 201 EXTRACT_HELPER(DCM, 10, 6)
 202
 203 /* DFP Z23-form */
 204 EXTRACT_HELPER(RMC, 9, 2)
 205 EXTRACT_HELPER(Rrm, 16, 1)
 206
 207 EXTRACT_HELPER_SPLIT(DQxT, 3, 1, 21, 5);
 208 EXTRACT_HELPER_SPLIT(xT, 0, 1, 21, 5);
 209 EXTRACT_HELPER_SPLIT(xS, 0, 1, 21, 5);
 210 EXTRACT_HELPER_SPLIT(xA, 2, 1, 16, 5);
 211 EXTRACT_HELPER_SPLIT(xB, 1, 1, 11, 5);
 212 EXTRACT_HELPER_SPLIT(xC, 3, 1,  6, 5);
 213 EXTRACT_HELPER(DM, 8, 2);
 214 EXTRACT_HELPER(UIM, 16, 2);
 215 EXTRACT_HELPER(SHW, 8, 2);
 216 EXTRACT_HELPER(SP, 19, 2);
 217 EXTRACT_HELPER(IMM8, 11, 8);
 218 EXTRACT_HELPER(DCMX, 16, 7);
 219 EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
 220
 221 void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
 222 void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
 223 void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
 224
 225 /* translate.c */
 226
 227 int ppc_fixup_cpu(PowerPCCPU *cpu);
 228 void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp);
 229 void destroy_ppc_opcodes(PowerPCCPU *cpu);
 230
 231 /* gdbstub.c */
 232 void ppc_gdb_init(CPUState *cs, PowerPCCPUClass *ppc);
 233 const gchar *ppc_gdb_arch_name(CPUState *cs);
 234
 235 /**
 236  * prot_for_access_type:
 237  * @access_type: Access type
 238  *
 239  * Return the protection bit required for the given access type.
 240  */
 241 static inline int prot_for_access_type(MMUAccessType access_type)
 242 {
 243     switch (access_type) {
 244     case MMU_INST_FETCH:
 245         return PAGE_EXEC;
 246     case MMU_DATA_LOAD:
 247         return PAGE_READ;
 248     case MMU_DATA_STORE:
 249         return PAGE_WRITE;
 250     }
 251     g_assert_not_reached();
 252 }
 253
 254 #ifndef CONFIG_USER_ONLY
 255
 256 /* PowerPC MMU emulation */
 257
 258 typedef struct mmu_ctx_t mmu_ctx_t;
 259
 260 bool ppc_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
 261                       hwaddr *raddrp, int *psizep, int *protp,
 262                       int mmu_idx, bool guest_visible);
 263 int get_physical_address_wtlb(CPUPPCState *env, mmu_ctx_t *ctx,
 264                                      target_ulong eaddr,
 265                                      MMUAccessType access_type, int type,
 266                                      int mmu_idx);
 267 /* Software driven TLB helpers */
 268 int ppc6xx_tlb_getnum(CPUPPCState *env, target_ulong eaddr,
 269                                     int way, int is_code);
 270 /* Context used internally during MMU translations */
 271 struct mmu_ctx_t {
 272     hwaddr raddr;      /* Real address              */
 273     hwaddr eaddr;      /* Effective address         */
 274     int prot;                      /* Protection bits           */
 275     hwaddr hash[2];    /* Pagetable hash values     */
 276     target_ulong ptem;             /* Virtual segment ID | API  */
 277     int key;                       /* Access key                */
 278     int nx;                        /* Non-execute area          */
 279 };
 280
 281 #endif /* !CONFIG_USER_ONLY */
 282
 283 /* Common routines used by software and hardware TLBs emulation */
 284 static inline int pte_is_valid(target_ulong pte0)
 285 {
 286     return pte0 & 0x80000000 ? 1 : 0;
 287 }
 288
 289 static inline void pte_invalidate(target_ulong *pte0)
 290 {
 291     *pte0 &= ~0x80000000;
 292 }
 293
 294 #define PTE_PTEM_MASK 0x7FFFFFBF
 295 #define PTE_CHECK_MASK (TARGET_PAGE_MASK | 0x7B)
 296
 297 #ifdef CONFIG_USER_ONLY
 298 void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr,
 299                             MMUAccessType access_type,
 300                             bool maperr, uintptr_t ra);
 301 #else
 302 bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 303                       MMUAccessType access_type, int mmu_idx,
 304                       bool probe, uintptr_t retaddr);
 305 G_NORETURN void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
 306                                             MMUAccessType access_type, int mmu_idx,
 307                                             uintptr_t retaddr);
 308 void ppc_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
 309                                    vaddr addr, unsigned size,
 310                                    MMUAccessType access_type,
 311                                    int mmu_idx, MemTxAttrs attrs,
 312                                    MemTxResult response, uintptr_t retaddr);
 313 void ppc_cpu_debug_excp_handler(CPUState *cs);
 314 bool ppc_cpu_debug_check_breakpoint(CPUState *cs);
 315 bool ppc_cpu_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp);
 316 #endif
 317
 318 FIELD(GER_MSK, XMSK, 0, 4)
 319 FIELD(GER_MSK, YMSK, 4, 4)
 320 FIELD(GER_MSK, PMSK, 8, 8)
 321
 322 static inline int ger_pack_masks(int pmsk, int ymsk, int xmsk)
 323 {
 324     int msk = 0;
 325     msk = FIELD_DP32(msk, GER_MSK, XMSK, xmsk);
 326     msk = FIELD_DP32(msk, GER_MSK, YMSK, ymsk);
 327     msk = FIELD_DP32(msk, GER_MSK, PMSK, pmsk);
 328     return msk;
 329 }
 330
 331 #endif /* PPC_INTERNAL_H */