target/arm: Restrict v7A TCG cpus to TCG accel
[qemu/ar7.git] / tcg / tci / tcg-target-con-str.h
blob87c0f19e9c2ea2cf266fad24cbffdfcc37ef571b
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define TCI target-specific operand constraints.
4 * Copyright (c) 2021 Linaro
5 */
7 /*
8 * Define constraint letters for register sets:
9 * REGS(letter, register_mask)
11 REGS('r', MAKE_64BIT_MASK(0, TCG_TARGET_NB_REGS))