target/arm: Restrict v7A TCG cpus to TCG accel
[qemu/ar7.git] / tcg / s390 / tcg-target-con-str.h
blob892d8f8c0694f2d3b0bb3776b49047e0d34bb2f8
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define S390 target-specific operand constraints.
4 * Copyright (c) 2021 Linaro
5 */
7 /*
8 * Define constraint letters for register sets:
9 * REGS(letter, register_mask)
11 REGS('r', ALL_GENERAL_REGS)
12 REGS('L', ALL_GENERAL_REGS & ~SOFTMMU_RESERVE_REGS)
14 * A (single) even/odd pair for division.
15 * TODO: Add something to the register allocator to allow
16 * this kind of regno+1 pairing to be done more generally.
18 REGS('a', 1u << TCG_REG_R2)
19 REGS('b', 1u << TCG_REG_R3)
22 * Define constraint letters for constants:
23 * CONST(letter, TCG_CT_CONST_* bit set)
25 CONST('A', TCG_CT_CONST_S33)
26 CONST('I', TCG_CT_CONST_S16)
27 CONST('J', TCG_CT_CONST_S32)
28 CONST('Z', TCG_CT_CONST_ZERO)