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memory: add getter for owner
[qemu/ar7.git] / memory.c
blobf85774a11ffb214f4264cdb547d515dac22151c3
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "sysemu/kvm.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25
26 //#define DEBUG_UNASSIGNED
27
28 static unsigned memory_region_transaction_depth;
29 static bool memory_region_update_pending;
30 static bool global_dirty_log = false;
31
32 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
33 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
34
35 static QTAILQ_HEAD(, AddressSpace) address_spaces
36 = QTAILQ_HEAD_INITIALIZER(address_spaces);
37
38 typedef struct AddrRange AddrRange;
39
40 /*
41 * Note using signed integers limits us to physical addresses at most
42 * 63 bits wide. They are needed for negative offsetting in aliases
43 * (large MemoryRegion::alias_offset).
44 */
45 struct AddrRange {
46 Int128 start;
47 Int128 size;
48 };
49
50 static AddrRange addrrange_make(Int128 start, Int128 size)
51 {
52 return (AddrRange) { start, size };
53 }
54
55 static bool addrrange_equal(AddrRange r1, AddrRange r2)
56 {
57 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
58 }
59
60 static Int128 addrrange_end(AddrRange r)
61 {
62 return int128_add(r.start, r.size);
63 }
64
65 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
66 {
67 int128_addto(&range.start, delta);
68 return range;
69 }
70
71 static bool addrrange_contains(AddrRange range, Int128 addr)
72 {
73 return int128_ge(addr, range.start)
74 && int128_lt(addr, addrrange_end(range));
75 }
76
77 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
78 {
79 return addrrange_contains(r1, r2.start)
80 || addrrange_contains(r2, r1.start);
81 }
82
83 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
84 {
85 Int128 start = int128_max(r1.start, r2.start);
86 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
87 return addrrange_make(start, int128_sub(end, start));
88 }
89
90 enum ListenerDirection { Forward, Reverse };
91
92 static bool memory_listener_match(MemoryListener *listener,
93 MemoryRegionSection *section)
94 {
95 return !listener->address_space_filter
96 || listener->address_space_filter == section->address_space;
97 }
98
99 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
100 do { \
101 MemoryListener *_listener; \
102 \
103 switch (_direction) { \
104 case Forward: \
105 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
106 if (_listener->_callback) { \
107 _listener->_callback(_listener, ##_args); \
108 } \
109 } \
110 break; \
111 case Reverse: \
112 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
113 memory_listeners, link) { \
114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
117 } \
118 break; \
119 default: \
120 abort(); \
121 } \
122 } while (0)
123
124 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
125 do { \
126 MemoryListener *_listener; \
127 \
128 switch (_direction) { \
129 case Forward: \
130 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
131 if (_listener->_callback \
132 && memory_listener_match(_listener, _section)) { \
133 _listener->_callback(_listener, _section, ##_args); \
134 } \
135 } \
136 break; \
137 case Reverse: \
138 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
139 memory_listeners, link) { \
140 if (_listener->_callback \
141 && memory_listener_match(_listener, _section)) { \
142 _listener->_callback(_listener, _section, ##_args); \
143 } \
144 } \
145 break; \
146 default: \
147 abort(); \
148 } \
149 } while (0)
150
151 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
152 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
153 .mr = (fr)->mr, \
154 .address_space = (as), \
155 .offset_within_region = (fr)->offset_in_region, \
156 .size = (fr)->addr.size, \
157 .offset_within_address_space = int128_get64((fr)->addr.start), \
158 .readonly = (fr)->readonly, \
159 }))
160
161 struct CoalescedMemoryRange {
162 AddrRange addr;
163 QTAILQ_ENTRY(CoalescedMemoryRange) link;
164 };
165
166 struct MemoryRegionIoeventfd {
167 AddrRange addr;
168 bool match_data;
169 uint64_t data;
170 EventNotifier *e;
171 };
172
173 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
174 MemoryRegionIoeventfd b)
175 {
176 if (int128_lt(a.addr.start, b.addr.start)) {
177 return true;
178 } else if (int128_gt(a.addr.start, b.addr.start)) {
179 return false;
180 } else if (int128_lt(a.addr.size, b.addr.size)) {
181 return true;
182 } else if (int128_gt(a.addr.size, b.addr.size)) {
183 return false;
184 } else if (a.match_data < b.match_data) {
185 return true;
186 } else if (a.match_data > b.match_data) {
187 return false;
188 } else if (a.match_data) {
189 if (a.data < b.data) {
190 return true;
191 } else if (a.data > b.data) {
192 return false;
193 }
194 }
195 if (a.e < b.e) {
196 return true;
197 } else if (a.e > b.e) {
198 return false;
199 }
200 return false;
201 }
202
203 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
204 MemoryRegionIoeventfd b)
205 {
206 return !memory_region_ioeventfd_before(a, b)
207 && !memory_region_ioeventfd_before(b, a);
208 }
209
210 typedef struct FlatRange FlatRange;
211 typedef struct FlatView FlatView;
212
213 /* Range of memory in the global map. Addresses are absolute. */
214 struct FlatRange {
215 MemoryRegion *mr;
216 hwaddr offset_in_region;
217 AddrRange addr;
218 uint8_t dirty_log_mask;
219 bool romd_mode;
220 bool readonly;
221 };
222
223 /* Flattened global view of current active memory hierarchy. Kept in sorted
224 * order.
225 */
226 struct FlatView {
227 FlatRange *ranges;
228 unsigned nr;
229 unsigned nr_allocated;
230 };
231
232 typedef struct AddressSpaceOps AddressSpaceOps;
233
234 #define FOR_EACH_FLAT_RANGE(var, view) \
235 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
236
237 static bool flatrange_equal(FlatRange *a, FlatRange *b)
238 {
239 return a->mr == b->mr
240 && addrrange_equal(a->addr, b->addr)
241 && a->offset_in_region == b->offset_in_region
242 && a->romd_mode == b->romd_mode
243 && a->readonly == b->readonly;
244 }
245
246 static void flatview_init(FlatView *view)
247 {
248 view->ranges = NULL;
249 view->nr = 0;
250 view->nr_allocated = 0;
251 }
252
253 /* Insert a range into a given position. Caller is responsible for maintaining
254 * sorting order.
255 */
256 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
257 {
258 if (view->nr == view->nr_allocated) {
259 view->nr_allocated = MAX(2 * view->nr, 10);
260 view->ranges = g_realloc(view->ranges,
261 view->nr_allocated * sizeof(*view->ranges));
262 }
263 memmove(view->ranges + pos + 1, view->ranges + pos,
264 (view->nr - pos) * sizeof(FlatRange));
265 view->ranges[pos] = *range;
266 ++view->nr;
267 }
268
269 static void flatview_destroy(FlatView *view)
270 {
271 g_free(view->ranges);
272 }
273
274 static bool can_merge(FlatRange *r1, FlatRange *r2)
275 {
276 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
277 && r1->mr == r2->mr
278 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
279 r1->addr.size),
280 int128_make64(r2->offset_in_region))
281 && r1->dirty_log_mask == r2->dirty_log_mask
282 && r1->romd_mode == r2->romd_mode
283 && r1->readonly == r2->readonly;
284 }
285
286 /* Attempt to simplify a view by merging adjacent ranges */
287 static void flatview_simplify(FlatView *view)
288 {
289 unsigned i, j;
290
291 i = 0;
292 while (i < view->nr) {
293 j = i + 1;
294 while (j < view->nr
295 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
296 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
297 ++j;
298 }
299 ++i;
300 memmove(&view->ranges[i], &view->ranges[j],
301 (view->nr - j) * sizeof(view->ranges[j]));
302 view->nr -= j - i;
303 }
304 }
305
306 static void memory_region_oldmmio_read_accessor(void *opaque,
307 hwaddr addr,
308 uint64_t *value,
309 unsigned size,
310 unsigned shift,
311 uint64_t mask)
312 {
313 MemoryRegion *mr = opaque;
314 uint64_t tmp;
315
316 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
317 *value |= (tmp & mask) << shift;
318 }
319
320 static void memory_region_read_accessor(void *opaque,
321 hwaddr addr,
322 uint64_t *value,
323 unsigned size,
324 unsigned shift,
325 uint64_t mask)
326 {
327 MemoryRegion *mr = opaque;
328 uint64_t tmp;
329
330 if (mr->flush_coalesced_mmio) {
331 qemu_flush_coalesced_mmio_buffer();
332 }
333 tmp = mr->ops->read(mr->opaque, addr, size);
334 *value |= (tmp & mask) << shift;
335 }
336
337 static void memory_region_oldmmio_write_accessor(void *opaque,
338 hwaddr addr,
339 uint64_t *value,
340 unsigned size,
341 unsigned shift,
342 uint64_t mask)
343 {
344 MemoryRegion *mr = opaque;
345 uint64_t tmp;
346
347 tmp = (*value >> shift) & mask;
348 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
349 }
350
351 static void memory_region_write_accessor(void *opaque,
352 hwaddr addr,
353 uint64_t *value,
354 unsigned size,
355 unsigned shift,
356 uint64_t mask)
357 {
358 MemoryRegion *mr = opaque;
359 uint64_t tmp;
360
361 if (mr->flush_coalesced_mmio) {
362 qemu_flush_coalesced_mmio_buffer();
363 }
364 tmp = (*value >> shift) & mask;
365 mr->ops->write(mr->opaque, addr, tmp, size);
366 }
367
368 static void access_with_adjusted_size(hwaddr addr,
369 uint64_t *value,
370 unsigned size,
371 unsigned access_size_min,
372 unsigned access_size_max,
373 void (*access)(void *opaque,
374 hwaddr addr,
375 uint64_t *value,
376 unsigned size,
377 unsigned shift,
378 uint64_t mask),
379 void *opaque)
380 {
381 uint64_t access_mask;
382 unsigned access_size;
383 unsigned i;
384
385 if (!access_size_min) {
386 access_size_min = 1;
387 }
388 if (!access_size_max) {
389 access_size_max = 4;
390 }
391
392 /* FIXME: support unaligned access? */
393 access_size = MAX(MIN(size, access_size_max), access_size_min);
394 access_mask = -1ULL >> (64 - access_size * 8);
395 for (i = 0; i < size; i += access_size) {
396 #ifdef TARGET_WORDS_BIGENDIAN
397 access(opaque, addr + i, value, access_size,
398 (size - access_size - i) * 8, access_mask);
399 #else
400 access(opaque, addr + i, value, access_size, i * 8, access_mask);
401 #endif
402 }
403 }
404
405 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
406 {
407 AddressSpace *as;
408
409 while (mr->parent) {
410 mr = mr->parent;
411 }
412 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
413 if (mr == as->root) {
414 return as;
415 }
416 }
417 abort();
418 }
419
420 /* Render a memory region into the global view. Ranges in @view obscure
421 * ranges in @mr.
422 */
423 static void render_memory_region(FlatView *view,
424 MemoryRegion *mr,
425 Int128 base,
426 AddrRange clip,
427 bool readonly)
428 {
429 MemoryRegion *subregion;
430 unsigned i;
431 hwaddr offset_in_region;
432 Int128 remain;
433 Int128 now;
434 FlatRange fr;
435 AddrRange tmp;
436
437 if (!mr->enabled) {
438 return;
439 }
440
441 int128_addto(&base, int128_make64(mr->addr));
442 readonly |= mr->readonly;
443
444 tmp = addrrange_make(base, mr->size);
445
446 if (!addrrange_intersects(tmp, clip)) {
447 return;
448 }
449
450 clip = addrrange_intersection(tmp, clip);
451
452 if (mr->alias) {
453 int128_subfrom(&base, int128_make64(mr->alias->addr));
454 int128_subfrom(&base, int128_make64(mr->alias_offset));
455 render_memory_region(view, mr->alias, base, clip, readonly);
456 return;
457 }
458
459 /* Render subregions in priority order. */
460 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
461 render_memory_region(view, subregion, base, clip, readonly);
462 }
463
464 if (!mr->terminates) {
465 return;
466 }
467
468 offset_in_region = int128_get64(int128_sub(clip.start, base));
469 base = clip.start;
470 remain = clip.size;
471
472 fr.mr = mr;
473 fr.dirty_log_mask = mr->dirty_log_mask;
474 fr.romd_mode = mr->romd_mode;
475 fr.readonly = readonly;
476
477 /* Render the region itself into any gaps left by the current view. */
478 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
479 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
480 continue;
481 }
482 if (int128_lt(base, view->ranges[i].addr.start)) {
483 now = int128_min(remain,
484 int128_sub(view->ranges[i].addr.start, base));
485 fr.offset_in_region = offset_in_region;
486 fr.addr = addrrange_make(base, now);
487 flatview_insert(view, i, &fr);
488 ++i;
489 int128_addto(&base, now);
490 offset_in_region += int128_get64(now);
491 int128_subfrom(&remain, now);
492 }
493 now = int128_sub(int128_min(int128_add(base, remain),
494 addrrange_end(view->ranges[i].addr)),
495 base);
496 int128_addto(&base, now);
497 offset_in_region += int128_get64(now);
498 int128_subfrom(&remain, now);
499 }
500 if (int128_nz(remain)) {
501 fr.offset_in_region = offset_in_region;
502 fr.addr = addrrange_make(base, remain);
503 flatview_insert(view, i, &fr);
504 }
505 }
506
507 /* Render a memory topology into a list of disjoint absolute ranges. */
508 static FlatView generate_memory_topology(MemoryRegion *mr)
509 {
510 FlatView view;
511
512 flatview_init(&view);
513
514 if (mr) {
515 render_memory_region(&view, mr, int128_zero(),
516 addrrange_make(int128_zero(), int128_2_64()), false);
517 }
518 flatview_simplify(&view);
519
520 return view;
521 }
522
523 static void address_space_add_del_ioeventfds(AddressSpace *as,
524 MemoryRegionIoeventfd *fds_new,
525 unsigned fds_new_nb,
526 MemoryRegionIoeventfd *fds_old,
527 unsigned fds_old_nb)
528 {
529 unsigned iold, inew;
530 MemoryRegionIoeventfd *fd;
531 MemoryRegionSection section;
532
533 /* Generate a symmetric difference of the old and new fd sets, adding
534 * and deleting as necessary.
535 */
536
537 iold = inew = 0;
538 while (iold < fds_old_nb || inew < fds_new_nb) {
539 if (iold < fds_old_nb
540 && (inew == fds_new_nb
541 || memory_region_ioeventfd_before(fds_old[iold],
542 fds_new[inew]))) {
543 fd = &fds_old[iold];
544 section = (MemoryRegionSection) {
545 .address_space = as,
546 .offset_within_address_space = int128_get64(fd->addr.start),
547 .size = fd->addr.size,
548 };
549 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
550 fd->match_data, fd->data, fd->e);
551 ++iold;
552 } else if (inew < fds_new_nb
553 && (iold == fds_old_nb
554 || memory_region_ioeventfd_before(fds_new[inew],
555 fds_old[iold]))) {
556 fd = &fds_new[inew];
557 section = (MemoryRegionSection) {
558 .address_space = as,
559 .offset_within_address_space = int128_get64(fd->addr.start),
560 .size = fd->addr.size,
561 };
562 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
563 fd->match_data, fd->data, fd->e);
564 ++inew;
565 } else {
566 ++iold;
567 ++inew;
568 }
569 }
570 }
571
572 static void address_space_update_ioeventfds(AddressSpace *as)
573 {
574 FlatRange *fr;
575 unsigned ioeventfd_nb = 0;
576 MemoryRegionIoeventfd *ioeventfds = NULL;
577 AddrRange tmp;
578 unsigned i;
579
580 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
581 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
582 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
583 int128_sub(fr->addr.start,
584 int128_make64(fr->offset_in_region)));
585 if (addrrange_intersects(fr->addr, tmp)) {
586 ++ioeventfd_nb;
587 ioeventfds = g_realloc(ioeventfds,
588 ioeventfd_nb * sizeof(*ioeventfds));
589 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
590 ioeventfds[ioeventfd_nb-1].addr = tmp;
591 }
592 }
593 }
594
595 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
596 as->ioeventfds, as->ioeventfd_nb);
597
598 g_free(as->ioeventfds);
599 as->ioeventfds = ioeventfds;
600 as->ioeventfd_nb = ioeventfd_nb;
601 }
602
603 static void address_space_update_topology_pass(AddressSpace *as,
604 FlatView old_view,
605 FlatView new_view,
606 bool adding)
607 {
608 unsigned iold, inew;
609 FlatRange *frold, *frnew;
610
611 /* Generate a symmetric difference of the old and new memory maps.
612 * Kill ranges in the old map, and instantiate ranges in the new map.
613 */
614 iold = inew = 0;
615 while (iold < old_view.nr || inew < new_view.nr) {
616 if (iold < old_view.nr) {
617 frold = &old_view.ranges[iold];
618 } else {
619 frold = NULL;
620 }
621 if (inew < new_view.nr) {
622 frnew = &new_view.ranges[inew];
623 } else {
624 frnew = NULL;
625 }
626
627 if (frold
628 && (!frnew
629 || int128_lt(frold->addr.start, frnew->addr.start)
630 || (int128_eq(frold->addr.start, frnew->addr.start)
631 && !flatrange_equal(frold, frnew)))) {
632 /* In old but not in new, or in both but attributes changed. */
633
634 if (!adding) {
635 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
636 }
637
638 ++iold;
639 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
640 /* In both and unchanged (except logging may have changed) */
641
642 if (adding) {
643 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
644 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
645 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
646 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
647 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
648 }
649 }
650
651 ++iold;
652 ++inew;
653 } else {
654 /* In new */
655
656 if (adding) {
657 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
658 }
659
660 ++inew;
661 }
662 }
663 }
664
665
666 static void address_space_update_topology(AddressSpace *as)
667 {
668 FlatView old_view = *as->current_map;
669 FlatView new_view = generate_memory_topology(as->root);
670
671 address_space_update_topology_pass(as, old_view, new_view, false);
672 address_space_update_topology_pass(as, old_view, new_view, true);
673
674 *as->current_map = new_view;
675 flatview_destroy(&old_view);
676 address_space_update_ioeventfds(as);
677 }
678
679 void memory_region_transaction_begin(void)
680 {
681 qemu_flush_coalesced_mmio_buffer();
682 ++memory_region_transaction_depth;
683 }
684
685 void memory_region_transaction_commit(void)
686 {
687 AddressSpace *as;
688
689 assert(memory_region_transaction_depth);
690 --memory_region_transaction_depth;
691 if (!memory_region_transaction_depth && memory_region_update_pending) {
692 memory_region_update_pending = false;
693 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
694
695 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
696 address_space_update_topology(as);
697 }
698
699 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
700 }
701 }
702
703 static void memory_region_destructor_none(MemoryRegion *mr)
704 {
705 }
706
707 static void memory_region_destructor_ram(MemoryRegion *mr)
708 {
709 qemu_ram_free(mr->ram_addr);
710 }
711
712 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
713 {
714 qemu_ram_free_from_ptr(mr->ram_addr);
715 }
716
717 static void memory_region_destructor_rom_device(MemoryRegion *mr)
718 {
719 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
720 }
721
722 static bool memory_region_wrong_endianness(MemoryRegion *mr)
723 {
724 #ifdef TARGET_WORDS_BIGENDIAN
725 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
726 #else
727 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
728 #endif
729 }
730
731 void memory_region_init(MemoryRegion *mr,
732 Object *owner,
733 const char *name,
734 uint64_t size)
735 {
736 mr->ops = &unassigned_mem_ops;
737 mr->opaque = NULL;
738 mr->owner = owner;
739 mr->iommu_ops = NULL;
740 mr->parent = NULL;
741 mr->owner = NULL;
742 mr->size = int128_make64(size);
743 if (size == UINT64_MAX) {
744 mr->size = int128_2_64();
745 }
746 mr->addr = 0;
747 mr->subpage = false;
748 mr->enabled = true;
749 mr->terminates = false;
750 mr->ram = false;
751 mr->romd_mode = true;
752 mr->readonly = false;
753 mr->rom_device = false;
754 mr->destructor = memory_region_destructor_none;
755 mr->priority = 0;
756 mr->may_overlap = false;
757 mr->alias = NULL;
758 QTAILQ_INIT(&mr->subregions);
759 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
760 QTAILQ_INIT(&mr->coalesced);
761 mr->name = g_strdup(name);
762 mr->dirty_log_mask = 0;
763 mr->ioeventfd_nb = 0;
764 mr->ioeventfds = NULL;
765 mr->flush_coalesced_mmio = false;
766 }
767
768 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
769 unsigned size)
770 {
771 #ifdef DEBUG_UNASSIGNED
772 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
773 #endif
774 if (cpu_single_env != NULL) {
775 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
776 addr, false, false, 0, size);
777 }
778 return 0;
779 }
780
781 static void unassigned_mem_write(void *opaque, hwaddr addr,
782 uint64_t val, unsigned size)
783 {
784 #ifdef DEBUG_UNASSIGNED
785 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
786 #endif
787 if (cpu_single_env != NULL) {
788 cpu_unassigned_access(ENV_GET_CPU(cpu_single_env),
789 addr, true, false, 0, size);
790 }
791 }
792
793 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
794 unsigned size, bool is_write)
795 {
796 return false;
797 }
798
799 const MemoryRegionOps unassigned_mem_ops = {
800 .valid.accepts = unassigned_mem_accepts,
801 .endianness = DEVICE_NATIVE_ENDIAN,
802 };
803
804 bool memory_region_access_valid(MemoryRegion *mr,
805 hwaddr addr,
806 unsigned size,
807 bool is_write)
808 {
809 int access_size_min, access_size_max;
810 int access_size, i;
811
812 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
813 return false;
814 }
815
816 if (!mr->ops->valid.accepts) {
817 return true;
818 }
819
820 access_size_min = mr->ops->valid.min_access_size;
821 if (!mr->ops->valid.min_access_size) {
822 access_size_min = 1;
823 }
824
825 access_size_max = mr->ops->valid.max_access_size;
826 if (!mr->ops->valid.max_access_size) {
827 access_size_max = 4;
828 }
829
830 access_size = MAX(MIN(size, access_size_max), access_size_min);
831 for (i = 0; i < size; i += access_size) {
832 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
833 is_write)) {
834 return false;
835 }
836 }
837
838 return true;
839 }
840
841 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
842 hwaddr addr,
843 unsigned size)
844 {
845 uint64_t data = 0;
846
847 if (mr->ops->read) {
848 access_with_adjusted_size(addr, &data, size,
849 mr->ops->impl.min_access_size,
850 mr->ops->impl.max_access_size,
851 memory_region_read_accessor, mr);
852 } else {
853 access_with_adjusted_size(addr, &data, size, 1, 4,
854 memory_region_oldmmio_read_accessor, mr);
855 }
856
857 return data;
858 }
859
860 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
861 {
862 if (memory_region_wrong_endianness(mr)) {
863 switch (size) {
864 case 1:
865 break;
866 case 2:
867 *data = bswap16(*data);
868 break;
869 case 4:
870 *data = bswap32(*data);
871 break;
872 case 8:
873 *data = bswap64(*data);
874 break;
875 default:
876 abort();
877 }
878 }
879 }
880
881 static bool memory_region_dispatch_read(MemoryRegion *mr,
882 hwaddr addr,
883 uint64_t *pval,
884 unsigned size)
885 {
886 if (!memory_region_access_valid(mr, addr, size, false)) {
887 *pval = unassigned_mem_read(mr, addr, size);
888 return true;
889 }
890
891 *pval = memory_region_dispatch_read1(mr, addr, size);
892 adjust_endianness(mr, pval, size);
893 return false;
894 }
895
896 static bool memory_region_dispatch_write(MemoryRegion *mr,
897 hwaddr addr,
898 uint64_t data,
899 unsigned size)
900 {
901 if (!memory_region_access_valid(mr, addr, size, true)) {
902 unassigned_mem_write(mr, addr, data, size);
903 return true;
904 }
905
906 adjust_endianness(mr, &data, size);
907
908 if (mr->ops->write) {
909 access_with_adjusted_size(addr, &data, size,
910 mr->ops->impl.min_access_size,
911 mr->ops->impl.max_access_size,
912 memory_region_write_accessor, mr);
913 } else {
914 access_with_adjusted_size(addr, &data, size, 1, 4,
915 memory_region_oldmmio_write_accessor, mr);
916 }
917 return false;
918 }
919
920 void memory_region_init_io(MemoryRegion *mr,
921 Object *owner,
922 const MemoryRegionOps *ops,
923 void *opaque,
924 const char *name,
925 uint64_t size)
926 {
927 memory_region_init(mr, owner, name, size);
928 mr->ops = ops;
929 mr->opaque = opaque;
930 mr->terminates = true;
931 mr->ram_addr = ~(ram_addr_t)0;
932 }
933
934 void memory_region_init_ram(MemoryRegion *mr,
935 Object *owner,
936 const char *name,
937 uint64_t size)
938 {
939 memory_region_init(mr, owner, name, size);
940 mr->ram = true;
941 mr->terminates = true;
942 mr->destructor = memory_region_destructor_ram;
943 mr->ram_addr = qemu_ram_alloc(size, mr);
944 }
945
946 void memory_region_init_ram_ptr(MemoryRegion *mr,
947 Object *owner,
948 const char *name,
949 uint64_t size,
950 void *ptr)
951 {
952 memory_region_init(mr, owner, name, size);
953 mr->ram = true;
954 mr->terminates = true;
955 mr->destructor = memory_region_destructor_ram_from_ptr;
956 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
957 }
958
959 void memory_region_init_alias(MemoryRegion *mr,
960 Object *owner,
961 const char *name,
962 MemoryRegion *orig,
963 hwaddr offset,
964 uint64_t size)
965 {
966 memory_region_init(mr, owner, name, size);
967 mr->alias = orig;
968 mr->alias_offset = offset;
969 }
970
971 void memory_region_init_rom_device(MemoryRegion *mr,
972 Object *owner,
973 const MemoryRegionOps *ops,
974 void *opaque,
975 const char *name,
976 uint64_t size)
977 {
978 memory_region_init(mr, owner, name, size);
979 mr->ops = ops;
980 mr->opaque = opaque;
981 mr->terminates = true;
982 mr->rom_device = true;
983 mr->destructor = memory_region_destructor_rom_device;
984 mr->ram_addr = qemu_ram_alloc(size, mr);
985 }
986
987 void memory_region_init_iommu(MemoryRegion *mr,
988 Object *owner,
989 const MemoryRegionIOMMUOps *ops,
990 const char *name,
991 uint64_t size)
992 {
993 memory_region_init(mr, owner, name, size);
994 mr->iommu_ops = ops,
995 mr->terminates = true; /* then re-forwards */
996 notifier_list_init(&mr->iommu_notify);
997 }
998
999 void memory_region_init_reservation(MemoryRegion *mr,
1000 Object *owner,
1001 const char *name,
1002 uint64_t size)
1003 {
1004 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1005 }
1006
1007 void memory_region_destroy(MemoryRegion *mr)
1008 {
1009 assert(QTAILQ_EMPTY(&mr->subregions));
1010 assert(memory_region_transaction_depth == 0);
1011 mr->destructor(mr);
1012 memory_region_clear_coalescing(mr);
1013 g_free((char *)mr->name);
1014 g_free(mr->ioeventfds);
1015 }
1016
1017 Object *memory_region_owner(MemoryRegion *mr)
1018 {
1019 return mr->owner;
1020 }
1021
1022 uint64_t memory_region_size(MemoryRegion *mr)
1023 {
1024 if (int128_eq(mr->size, int128_2_64())) {
1025 return UINT64_MAX;
1026 }
1027 return int128_get64(mr->size);
1028 }
1029
1030 const char *memory_region_name(MemoryRegion *mr)
1031 {
1032 return mr->name;
1033 }
1034
1035 bool memory_region_is_ram(MemoryRegion *mr)
1036 {
1037 return mr->ram;
1038 }
1039
1040 bool memory_region_is_logging(MemoryRegion *mr)
1041 {
1042 return mr->dirty_log_mask;
1043 }
1044
1045 bool memory_region_is_rom(MemoryRegion *mr)
1046 {
1047 return mr->ram && mr->readonly;
1048 }
1049
1050 bool memory_region_is_iommu(MemoryRegion *mr)
1051 {
1052 return mr->iommu_ops;
1053 }
1054
1055 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1056 {
1057 notifier_list_add(&mr->iommu_notify, n);
1058 }
1059
1060 void memory_region_unregister_iommu_notifier(Notifier *n)
1061 {
1062 notifier_remove(n);
1063 }
1064
1065 void memory_region_notify_iommu(MemoryRegion *mr,
1066 IOMMUTLBEntry entry)
1067 {
1068 assert(memory_region_is_iommu(mr));
1069 notifier_list_notify(&mr->iommu_notify, &entry);
1070 }
1071
1072 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1073 {
1074 uint8_t mask = 1 << client;
1075
1076 memory_region_transaction_begin();
1077 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1078 memory_region_update_pending |= mr->enabled;
1079 memory_region_transaction_commit();
1080 }
1081
1082 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1083 hwaddr size, unsigned client)
1084 {
1085 assert(mr->terminates);
1086 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1087 1 << client);
1088 }
1089
1090 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1091 hwaddr size)
1092 {
1093 assert(mr->terminates);
1094 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1095 }
1096
1097 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1098 hwaddr size, unsigned client)
1099 {
1100 bool ret;
1101 assert(mr->terminates);
1102 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1103 1 << client);
1104 if (ret) {
1105 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1106 mr->ram_addr + addr + size,
1107 1 << client);
1108 }
1109 return ret;
1110 }
1111
1112
1113 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1114 {
1115 AddressSpace *as;
1116 FlatRange *fr;
1117
1118 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1119 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1120 if (fr->mr == mr) {
1121 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1122 }
1123 }
1124 }
1125 }
1126
1127 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1128 {
1129 if (mr->readonly != readonly) {
1130 memory_region_transaction_begin();
1131 mr->readonly = readonly;
1132 memory_region_update_pending |= mr->enabled;
1133 memory_region_transaction_commit();
1134 }
1135 }
1136
1137 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1138 {
1139 if (mr->romd_mode != romd_mode) {
1140 memory_region_transaction_begin();
1141 mr->romd_mode = romd_mode;
1142 memory_region_update_pending |= mr->enabled;
1143 memory_region_transaction_commit();
1144 }
1145 }
1146
1147 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1148 hwaddr size, unsigned client)
1149 {
1150 assert(mr->terminates);
1151 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1152 mr->ram_addr + addr + size,
1153 1 << client);
1154 }
1155
1156 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1157 {
1158 if (mr->alias) {
1159 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1160 }
1161
1162 assert(mr->terminates);
1163
1164 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1165 }
1166
1167 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1168 {
1169 FlatRange *fr;
1170 CoalescedMemoryRange *cmr;
1171 AddrRange tmp;
1172 MemoryRegionSection section;
1173
1174 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1175 if (fr->mr == mr) {
1176 section = (MemoryRegionSection) {
1177 .address_space = as,
1178 .offset_within_address_space = int128_get64(fr->addr.start),
1179 .size = fr->addr.size,
1180 };
1181
1182 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1183 int128_get64(fr->addr.start),
1184 int128_get64(fr->addr.size));
1185 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1186 tmp = addrrange_shift(cmr->addr,
1187 int128_sub(fr->addr.start,
1188 int128_make64(fr->offset_in_region)));
1189 if (!addrrange_intersects(tmp, fr->addr)) {
1190 continue;
1191 }
1192 tmp = addrrange_intersection(tmp, fr->addr);
1193 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1194 int128_get64(tmp.start),
1195 int128_get64(tmp.size));
1196 }
1197 }
1198 }
1199 }
1200
1201 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1202 {
1203 AddressSpace *as;
1204
1205 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1206 memory_region_update_coalesced_range_as(mr, as);
1207 }
1208 }
1209
1210 void memory_region_set_coalescing(MemoryRegion *mr)
1211 {
1212 memory_region_clear_coalescing(mr);
1213 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1214 }
1215
1216 void memory_region_add_coalescing(MemoryRegion *mr,
1217 hwaddr offset,
1218 uint64_t size)
1219 {
1220 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1221
1222 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1223 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1224 memory_region_update_coalesced_range(mr);
1225 memory_region_set_flush_coalesced(mr);
1226 }
1227
1228 void memory_region_clear_coalescing(MemoryRegion *mr)
1229 {
1230 CoalescedMemoryRange *cmr;
1231
1232 qemu_flush_coalesced_mmio_buffer();
1233 mr->flush_coalesced_mmio = false;
1234
1235 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1236 cmr = QTAILQ_FIRST(&mr->coalesced);
1237 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1238 g_free(cmr);
1239 }
1240 memory_region_update_coalesced_range(mr);
1241 }
1242
1243 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1244 {
1245 mr->flush_coalesced_mmio = true;
1246 }
1247
1248 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1249 {
1250 qemu_flush_coalesced_mmio_buffer();
1251 if (QTAILQ_EMPTY(&mr->coalesced)) {
1252 mr->flush_coalesced_mmio = false;
1253 }
1254 }
1255
1256 void memory_region_add_eventfd(MemoryRegion *mr,
1257 hwaddr addr,
1258 unsigned size,
1259 bool match_data,
1260 uint64_t data,
1261 EventNotifier *e)
1262 {
1263 MemoryRegionIoeventfd mrfd = {
1264 .addr.start = int128_make64(addr),
1265 .addr.size = int128_make64(size),
1266 .match_data = match_data,
1267 .data = data,
1268 .e = e,
1269 };
1270 unsigned i;
1271
1272 adjust_endianness(mr, &mrfd.data, size);
1273 memory_region_transaction_begin();
1274 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1275 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1276 break;
1277 }
1278 }
1279 ++mr->ioeventfd_nb;
1280 mr->ioeventfds = g_realloc(mr->ioeventfds,
1281 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1282 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1283 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1284 mr->ioeventfds[i] = mrfd;
1285 memory_region_update_pending |= mr->enabled;
1286 memory_region_transaction_commit();
1287 }
1288
1289 void memory_region_del_eventfd(MemoryRegion *mr,
1290 hwaddr addr,
1291 unsigned size,
1292 bool match_data,
1293 uint64_t data,
1294 EventNotifier *e)
1295 {
1296 MemoryRegionIoeventfd mrfd = {
1297 .addr.start = int128_make64(addr),
1298 .addr.size = int128_make64(size),
1299 .match_data = match_data,
1300 .data = data,
1301 .e = e,
1302 };
1303 unsigned i;
1304
1305 adjust_endianness(mr, &mrfd.data, size);
1306 memory_region_transaction_begin();
1307 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1308 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1309 break;
1310 }
1311 }
1312 assert(i != mr->ioeventfd_nb);
1313 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1314 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1315 --mr->ioeventfd_nb;
1316 mr->ioeventfds = g_realloc(mr->ioeventfds,
1317 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1318 memory_region_update_pending |= mr->enabled;
1319 memory_region_transaction_commit();
1320 }
1321
1322 static void memory_region_add_subregion_common(MemoryRegion *mr,
1323 hwaddr offset,
1324 MemoryRegion *subregion)
1325 {
1326 MemoryRegion *other;
1327
1328 memory_region_transaction_begin();
1329
1330 assert(!subregion->parent);
1331 subregion->parent = mr;
1332 subregion->addr = offset;
1333 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1334 if (subregion->may_overlap || other->may_overlap) {
1335 continue;
1336 }
1337 if (int128_ge(int128_make64(offset),
1338 int128_add(int128_make64(other->addr), other->size))
1339 || int128_le(int128_add(int128_make64(offset), subregion->size),
1340 int128_make64(other->addr))) {
1341 continue;
1342 }
1343 #if 0
1344 printf("warning: subregion collision %llx/%llx (%s) "
1345 "vs %llx/%llx (%s)\n",
1346 (unsigned long long)offset,
1347 (unsigned long long)int128_get64(subregion->size),
1348 subregion->name,
1349 (unsigned long long)other->addr,
1350 (unsigned long long)int128_get64(other->size),
1351 other->name);
1352 #endif
1353 }
1354 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1355 if (subregion->priority >= other->priority) {
1356 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1357 goto done;
1358 }
1359 }
1360 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1361 done:
1362 memory_region_update_pending |= mr->enabled && subregion->enabled;
1363 memory_region_transaction_commit();
1364 }
1365
1366
1367 void memory_region_add_subregion(MemoryRegion *mr,
1368 hwaddr offset,
1369 MemoryRegion *subregion)
1370 {
1371 subregion->may_overlap = false;
1372 subregion->priority = 0;
1373 memory_region_add_subregion_common(mr, offset, subregion);
1374 }
1375
1376 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1377 hwaddr offset,
1378 MemoryRegion *subregion,
1379 unsigned priority)
1380 {
1381 subregion->may_overlap = true;
1382 subregion->priority = priority;
1383 memory_region_add_subregion_common(mr, offset, subregion);
1384 }
1385
1386 void memory_region_del_subregion(MemoryRegion *mr,
1387 MemoryRegion *subregion)
1388 {
1389 memory_region_transaction_begin();
1390 assert(subregion->parent == mr);
1391 subregion->parent = NULL;
1392 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1393 memory_region_update_pending |= mr->enabled && subregion->enabled;
1394 memory_region_transaction_commit();
1395 }
1396
1397 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1398 {
1399 if (enabled == mr->enabled) {
1400 return;
1401 }
1402 memory_region_transaction_begin();
1403 mr->enabled = enabled;
1404 memory_region_update_pending = true;
1405 memory_region_transaction_commit();
1406 }
1407
1408 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1409 {
1410 MemoryRegion *parent = mr->parent;
1411 unsigned priority = mr->priority;
1412 bool may_overlap = mr->may_overlap;
1413
1414 if (addr == mr->addr || !parent) {
1415 mr->addr = addr;
1416 return;
1417 }
1418
1419 memory_region_transaction_begin();
1420 memory_region_del_subregion(parent, mr);
1421 if (may_overlap) {
1422 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1423 } else {
1424 memory_region_add_subregion(parent, addr, mr);
1425 }
1426 memory_region_transaction_commit();
1427 }
1428
1429 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1430 {
1431 assert(mr->alias);
1432
1433 if (offset == mr->alias_offset) {
1434 return;
1435 }
1436
1437 memory_region_transaction_begin();
1438 mr->alias_offset = offset;
1439 memory_region_update_pending |= mr->enabled;
1440 memory_region_transaction_commit();
1441 }
1442
1443 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1444 {
1445 return mr->ram_addr;
1446 }
1447
1448 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1449 {
1450 const AddrRange *addr = addr_;
1451 const FlatRange *fr = fr_;
1452
1453 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1454 return -1;
1455 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1456 return 1;
1457 }
1458 return 0;
1459 }
1460
1461 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1462 {
1463 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1464 sizeof(FlatRange), cmp_flatrange_addr);
1465 }
1466
1467 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1468 hwaddr addr, uint64_t size)
1469 {
1470 MemoryRegionSection ret = { .mr = NULL };
1471 MemoryRegion *root;
1472 AddressSpace *as;
1473 AddrRange range;
1474 FlatRange *fr;
1475
1476 addr += mr->addr;
1477 for (root = mr; root->parent; ) {
1478 root = root->parent;
1479 addr += root->addr;
1480 }
1481
1482 as = memory_region_to_address_space(root);
1483 range = addrrange_make(int128_make64(addr), int128_make64(size));
1484 fr = address_space_lookup(as, range);
1485 if (!fr) {
1486 return ret;
1487 }
1488
1489 while (fr > as->current_map->ranges
1490 && addrrange_intersects(fr[-1].addr, range)) {
1491 --fr;
1492 }
1493
1494 ret.mr = fr->mr;
1495 ret.address_space = as;
1496 range = addrrange_intersection(range, fr->addr);
1497 ret.offset_within_region = fr->offset_in_region;
1498 ret.offset_within_region += int128_get64(int128_sub(range.start,
1499 fr->addr.start));
1500 ret.size = range.size;
1501 ret.offset_within_address_space = int128_get64(range.start);
1502 ret.readonly = fr->readonly;
1503 return ret;
1504 }
1505
1506 void address_space_sync_dirty_bitmap(AddressSpace *as)
1507 {
1508 FlatRange *fr;
1509
1510 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1511 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1512 }
1513 }
1514
1515 void memory_global_dirty_log_start(void)
1516 {
1517 global_dirty_log = true;
1518 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1519 }
1520
1521 void memory_global_dirty_log_stop(void)
1522 {
1523 global_dirty_log = false;
1524 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1525 }
1526
1527 static void listener_add_address_space(MemoryListener *listener,
1528 AddressSpace *as)
1529 {
1530 FlatRange *fr;
1531
1532 if (listener->address_space_filter
1533 && listener->address_space_filter != as) {
1534 return;
1535 }
1536
1537 if (global_dirty_log) {
1538 if (listener->log_global_start) {
1539 listener->log_global_start(listener);
1540 }
1541 }
1542
1543 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1544 MemoryRegionSection section = {
1545 .mr = fr->mr,
1546 .address_space = as,
1547 .offset_within_region = fr->offset_in_region,
1548 .size = fr->addr.size,
1549 .offset_within_address_space = int128_get64(fr->addr.start),
1550 .readonly = fr->readonly,
1551 };
1552 if (listener->region_add) {
1553 listener->region_add(listener, &section);
1554 }
1555 }
1556 }
1557
1558 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1559 {
1560 MemoryListener *other = NULL;
1561 AddressSpace *as;
1562
1563 listener->address_space_filter = filter;
1564 if (QTAILQ_EMPTY(&memory_listeners)
1565 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1566 memory_listeners)->priority) {
1567 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1568 } else {
1569 QTAILQ_FOREACH(other, &memory_listeners, link) {
1570 if (listener->priority < other->priority) {
1571 break;
1572 }
1573 }
1574 QTAILQ_INSERT_BEFORE(other, listener, link);
1575 }
1576
1577 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1578 listener_add_address_space(listener, as);
1579 }
1580 }
1581
1582 void memory_listener_unregister(MemoryListener *listener)
1583 {
1584 QTAILQ_REMOVE(&memory_listeners, listener, link);
1585 }
1586
1587 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1588 {
1589 memory_region_transaction_begin();
1590 as->root = root;
1591 as->current_map = g_new(FlatView, 1);
1592 flatview_init(as->current_map);
1593 as->ioeventfd_nb = 0;
1594 as->ioeventfds = NULL;
1595 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1596 as->name = g_strdup(name ? name : "anonymous");
1597 address_space_init_dispatch(as);
1598 memory_region_update_pending |= root->enabled;
1599 memory_region_transaction_commit();
1600 }
1601
1602 void address_space_destroy(AddressSpace *as)
1603 {
1604 /* Flush out anything from MemoryListeners listening in on this */
1605 memory_region_transaction_begin();
1606 as->root = NULL;
1607 memory_region_transaction_commit();
1608 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1609 address_space_destroy_dispatch(as);
1610 flatview_destroy(as->current_map);
1611 g_free(as->name);
1612 g_free(as->current_map);
1613 g_free(as->ioeventfds);
1614 }
1615
1616 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1617 {
1618 return memory_region_dispatch_read(mr, addr, pval, size);
1619 }
1620
1621 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1622 uint64_t val, unsigned size)
1623 {
1624 return memory_region_dispatch_write(mr, addr, val, size);
1625 }
1626
1627 typedef struct MemoryRegionList MemoryRegionList;
1628
1629 struct MemoryRegionList {
1630 const MemoryRegion *mr;
1631 bool printed;
1632 QTAILQ_ENTRY(MemoryRegionList) queue;
1633 };
1634
1635 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1636
1637 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1638 const MemoryRegion *mr, unsigned int level,
1639 hwaddr base,
1640 MemoryRegionListHead *alias_print_queue)
1641 {
1642 MemoryRegionList *new_ml, *ml, *next_ml;
1643 MemoryRegionListHead submr_print_queue;
1644 const MemoryRegion *submr;
1645 unsigned int i;
1646
1647 if (!mr || !mr->enabled) {
1648 return;
1649 }
1650
1651 for (i = 0; i < level; i++) {
1652 mon_printf(f, " ");
1653 }
1654
1655 if (mr->alias) {
1656 MemoryRegionList *ml;
1657 bool found = false;
1658
1659 /* check if the alias is already in the queue */
1660 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1661 if (ml->mr == mr->alias && !ml->printed) {
1662 found = true;
1663 }
1664 }
1665
1666 if (!found) {
1667 ml = g_new(MemoryRegionList, 1);
1668 ml->mr = mr->alias;
1669 ml->printed = false;
1670 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1671 }
1672 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1673 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1674 "-" TARGET_FMT_plx "\n",
1675 base + mr->addr,
1676 base + mr->addr
1677 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1678 mr->priority,
1679 mr->romd_mode ? 'R' : '-',
1680 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1681 : '-',
1682 mr->name,
1683 mr->alias->name,
1684 mr->alias_offset,
1685 mr->alias_offset
1686 + (hwaddr)int128_get64(mr->size) - 1);
1687 } else {
1688 mon_printf(f,
1689 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1690 base + mr->addr,
1691 base + mr->addr
1692 + (hwaddr)int128_get64(int128_sub(mr->size, int128_make64(1))),
1693 mr->priority,
1694 mr->romd_mode ? 'R' : '-',
1695 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1696 : '-',
1697 mr->name);
1698 }
1699
1700 QTAILQ_INIT(&submr_print_queue);
1701
1702 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1703 new_ml = g_new(MemoryRegionList, 1);
1704 new_ml->mr = submr;
1705 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1706 if (new_ml->mr->addr < ml->mr->addr ||
1707 (new_ml->mr->addr == ml->mr->addr &&
1708 new_ml->mr->priority > ml->mr->priority)) {
1709 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1710 new_ml = NULL;
1711 break;
1712 }
1713 }
1714 if (new_ml) {
1715 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1716 }
1717 }
1718
1719 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1720 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1721 alias_print_queue);
1722 }
1723
1724 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1725 g_free(ml);
1726 }
1727 }
1728
1729 void mtree_info(fprintf_function mon_printf, void *f)
1730 {
1731 MemoryRegionListHead ml_head;
1732 MemoryRegionList *ml, *ml2;
1733 AddressSpace *as;
1734
1735 QTAILQ_INIT(&ml_head);
1736
1737 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1738 mon_printf(f, "%s\n", as->name);
1739 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1740 }
1741
1742 mon_printf(f, "aliases\n");
1743 /* print aliased regions */
1744 QTAILQ_FOREACH(ml, &ml_head, queue) {
1745 if (!ml->printed) {
1746 mon_printf(f, "%s\n", ml->mr->name);
1747 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1748 }
1749 }
1750
1751 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1752 g_free(ml);
1753 }
1754 }
AR7 emulation for QEMU