target/ppc: Implement the rest of gen_st_atomic
[qemu/ar7.git] / tcg / tcg-op-gvec.h
blobff43a29a0bf2f67eb2a6474fc011857b6e33bf1a
1 /*
2 * Generic vector operation expansion
4 * Copyright (c) 2018 Linaro
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 * "Generic" vectors. All operands are given as offsets from ENV,
22 * and therefore cannot also be allocated via tcg_global_mem_new_*.
23 * OPRSZ is the byte size of the vector upon which the operation is performed.
24 * MAXSZ is the byte size of the full vector; bytes beyond OPSZ are cleared.
26 * All sizes must be 8 or any multiple of 16.
27 * When OPRSZ is 8, the alignment may be 8, otherwise must be 16.
28 * Operands may completely, but not partially, overlap.
31 /* Expand a call to a gvec-style helper, with pointers to two vector
32 operands, and a descriptor (see tcg-gvec-desc.h). */
33 typedef void gen_helper_gvec_2(TCGv_ptr, TCGv_ptr, TCGv_i32);
34 void tcg_gen_gvec_2_ool(uint32_t dofs, uint32_t aofs,
35 uint32_t oprsz, uint32_t maxsz, int32_t data,
36 gen_helper_gvec_2 *fn);
38 /* Similarly, passing an extra data value. */
39 typedef void gen_helper_gvec_2i(TCGv_ptr, TCGv_ptr, TCGv_i64, TCGv_i32);
40 void tcg_gen_gvec_2i_ool(uint32_t dofs, uint32_t aofs, TCGv_i64 c,
41 uint32_t oprsz, uint32_t maxsz, int32_t data,
42 gen_helper_gvec_2i *fn);
44 /* Similarly, passing an extra pointer (e.g. env or float_status). */
45 typedef void gen_helper_gvec_2_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
46 void tcg_gen_gvec_2_ptr(uint32_t dofs, uint32_t aofs,
47 TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
48 int32_t data, gen_helper_gvec_2_ptr *fn);
50 /* Similarly, with three vector operands. */
51 typedef void gen_helper_gvec_3(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i32);
52 void tcg_gen_gvec_3_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
53 uint32_t oprsz, uint32_t maxsz, int32_t data,
54 gen_helper_gvec_3 *fn);
56 /* Similarly, with four vector operands. */
57 typedef void gen_helper_gvec_4(TCGv_ptr, TCGv_ptr, TCGv_ptr,
58 TCGv_ptr, TCGv_i32);
59 void tcg_gen_gvec_4_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
60 uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
61 int32_t data, gen_helper_gvec_4 *fn);
63 /* Similarly, with five vector operands. */
64 typedef void gen_helper_gvec_5(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
65 TCGv_ptr, TCGv_i32);
66 void tcg_gen_gvec_5_ool(uint32_t dofs, uint32_t aofs, uint32_t bofs,
67 uint32_t cofs, uint32_t xofs, uint32_t oprsz,
68 uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);
70 typedef void gen_helper_gvec_3_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
71 TCGv_ptr, TCGv_i32);
72 void tcg_gen_gvec_3_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
73 TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
74 int32_t data, gen_helper_gvec_3_ptr *fn);
76 typedef void gen_helper_gvec_4_ptr(TCGv_ptr, TCGv_ptr, TCGv_ptr,
77 TCGv_ptr, TCGv_ptr, TCGv_i32);
78 void tcg_gen_gvec_4_ptr(uint32_t dofs, uint32_t aofs, uint32_t bofs,
79 uint32_t cofs, TCGv_ptr ptr, uint32_t oprsz,
80 uint32_t maxsz, int32_t data,
81 gen_helper_gvec_4_ptr *fn);
83 /* Expand a gvec operation. Either inline or out-of-line depending on
84 the actual vector size and the operations supported by the host. */
85 typedef struct {
86 /* Expand inline as a 64-bit or 32-bit integer.
87 Only one of these will be non-NULL. */
88 void (*fni8)(TCGv_i64, TCGv_i64);
89 void (*fni4)(TCGv_i32, TCGv_i32);
90 /* Expand inline with a host vector type. */
91 void (*fniv)(unsigned, TCGv_vec, TCGv_vec);
92 /* Expand out-of-line helper w/descriptor. */
93 gen_helper_gvec_2 *fno;
94 /* The opcode, if any, to which this corresponds. */
95 TCGOpcode opc;
96 /* The data argument to the out-of-line helper. */
97 int32_t data;
98 /* The vector element size, if applicable. */
99 uint8_t vece;
100 /* Prefer i64 to v64. */
101 bool prefer_i64;
102 } GVecGen2;
104 typedef struct {
105 /* Expand inline as a 64-bit or 32-bit integer.
106 Only one of these will be non-NULL. */
107 void (*fni8)(TCGv_i64, TCGv_i64, int64_t);
108 void (*fni4)(TCGv_i32, TCGv_i32, int32_t);
109 /* Expand inline with a host vector type. */
110 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, int64_t);
111 /* Expand out-of-line helper w/descriptor, data in descriptor. */
112 gen_helper_gvec_2 *fno;
113 /* Expand out-of-line helper w/descriptor, data as argument. */
114 gen_helper_gvec_2i *fnoi;
115 /* The opcode, if any, to which this corresponds. */
116 TCGOpcode opc;
117 /* The vector element size, if applicable. */
118 uint8_t vece;
119 /* Prefer i64 to v64. */
120 bool prefer_i64;
121 /* Load dest as a 3rd source operand. */
122 bool load_dest;
123 } GVecGen2i;
125 typedef struct {
126 /* Expand inline as a 64-bit or 32-bit integer.
127 Only one of these will be non-NULL. */
128 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
129 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
130 /* Expand inline with a host vector type. */
131 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
132 /* Expand out-of-line helper w/descriptor. */
133 gen_helper_gvec_2i *fno;
134 /* The opcode, if any, to which this corresponds. */
135 TCGOpcode opc;
136 /* The data argument to the out-of-line helper. */
137 uint32_t data;
138 /* The vector element size, if applicable. */
139 uint8_t vece;
140 /* Prefer i64 to v64. */
141 bool prefer_i64;
142 /* Load scalar as 1st source operand. */
143 bool scalar_first;
144 } GVecGen2s;
146 typedef struct {
147 /* Expand inline as a 64-bit or 32-bit integer.
148 Only one of these will be non-NULL. */
149 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64);
150 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32);
151 /* Expand inline with a host vector type. */
152 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec);
153 /* Expand out-of-line helper w/descriptor. */
154 gen_helper_gvec_3 *fno;
155 /* The opcode, if any, to which this corresponds. */
156 TCGOpcode opc;
157 /* The data argument to the out-of-line helper. */
158 int32_t data;
159 /* The vector element size, if applicable. */
160 uint8_t vece;
161 /* Prefer i64 to v64. */
162 bool prefer_i64;
163 /* Load dest as a 3rd source operand. */
164 bool load_dest;
165 } GVecGen3;
167 typedef struct {
168 /* Expand inline as a 64-bit or 32-bit integer.
169 Only one of these will be non-NULL. */
170 void (*fni8)(TCGv_i64, TCGv_i64, TCGv_i64, TCGv_i64);
171 void (*fni4)(TCGv_i32, TCGv_i32, TCGv_i32, TCGv_i32);
172 /* Expand inline with a host vector type. */
173 void (*fniv)(unsigned, TCGv_vec, TCGv_vec, TCGv_vec, TCGv_vec);
174 /* Expand out-of-line helper w/descriptor. */
175 gen_helper_gvec_4 *fno;
176 /* The opcode, if any, to which this corresponds. */
177 TCGOpcode opc;
178 /* The data argument to the out-of-line helper. */
179 int32_t data;
180 /* The vector element size, if applicable. */
181 uint8_t vece;
182 /* Prefer i64 to v64. */
183 bool prefer_i64;
184 } GVecGen4;
186 void tcg_gen_gvec_2(uint32_t dofs, uint32_t aofs,
187 uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
188 void tcg_gen_gvec_2i(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
189 uint32_t maxsz, int64_t c, const GVecGen2i *);
190 void tcg_gen_gvec_2s(uint32_t dofs, uint32_t aofs, uint32_t oprsz,
191 uint32_t maxsz, TCGv_i64 c, const GVecGen2s *);
192 void tcg_gen_gvec_3(uint32_t dofs, uint32_t aofs, uint32_t bofs,
193 uint32_t oprsz, uint32_t maxsz, const GVecGen3 *);
194 void tcg_gen_gvec_4(uint32_t dofs, uint32_t aofs, uint32_t bofs, uint32_t cofs,
195 uint32_t oprsz, uint32_t maxsz, const GVecGen4 *);
197 /* Expand a specific vector operation. */
199 void tcg_gen_gvec_mov(unsigned vece, uint32_t dofs, uint32_t aofs,
200 uint32_t oprsz, uint32_t maxsz);
201 void tcg_gen_gvec_not(unsigned vece, uint32_t dofs, uint32_t aofs,
202 uint32_t oprsz, uint32_t maxsz);
203 void tcg_gen_gvec_neg(unsigned vece, uint32_t dofs, uint32_t aofs,
204 uint32_t oprsz, uint32_t maxsz);
206 void tcg_gen_gvec_add(unsigned vece, uint32_t dofs, uint32_t aofs,
207 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
208 void tcg_gen_gvec_sub(unsigned vece, uint32_t dofs, uint32_t aofs,
209 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
210 void tcg_gen_gvec_mul(unsigned vece, uint32_t dofs, uint32_t aofs,
211 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
213 void tcg_gen_gvec_addi(unsigned vece, uint32_t dofs, uint32_t aofs,
214 int64_t c, uint32_t oprsz, uint32_t maxsz);
215 void tcg_gen_gvec_muli(unsigned vece, uint32_t dofs, uint32_t aofs,
216 int64_t c, uint32_t oprsz, uint32_t maxsz);
218 void tcg_gen_gvec_adds(unsigned vece, uint32_t dofs, uint32_t aofs,
219 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
220 void tcg_gen_gvec_subs(unsigned vece, uint32_t dofs, uint32_t aofs,
221 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
222 void tcg_gen_gvec_muls(unsigned vece, uint32_t dofs, uint32_t aofs,
223 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
225 /* Saturated arithmetic. */
226 void tcg_gen_gvec_ssadd(unsigned vece, uint32_t dofs, uint32_t aofs,
227 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
228 void tcg_gen_gvec_sssub(unsigned vece, uint32_t dofs, uint32_t aofs,
229 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
230 void tcg_gen_gvec_usadd(unsigned vece, uint32_t dofs, uint32_t aofs,
231 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
232 void tcg_gen_gvec_ussub(unsigned vece, uint32_t dofs, uint32_t aofs,
233 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
235 void tcg_gen_gvec_and(unsigned vece, uint32_t dofs, uint32_t aofs,
236 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
237 void tcg_gen_gvec_or(unsigned vece, uint32_t dofs, uint32_t aofs,
238 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
239 void tcg_gen_gvec_xor(unsigned vece, uint32_t dofs, uint32_t aofs,
240 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
241 void tcg_gen_gvec_andc(unsigned vece, uint32_t dofs, uint32_t aofs,
242 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
243 void tcg_gen_gvec_orc(unsigned vece, uint32_t dofs, uint32_t aofs,
244 uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
246 void tcg_gen_gvec_andi(unsigned vece, uint32_t dofs, uint32_t aofs,
247 int64_t c, uint32_t oprsz, uint32_t maxsz);
248 void tcg_gen_gvec_xori(unsigned vece, uint32_t dofs, uint32_t aofs,
249 int64_t c, uint32_t oprsz, uint32_t maxsz);
250 void tcg_gen_gvec_ori(unsigned vece, uint32_t dofs, uint32_t aofs,
251 int64_t c, uint32_t oprsz, uint32_t maxsz);
253 void tcg_gen_gvec_ands(unsigned vece, uint32_t dofs, uint32_t aofs,
254 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
255 void tcg_gen_gvec_xors(unsigned vece, uint32_t dofs, uint32_t aofs,
256 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
257 void tcg_gen_gvec_ors(unsigned vece, uint32_t dofs, uint32_t aofs,
258 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz);
260 void tcg_gen_gvec_dup_mem(unsigned vece, uint32_t dofs, uint32_t aofs,
261 uint32_t s, uint32_t m);
262 void tcg_gen_gvec_dup_i32(unsigned vece, uint32_t dofs, uint32_t s,
263 uint32_t m, TCGv_i32);
264 void tcg_gen_gvec_dup_i64(unsigned vece, uint32_t dofs, uint32_t s,
265 uint32_t m, TCGv_i64);
267 void tcg_gen_gvec_dup8i(uint32_t dofs, uint32_t s, uint32_t m, uint8_t x);
268 void tcg_gen_gvec_dup16i(uint32_t dofs, uint32_t s, uint32_t m, uint16_t x);
269 void tcg_gen_gvec_dup32i(uint32_t dofs, uint32_t s, uint32_t m, uint32_t x);
270 void tcg_gen_gvec_dup64i(uint32_t dofs, uint32_t s, uint32_t m, uint64_t x);
272 void tcg_gen_gvec_shli(unsigned vece, uint32_t dofs, uint32_t aofs,
273 int64_t shift, uint32_t oprsz, uint32_t maxsz);
274 void tcg_gen_gvec_shri(unsigned vece, uint32_t dofs, uint32_t aofs,
275 int64_t shift, uint32_t oprsz, uint32_t maxsz);
276 void tcg_gen_gvec_sari(unsigned vece, uint32_t dofs, uint32_t aofs,
277 int64_t shift, uint32_t oprsz, uint32_t maxsz);
279 void tcg_gen_gvec_cmp(TCGCond cond, unsigned vece, uint32_t dofs,
280 uint32_t aofs, uint32_t bofs,
281 uint32_t oprsz, uint32_t maxsz);
284 * 64-bit vector operations. Use these when the register has been allocated
285 * with tcg_global_mem_new_i64, and so we cannot also address it via pointer.
286 * OPRSZ = MAXSZ = 8.
289 void tcg_gen_vec_neg8_i64(TCGv_i64 d, TCGv_i64 a);
290 void tcg_gen_vec_neg16_i64(TCGv_i64 d, TCGv_i64 a);
291 void tcg_gen_vec_neg32_i64(TCGv_i64 d, TCGv_i64 a);
293 void tcg_gen_vec_add8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
294 void tcg_gen_vec_add16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
295 void tcg_gen_vec_add32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
297 void tcg_gen_vec_sub8_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
298 void tcg_gen_vec_sub16_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
299 void tcg_gen_vec_sub32_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
301 void tcg_gen_vec_shl8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
302 void tcg_gen_vec_shl16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
303 void tcg_gen_vec_shr8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
304 void tcg_gen_vec_shr16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
305 void tcg_gen_vec_sar8i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);
306 void tcg_gen_vec_sar16i_i64(TCGv_i64 d, TCGv_i64 a, int64_t);