2 * QEMU<->ACPI BIOS PCI hotplug interface
4 * QEMU supports PCI hotplug via ACPI. This module
5 * implements the interface between QEMU and the ACPI BIOS.
6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt
8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9 * Copyright (c) 2006 Fabrice Bellard
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "hw/acpi/pcihp.h"
30 #include "hw/i386/pc.h"
31 #include "hw/pci/pci.h"
32 #include "hw/acpi/acpi.h"
33 #include "sysemu/sysemu.h"
34 #include "qemu/range.h"
35 #include "exec/ioport.h"
36 #include "exec/address-spaces.h"
37 #include "hw/pci/pci_bus.h"
38 #include "qom/qom-qobject.h"
39 #include "qapi/qmp/qint.h"
44 # define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
46 # define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
49 #define ACPI_PCI_HOTPLUG_STATUS 2
50 #define ACPI_PCIHP_ADDR 0xae00
51 #define ACPI_PCIHP_SIZE 0x0014
52 #define ACPI_PCIHP_LEGACY_SIZE 0x000f
53 #define PCI_UP_BASE 0x0000
54 #define PCI_DOWN_BASE 0x0004
55 #define PCI_EJ_BASE 0x0008
56 #define PCI_RMV_BASE 0x000c
57 #define PCI_SEL_BASE 0x0010
59 typedef struct AcpiPciHpFind
{
64 static int acpi_pcihp_get_bsel(PCIBus
*bus
)
66 QObject
*o
= object_property_get_qobject(OBJECT(bus
),
67 ACPI_PCIHP_PROP_BSEL
, NULL
);
70 bsel
= qint_get_int(qobject_to_qint(o
));
78 static void acpi_pcihp_test_hotplug_bus(PCIBus
*bus
, void *opaque
)
80 AcpiPciHpFind
*find
= opaque
;
81 if (find
->bsel
== acpi_pcihp_get_bsel(bus
)) {
86 static PCIBus
*acpi_pcihp_find_hotplug_bus(AcpiPciHpState
*s
, int bsel
)
88 AcpiPciHpFind find
= { .bsel
= bsel
, .bus
= NULL
};
94 pci_for_each_bus(s
->root
, acpi_pcihp_test_hotplug_bus
, &find
);
96 /* Make bsel 0 eject root bus if bsel property is not set,
97 * for compatibility with non acpi setups.
98 * TODO: really needed?
100 if (!bsel
&& !find
.bus
) {
106 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState
*s
, PCIDevice
*dev
)
108 PCIDeviceClass
*pc
= PCI_DEVICE_GET_CLASS(dev
);
109 DeviceClass
*dc
= DEVICE_GET_CLASS(dev
);
111 * ACPI doesn't allow hotplug of bridge devices. Don't allow
112 * hot-unplug of bridge devices unless they were added by hotplug
113 * (and so, not described by acpi).
115 return (pc
->is_bridge
&& !dev
->qdev
.hotplugged
) || !dc
->hotpluggable
;
118 static void acpi_pcihp_eject_slot(AcpiPciHpState
*s
, unsigned bsel
, unsigned slots
)
120 BusChild
*kid
, *next
;
121 int slot
= ffs(slots
) - 1;
122 PCIBus
*bus
= acpi_pcihp_find_hotplug_bus(s
, bsel
);
128 /* Mark request as complete */
129 s
->acpi_pcihp_pci_status
[bsel
].down
&= ~(1U << slot
);
130 s
->acpi_pcihp_pci_status
[bsel
].up
&= ~(1U << slot
);
132 QTAILQ_FOREACH_SAFE(kid
, &bus
->qbus
.children
, sibling
, next
) {
133 DeviceState
*qdev
= kid
->child
;
134 PCIDevice
*dev
= PCI_DEVICE(qdev
);
135 if (PCI_SLOT(dev
->devfn
) == slot
) {
136 if (!acpi_pcihp_pc_no_hotplug(s
, dev
)) {
137 object_unparent(OBJECT(qdev
));
143 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState
*s
, int bsel
)
145 BusChild
*kid
, *next
;
146 PCIBus
*bus
= acpi_pcihp_find_hotplug_bus(s
, bsel
);
148 /* Execute any pending removes during reset */
149 while (s
->acpi_pcihp_pci_status
[bsel
].down
) {
150 acpi_pcihp_eject_slot(s
, bsel
, s
->acpi_pcihp_pci_status
[bsel
].down
);
153 s
->acpi_pcihp_pci_status
[bsel
].hotplug_enable
= ~0;
158 QTAILQ_FOREACH_SAFE(kid
, &bus
->qbus
.children
, sibling
, next
) {
159 DeviceState
*qdev
= kid
->child
;
160 PCIDevice
*pdev
= PCI_DEVICE(qdev
);
161 int slot
= PCI_SLOT(pdev
->devfn
);
163 if (acpi_pcihp_pc_no_hotplug(s
, pdev
)) {
164 s
->acpi_pcihp_pci_status
[bsel
].hotplug_enable
&= ~(1U << slot
);
169 static void acpi_pcihp_update(AcpiPciHpState
*s
)
173 for (i
= 0; i
< ACPI_PCIHP_MAX_HOTPLUG_BUS
; ++i
) {
174 acpi_pcihp_update_hotplug_bus(s
, i
);
178 void acpi_pcihp_reset(AcpiPciHpState
*s
)
180 acpi_pcihp_update(s
);
183 void acpi_pcihp_device_plug_cb(ACPIREGS
*ar
, qemu_irq irq
, AcpiPciHpState
*s
,
184 DeviceState
*dev
, Error
**errp
)
186 PCIDevice
*pdev
= PCI_DEVICE(dev
);
187 int slot
= PCI_SLOT(pdev
->devfn
);
188 int bsel
= acpi_pcihp_get_bsel(pdev
->bus
);
190 error_setg(errp
, "Unsupported bus. Bus doesn't have property '"
191 ACPI_PCIHP_PROP_BSEL
"' set");
195 /* Don't send event when device is enabled during qemu machine creation:
196 * it is present on boot, no hotplug event is necessary. We do send an
197 * event when the device is disabled later. */
198 if (!dev
->hotplugged
) {
202 s
->acpi_pcihp_pci_status
[bsel
].up
|= (1U << slot
);
204 ar
->gpe
.sts
[0] |= ACPI_PCI_HOTPLUG_STATUS
;
205 acpi_update_sci(ar
, irq
);
208 void acpi_pcihp_device_unplug_cb(ACPIREGS
*ar
, qemu_irq irq
, AcpiPciHpState
*s
,
209 DeviceState
*dev
, Error
**errp
)
211 PCIDevice
*pdev
= PCI_DEVICE(dev
);
212 int slot
= PCI_SLOT(pdev
->devfn
);
213 int bsel
= acpi_pcihp_get_bsel(pdev
->bus
);
215 error_setg(errp
, "Unsupported bus. Bus doesn't have property '"
216 ACPI_PCIHP_PROP_BSEL
"' set");
220 s
->acpi_pcihp_pci_status
[bsel
].down
|= (1U << slot
);
222 ar
->gpe
.sts
[0] |= ACPI_PCI_HOTPLUG_STATUS
;
223 acpi_update_sci(ar
, irq
);
226 static uint64_t pci_read(void *opaque
, hwaddr addr
, unsigned int size
)
228 AcpiPciHpState
*s
= opaque
;
230 int bsel
= s
->hotplug_select
;
232 if (bsel
< 0 || bsel
> ACPI_PCIHP_MAX_HOTPLUG_BUS
) {
238 val
= s
->acpi_pcihp_pci_status
[bsel
].up
;
239 if (!s
->legacy_piix
) {
240 s
->acpi_pcihp_pci_status
[bsel
].up
= 0;
242 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32
"\n", val
);
245 val
= s
->acpi_pcihp_pci_status
[bsel
].down
;
246 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32
"\n", val
);
249 /* No feature defined yet */
250 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32
"\n", val
);
253 val
= s
->acpi_pcihp_pci_status
[bsel
].hotplug_enable
;
254 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32
"\n", val
);
257 val
= s
->hotplug_select
;
258 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32
"\n", val
);
266 static void pci_write(void *opaque
, hwaddr addr
, uint64_t data
,
269 AcpiPciHpState
*s
= opaque
;
272 if (s
->hotplug_select
>= ACPI_PCIHP_MAX_HOTPLUG_BUS
) {
275 acpi_pcihp_eject_slot(s
, s
->hotplug_select
, data
);
276 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx
" <== %" PRIu64
"\n",
280 s
->hotplug_select
= data
;
281 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx
" <== %" PRIu64
"\n",
288 static const MemoryRegionOps acpi_pcihp_io_ops
= {
291 .endianness
= DEVICE_LITTLE_ENDIAN
,
293 .min_access_size
= 4,
294 .max_access_size
= 4,
298 void acpi_pcihp_init(AcpiPciHpState
*s
, PCIBus
*root_bus
,
299 MemoryRegion
*address_space_io
, bool bridges_enabled
)
301 uint16_t io_size
= ACPI_PCIHP_SIZE
;
304 s
->legacy_piix
= !bridges_enabled
;
306 if (s
->legacy_piix
) {
307 unsigned *bus_bsel
= g_malloc(sizeof *bus_bsel
);
309 io_size
= ACPI_PCIHP_LEGACY_SIZE
;
311 *bus_bsel
= ACPI_PCIHP_BSEL_DEFAULT
;
312 object_property_add_uint32_ptr(OBJECT(root_bus
), ACPI_PCIHP_PROP_BSEL
,
316 memory_region_init_io(&s
->io
, NULL
, &acpi_pcihp_io_ops
, s
,
317 "acpi-pci-hotplug", io_size
);
318 memory_region_add_subregion(address_space_io
, ACPI_PCIHP_ADDR
, &s
->io
);
321 const VMStateDescription vmstate_acpi_pcihp_pci_status
= {
322 .name
= "acpi_pcihp_pci_status",
324 .minimum_version_id
= 1,
325 .minimum_version_id_old
= 1,
326 .fields
= (VMStateField
[]) {
327 VMSTATE_UINT32(up
, AcpiPciHpPciStatus
),
328 VMSTATE_UINT32(down
, AcpiPciHpPciStatus
),
329 VMSTATE_END_OF_LIST()