Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-june-01-2020' into...
[qemu/ar7.git] / hw / display / virtio-vga.c
blob95757a6619ca9c2f1c81e4853aed9d3c8963e806
1 #include "qemu/osdep.h"
2 #include "hw/pci/pci.h"
3 #include "hw/qdev-properties.h"
4 #include "hw/virtio/virtio-gpu.h"
5 #include "qapi/error.h"
6 #include "qemu/module.h"
7 #include "virtio-vga.h"
9 static void virtio_vga_base_invalidate_display(void *opaque)
11 VirtIOVGABase *vvga = opaque;
12 VirtIOGPUBase *g = vvga->vgpu;
14 if (g->enable) {
15 virtio_gpu_ops.invalidate(g);
16 } else {
17 vvga->vga.hw_ops->invalidate(&vvga->vga);
21 static void virtio_vga_base_update_display(void *opaque)
23 VirtIOVGABase *vvga = opaque;
24 VirtIOGPUBase *g = vvga->vgpu;
26 if (g->enable) {
27 virtio_gpu_ops.gfx_update(g);
28 } else {
29 vvga->vga.hw_ops->gfx_update(&vvga->vga);
33 static void virtio_vga_base_text_update(void *opaque, console_ch_t *chardata)
35 VirtIOVGABase *vvga = opaque;
36 VirtIOGPUBase *g = vvga->vgpu;
38 if (g->enable) {
39 if (virtio_gpu_ops.text_update) {
40 virtio_gpu_ops.text_update(g, chardata);
42 } else {
43 if (vvga->vga.hw_ops->text_update) {
44 vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
49 static int virtio_vga_base_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
51 VirtIOVGABase *vvga = opaque;
52 VirtIOGPUBase *g = vvga->vgpu;
54 if (virtio_gpu_ops.ui_info) {
55 return virtio_gpu_ops.ui_info(g, idx, info);
57 return -1;
60 static void virtio_vga_base_gl_block(void *opaque, bool block)
62 VirtIOVGABase *vvga = opaque;
63 VirtIOGPUBase *g = vvga->vgpu;
65 if (virtio_gpu_ops.gl_block) {
66 virtio_gpu_ops.gl_block(g, block);
70 static const GraphicHwOps virtio_vga_base_ops = {
71 .invalidate = virtio_vga_base_invalidate_display,
72 .gfx_update = virtio_vga_base_update_display,
73 .text_update = virtio_vga_base_text_update,
74 .ui_info = virtio_vga_base_ui_info,
75 .gl_block = virtio_vga_base_gl_block,
78 static const VMStateDescription vmstate_virtio_vga_base = {
79 .name = "virtio-vga",
80 .version_id = 2,
81 .minimum_version_id = 2,
82 .fields = (VMStateField[]) {
83 /* no pci stuff here, saving the virtio device will handle that */
84 VMSTATE_STRUCT(vga, VirtIOVGABase, 0,
85 vmstate_vga_common, VGACommonState),
86 VMSTATE_END_OF_LIST()
90 /* VGA device wrapper around PCI device around virtio GPU */
91 static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
93 VirtIOVGABase *vvga = VIRTIO_VGA_BASE(vpci_dev);
94 VirtIOGPUBase *g = vvga->vgpu;
95 VGACommonState *vga = &vvga->vga;
96 Error *err = NULL;
97 uint32_t offset;
98 int i;
100 /* init vga compat bits */
101 vga->vram_size_mb = 8;
102 vga_common_init(vga, OBJECT(vpci_dev));
103 vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
104 pci_address_space_io(&vpci_dev->pci_dev), true);
105 pci_register_bar(&vpci_dev->pci_dev, 0,
106 PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
109 * Configure virtio bar and regions
111 * We use bar #2 for the mmio regions, to be compatible with stdvga.
112 * virtio regions are moved to the end of bar #2, to make room for
113 * the stdvga mmio registers at the start of bar #2.
115 vpci_dev->modern_mem_bar_idx = 2;
116 vpci_dev->msix_bar_idx = 4;
117 vpci_dev->modern_io_bar_idx = 5;
119 if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
121 * with page-per-vq=off there is no padding space we can use
122 * for the stdvga registers. Make the common and isr regions
123 * smaller then.
125 vpci_dev->common.size /= 2;
126 vpci_dev->isr.size /= 2;
129 offset = memory_region_size(&vpci_dev->modern_bar);
130 offset -= vpci_dev->notify.size;
131 vpci_dev->notify.offset = offset;
132 offset -= vpci_dev->device.size;
133 vpci_dev->device.offset = offset;
134 offset -= vpci_dev->isr.size;
135 vpci_dev->isr.offset = offset;
136 offset -= vpci_dev->common.size;
137 vpci_dev->common.offset = offset;
139 /* init virtio bits */
140 qdev_set_parent_bus(DEVICE(g), BUS(&vpci_dev->bus));
141 virtio_pci_force_virtio_1(vpci_dev);
142 object_property_set_bool(OBJECT(g), true, "realized", &err);
143 if (err) {
144 error_propagate(errp, err);
145 return;
148 /* add stdvga mmio regions */
149 pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
150 vvga->vga_mrs, true, false);
152 vga->con = g->scanout[0].con;
153 graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga);
155 for (i = 0; i < g->conf.max_outputs; i++) {
156 object_property_set_link(OBJECT(g->scanout[i].con),
157 OBJECT(vpci_dev),
158 "device", errp);
162 static void virtio_vga_base_reset(DeviceState *dev)
164 VirtIOVGABaseClass *klass = VIRTIO_VGA_BASE_GET_CLASS(dev);
165 VirtIOVGABase *vvga = VIRTIO_VGA_BASE(dev);
167 /* reset virtio-gpu */
168 klass->parent_reset(dev);
170 /* reset vga */
171 vga_common_reset(&vvga->vga);
172 vga_dirty_log_start(&vvga->vga);
175 static Property virtio_vga_base_properties[] = {
176 DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
177 DEFINE_PROP_END_OF_LIST(),
180 static void virtio_vga_base_class_init(ObjectClass *klass, void *data)
182 DeviceClass *dc = DEVICE_CLASS(klass);
183 VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
184 VirtIOVGABaseClass *v = VIRTIO_VGA_BASE_CLASS(klass);
185 PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
187 set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
188 device_class_set_props(dc, virtio_vga_base_properties);
189 dc->vmsd = &vmstate_virtio_vga_base;
190 dc->hotpluggable = false;
191 device_class_set_parent_reset(dc, virtio_vga_base_reset,
192 &v->parent_reset);
194 k->realize = virtio_vga_base_realize;
195 pcidev_k->romfile = "vgabios-virtio.bin";
196 pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
199 static TypeInfo virtio_vga_base_info = {
200 .name = TYPE_VIRTIO_VGA_BASE,
201 .parent = TYPE_VIRTIO_PCI,
202 .instance_size = sizeof(struct VirtIOVGABase),
203 .class_size = sizeof(struct VirtIOVGABaseClass),
204 .class_init = virtio_vga_base_class_init,
205 .abstract = true,
208 #define TYPE_VIRTIO_VGA "virtio-vga"
210 #define VIRTIO_VGA(obj) \
211 OBJECT_CHECK(VirtIOVGA, (obj), TYPE_VIRTIO_VGA)
213 typedef struct VirtIOVGA {
214 VirtIOVGABase parent_obj;
216 VirtIOGPU vdev;
217 } VirtIOVGA;
219 static void virtio_vga_inst_initfn(Object *obj)
221 VirtIOVGA *dev = VIRTIO_VGA(obj);
223 virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
224 TYPE_VIRTIO_GPU);
225 VIRTIO_VGA_BASE(dev)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
229 static VirtioPCIDeviceTypeInfo virtio_vga_info = {
230 .generic_name = TYPE_VIRTIO_VGA,
231 .parent = TYPE_VIRTIO_VGA_BASE,
232 .instance_size = sizeof(struct VirtIOVGA),
233 .instance_init = virtio_vga_inst_initfn,
236 static void virtio_vga_register_types(void)
238 type_register_static(&virtio_vga_base_info);
239 virtio_pci_types_register(&virtio_vga_info);
242 type_init(virtio_vga_register_types)