elf: add arm note types
[qemu/ar7.git] / target-arm / kvm.c
blobeca3a0037deb5d10004037640c91b0e9554d9bbb
1 /*
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #include <stdio.h>
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
14 #include <sys/mman.h>
16 #include <linux/kvm.h>
18 #include "qemu-common.h"
19 #include "qemu/timer.h"
20 #include "qemu/error-report.h"
21 #include "sysemu/sysemu.h"
22 #include "sysemu/kvm.h"
23 #include "kvm_arm.h"
24 #include "cpu.h"
25 #include "internals.h"
26 #include "hw/arm/arm.h"
27 #include "exec/memattrs.h"
28 #include "hw/boards.h"
30 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
31 KVM_CAP_LAST_INFO
34 static bool cap_has_mp_state;
36 int kvm_arm_vcpu_init(CPUState *cs)
38 ARMCPU *cpu = ARM_CPU(cs);
39 struct kvm_vcpu_init init;
41 init.target = cpu->kvm_target;
42 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
44 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
47 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
48 int *fdarray,
49 struct kvm_vcpu_init *init)
51 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
53 kvmfd = qemu_open("/dev/kvm", O_RDWR);
54 if (kvmfd < 0) {
55 goto err;
57 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
58 if (vmfd < 0) {
59 goto err;
61 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
62 if (cpufd < 0) {
63 goto err;
66 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
67 if (ret >= 0) {
68 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
69 if (ret < 0) {
70 goto err;
72 } else {
73 /* Old kernel which doesn't know about the
74 * PREFERRED_TARGET ioctl: we know it will only support
75 * creating one kind of guest CPU which is its preferred
76 * CPU type.
78 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
79 init->target = *cpus_to_try++;
80 memset(init->features, 0, sizeof(init->features));
81 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
82 if (ret >= 0) {
83 break;
86 if (ret < 0) {
87 goto err;
91 fdarray[0] = kvmfd;
92 fdarray[1] = vmfd;
93 fdarray[2] = cpufd;
95 return true;
97 err:
98 if (cpufd >= 0) {
99 close(cpufd);
101 if (vmfd >= 0) {
102 close(vmfd);
104 if (kvmfd >= 0) {
105 close(kvmfd);
108 return false;
111 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
113 int i;
115 for (i = 2; i >= 0; i--) {
116 close(fdarray[i]);
120 static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
122 ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
124 /* All we really need to set up for the 'host' CPU
125 * is the feature bits -- we rely on the fact that the
126 * various ID register values in ARMCPU are only used for
127 * TCG CPUs.
129 if (!kvm_arm_get_host_cpu_features(ahcc)) {
130 fprintf(stderr, "Failed to retrieve host CPU features!\n");
131 abort();
135 static void kvm_arm_host_cpu_initfn(Object *obj)
137 ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
138 ARMCPU *cpu = ARM_CPU(obj);
139 CPUARMState *env = &cpu->env;
141 cpu->kvm_target = ahcc->target;
142 cpu->dtb_compatible = ahcc->dtb_compatible;
143 env->features = ahcc->features;
146 static const TypeInfo host_arm_cpu_type_info = {
147 .name = TYPE_ARM_HOST_CPU,
148 #ifdef TARGET_AARCH64
149 .parent = TYPE_AARCH64_CPU,
150 #else
151 .parent = TYPE_ARM_CPU,
152 #endif
153 .instance_init = kvm_arm_host_cpu_initfn,
154 .class_init = kvm_arm_host_cpu_class_init,
155 .class_size = sizeof(ARMHostCPUClass),
158 int kvm_arch_init(MachineState *ms, KVMState *s)
160 /* For ARM interrupt delivery is always asynchronous,
161 * whether we are using an in-kernel VGIC or not.
163 kvm_async_interrupts_allowed = true;
165 cap_has_mp_state = kvm_check_extension(s, KVM_CAP_MP_STATE);
167 type_register_static(&host_arm_cpu_type_info);
169 return 0;
172 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
174 return cpu->cpu_index;
177 /* We track all the KVM devices which need their memory addresses
178 * passing to the kernel in a list of these structures.
179 * When board init is complete we run through the list and
180 * tell the kernel the base addresses of the memory regions.
181 * We use a MemoryListener to track mapping and unmapping of
182 * the regions during board creation, so the board models don't
183 * need to do anything special for the KVM case.
185 typedef struct KVMDevice {
186 struct kvm_arm_device_addr kda;
187 struct kvm_device_attr kdattr;
188 MemoryRegion *mr;
189 QSLIST_ENTRY(KVMDevice) entries;
190 int dev_fd;
191 } KVMDevice;
193 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
195 static void kvm_arm_devlistener_add(MemoryListener *listener,
196 MemoryRegionSection *section)
198 KVMDevice *kd;
200 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
201 if (section->mr == kd->mr) {
202 kd->kda.addr = section->offset_within_address_space;
207 static void kvm_arm_devlistener_del(MemoryListener *listener,
208 MemoryRegionSection *section)
210 KVMDevice *kd;
212 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
213 if (section->mr == kd->mr) {
214 kd->kda.addr = -1;
219 static MemoryListener devlistener = {
220 .region_add = kvm_arm_devlistener_add,
221 .region_del = kvm_arm_devlistener_del,
224 static void kvm_arm_set_device_addr(KVMDevice *kd)
226 struct kvm_device_attr *attr = &kd->kdattr;
227 int ret;
229 /* If the device control API is available and we have a device fd on the
230 * KVMDevice struct, let's use the newer API
232 if (kd->dev_fd >= 0) {
233 uint64_t addr = kd->kda.addr;
234 attr->addr = (uintptr_t)&addr;
235 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
236 } else {
237 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
240 if (ret < 0) {
241 fprintf(stderr, "Failed to set device address: %s\n",
242 strerror(-ret));
243 abort();
247 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
249 KVMDevice *kd, *tkd;
251 memory_listener_unregister(&devlistener);
252 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
253 if (kd->kda.addr != -1) {
254 kvm_arm_set_device_addr(kd);
256 memory_region_unref(kd->mr);
257 g_free(kd);
261 static Notifier notify = {
262 .notify = kvm_arm_machine_init_done,
265 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
266 uint64_t attr, int dev_fd)
268 KVMDevice *kd;
270 if (!kvm_irqchip_in_kernel()) {
271 return;
274 if (QSLIST_EMPTY(&kvm_devices_head)) {
275 memory_listener_register(&devlistener, NULL);
276 qemu_add_machine_init_done_notifier(&notify);
278 kd = g_new0(KVMDevice, 1);
279 kd->mr = mr;
280 kd->kda.id = devid;
281 kd->kda.addr = -1;
282 kd->kdattr.flags = 0;
283 kd->kdattr.group = group;
284 kd->kdattr.attr = attr;
285 kd->dev_fd = dev_fd;
286 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
287 memory_region_ref(kd->mr);
290 static int compare_u64(const void *a, const void *b)
292 if (*(uint64_t *)a > *(uint64_t *)b) {
293 return 1;
295 if (*(uint64_t *)a < *(uint64_t *)b) {
296 return -1;
298 return 0;
301 /* Initialize the CPUState's cpreg list according to the kernel's
302 * definition of what CPU registers it knows about (and throw away
303 * the previous TCG-created cpreg list).
305 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
307 struct kvm_reg_list rl;
308 struct kvm_reg_list *rlp;
309 int i, ret, arraylen;
310 CPUState *cs = CPU(cpu);
312 rl.n = 0;
313 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
314 if (ret != -E2BIG) {
315 return ret;
317 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
318 rlp->n = rl.n;
319 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
320 if (ret) {
321 goto out;
323 /* Sort the list we get back from the kernel, since cpreg_tuples
324 * must be in strictly ascending order.
326 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
328 for (i = 0, arraylen = 0; i < rlp->n; i++) {
329 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
330 continue;
332 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
333 case KVM_REG_SIZE_U32:
334 case KVM_REG_SIZE_U64:
335 break;
336 default:
337 fprintf(stderr, "Can't handle size of register in kernel list\n");
338 ret = -EINVAL;
339 goto out;
342 arraylen++;
345 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
346 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
347 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
348 arraylen);
349 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
350 arraylen);
351 cpu->cpreg_array_len = arraylen;
352 cpu->cpreg_vmstate_array_len = arraylen;
354 for (i = 0, arraylen = 0; i < rlp->n; i++) {
355 uint64_t regidx = rlp->reg[i];
356 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
357 continue;
359 cpu->cpreg_indexes[arraylen] = regidx;
360 arraylen++;
362 assert(cpu->cpreg_array_len == arraylen);
364 if (!write_kvmstate_to_list(cpu)) {
365 /* Shouldn't happen unless kernel is inconsistent about
366 * what registers exist.
368 fprintf(stderr, "Initial read of kernel register state failed\n");
369 ret = -EINVAL;
370 goto out;
373 out:
374 g_free(rlp);
375 return ret;
378 bool write_kvmstate_to_list(ARMCPU *cpu)
380 CPUState *cs = CPU(cpu);
381 int i;
382 bool ok = true;
384 for (i = 0; i < cpu->cpreg_array_len; i++) {
385 struct kvm_one_reg r;
386 uint64_t regidx = cpu->cpreg_indexes[i];
387 uint32_t v32;
388 int ret;
390 r.id = regidx;
392 switch (regidx & KVM_REG_SIZE_MASK) {
393 case KVM_REG_SIZE_U32:
394 r.addr = (uintptr_t)&v32;
395 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
396 if (!ret) {
397 cpu->cpreg_values[i] = v32;
399 break;
400 case KVM_REG_SIZE_U64:
401 r.addr = (uintptr_t)(cpu->cpreg_values + i);
402 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
403 break;
404 default:
405 abort();
407 if (ret) {
408 ok = false;
411 return ok;
414 bool write_list_to_kvmstate(ARMCPU *cpu, int level)
416 CPUState *cs = CPU(cpu);
417 int i;
418 bool ok = true;
420 for (i = 0; i < cpu->cpreg_array_len; i++) {
421 struct kvm_one_reg r;
422 uint64_t regidx = cpu->cpreg_indexes[i];
423 uint32_t v32;
424 int ret;
426 if (kvm_arm_cpreg_level(regidx) > level) {
427 continue;
430 r.id = regidx;
431 switch (regidx & KVM_REG_SIZE_MASK) {
432 case KVM_REG_SIZE_U32:
433 v32 = cpu->cpreg_values[i];
434 r.addr = (uintptr_t)&v32;
435 break;
436 case KVM_REG_SIZE_U64:
437 r.addr = (uintptr_t)(cpu->cpreg_values + i);
438 break;
439 default:
440 abort();
442 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
443 if (ret) {
444 /* We might fail for "unknown register" and also for
445 * "you tried to set a register which is constant with
446 * a different value from what it actually contains".
448 ok = false;
451 return ok;
454 void kvm_arm_reset_vcpu(ARMCPU *cpu)
456 int ret;
458 /* Re-init VCPU so that all registers are set to
459 * their respective reset values.
461 ret = kvm_arm_vcpu_init(CPU(cpu));
462 if (ret < 0) {
463 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
464 abort();
466 if (!write_kvmstate_to_list(cpu)) {
467 fprintf(stderr, "write_kvmstate_to_list failed\n");
468 abort();
473 * Update KVM's MP_STATE based on what QEMU thinks it is
475 int kvm_arm_sync_mpstate_to_kvm(ARMCPU *cpu)
477 if (cap_has_mp_state) {
478 struct kvm_mp_state mp_state = {
479 .mp_state =
480 cpu->powered_off ? KVM_MP_STATE_STOPPED : KVM_MP_STATE_RUNNABLE
482 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
483 if (ret) {
484 fprintf(stderr, "%s: failed to set MP_STATE %d/%s\n",
485 __func__, ret, strerror(-ret));
486 return -1;
490 return 0;
494 * Sync the KVM MP_STATE into QEMU
496 int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu)
498 if (cap_has_mp_state) {
499 struct kvm_mp_state mp_state;
500 int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MP_STATE, &mp_state);
501 if (ret) {
502 fprintf(stderr, "%s: failed to get MP_STATE %d/%s\n",
503 __func__, ret, strerror(-ret));
504 abort();
506 cpu->powered_off = (mp_state.mp_state == KVM_MP_STATE_STOPPED);
509 return 0;
512 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
516 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
518 return MEMTXATTRS_UNSPECIFIED;
522 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
524 int ret = 0;
526 switch (run->exit_reason) {
527 case KVM_EXIT_DEBUG:
528 if (kvm_arm_handle_debug(cs, &run->debug.arch)) {
529 ret = EXCP_DEBUG;
530 } /* otherwise return to guest */
531 break;
532 default:
533 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
534 __func__, run->exit_reason);
535 break;
537 return ret;
540 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
542 return true;
545 int kvm_arch_process_async_events(CPUState *cs)
547 return 0;
550 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
552 return 1;
555 int kvm_arch_on_sigbus(int code, void *addr)
557 return 1;
560 /* The #ifdef protections are until 32bit headers are imported and can
561 * be removed once both 32 and 64 bit reach feature parity.
563 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
565 #ifdef KVM_GUESTDBG_USE_SW_BP
566 if (kvm_sw_breakpoints_active(cs)) {
567 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
569 #endif
570 #ifdef KVM_GUESTDBG_USE_HW
571 if (kvm_arm_hw_debug_active(cs)) {
572 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW;
573 kvm_arm_copy_hw_debug_data(&dbg->arch);
575 #endif
578 void kvm_arch_init_irq_routing(KVMState *s)
582 int kvm_arch_irqchip_create(MachineState *ms, KVMState *s)
584 if (machine_kernel_irqchip_split(ms)) {
585 perror("-machine kernel_irqchip=split is not supported on ARM.");
586 exit(1);
589 /* If we can create the VGIC using the newer device control API, we
590 * let the device do this when it initializes itself, otherwise we
591 * fall back to the old API */
592 return kvm_check_extension(s, KVM_CAP_DEVICE_CTRL);
595 int kvm_arm_vgic_probe(void)
597 if (kvm_create_device(kvm_state,
598 KVM_DEV_TYPE_ARM_VGIC_V3, true) == 0) {
599 return 3;
600 } else if (kvm_create_device(kvm_state,
601 KVM_DEV_TYPE_ARM_VGIC_V2, true) == 0) {
602 return 2;
603 } else {
604 return 0;
608 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
609 uint64_t address, uint32_t data, PCIDevice *dev)
611 return 0;
614 int kvm_arch_msi_data_to_gsi(uint32_t data)
616 return (data - 32) & 0xffff;