2 * tpm_tis.c - QEMU's TPM TIS interface emulator
4 * Copyright (C) 2006,2010-2013 IBM Corporation
7 * Stefan Berger <stefanb@us.ibm.com>
8 * David Safford <safford@us.ibm.com>
10 * Xen 4 support: Andrease Niederl <andreas.niederl@iaik.tugraz.at>
12 * This work is licensed under the terms of the GNU GPL, version 2 or later.
13 * See the COPYING file in the top-level directory.
15 * Implementation of the TIS interface according to specs found at
16 * http://www.trustedcomputinggroup.org. This implementation currently
17 * supports version 1.3, 21 March 2013
18 * In the developers menu choose the PC Client section then find the TIS
21 * TPM TIS for TPM 2 implementation following TCG PC Client Platform
22 * TPM Profile (PTP) Specification, Familiy 2.0, Revision 00.43
25 #include "qemu/osdep.h"
26 #include "hw/isa/isa.h"
27 #include "qapi/error.h"
29 #include "hw/acpi/tpm.h"
30 #include "hw/pci/pci_ids.h"
31 #include "sysemu/tpm_backend.h"
37 #define TPM_TIS_NUM_LOCALITIES 5 /* per spec */
38 #define TPM_TIS_LOCALITY_SHIFT 12
39 #define TPM_TIS_NO_LOCALITY 0xff
41 #define TPM_TIS_IS_VALID_LOCTY(x) ((x) < TPM_TIS_NUM_LOCALITIES)
43 #define TPM_TIS_BUFFER_MAX 4096
46 TPM_TIS_STATE_IDLE
= 0,
48 TPM_TIS_STATE_COMPLETION
,
49 TPM_TIS_STATE_EXECUTION
,
50 TPM_TIS_STATE_RECEPTION
,
53 /* locality data -- all fields are persisted */
54 typedef struct TPMLocality
{
63 typedef struct TPMState
{
67 unsigned char buffer
[TPM_TIS_BUFFER_MAX
];
71 uint8_t aborting_locty
;
74 TPMLocality loc
[TPM_TIS_NUM_LOCALITIES
];
81 TPMBackend
*be_driver
;
82 TPMVersion be_tpm_version
;
84 size_t be_buffer_size
;
90 #define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS)
94 /* local prototypes */
96 static uint64_t tpm_tis_mmio_read(void *opaque
, hwaddr addr
,
99 /* utility functions */
101 static uint8_t tpm_tis_locality_from_addr(hwaddr addr
)
103 return (uint8_t)((addr
>> TPM_TIS_LOCALITY_SHIFT
) & 0x7);
106 static void tpm_tis_show_buffer(const unsigned char *buffer
,
107 size_t buffer_size
, const char *string
)
110 char *line_buffer
, *p
;
112 len
= MIN(tpm_cmd_get_size(buffer
), buffer_size
);
115 * allocate enough room for 3 chars per buffer entry plus a
116 * newline after every 16 chars and a final null terminator.
118 line_buffer
= g_malloc(len
* 3 + (len
/ 16) + 1);
120 for (i
= 0, p
= line_buffer
; i
< len
; i
++) {
121 if (i
&& !(i
% 16)) {
122 p
+= sprintf(p
, "\n");
124 p
+= sprintf(p
, "%.2X ", buffer
[i
]);
126 trace_tpm_tis_show_buffer(string
, len
, line_buffer
);
132 * Set the given flags in the STS register by clearing the register but
133 * preserving the SELFTEST_DONE and TPM_FAMILY_MASK flags and then setting
136 * The SELFTEST_DONE flag is acquired from the backend that determines it by
137 * peeking into TPM commands.
139 * A VM suspend/resume will preserve the flag by storing it into the VM
140 * device state, but the backend will not remember it when QEMU is started
141 * again. Therefore, we cache the flag here. Once set, it will not be unset
144 static void tpm_tis_sts_set(TPMLocality
*l
, uint32_t flags
)
146 l
->sts
&= TPM_TIS_STS_SELFTEST_DONE
| TPM_TIS_STS_TPM_FAMILY_MASK
;
151 * Send a request to the TPM.
153 static void tpm_tis_tpm_send(TPMState
*s
, uint8_t locty
)
155 if (trace_event_get_state_backends(TRACE_TPM_TIS_SHOW_BUFFER
)) {
156 tpm_tis_show_buffer(s
->buffer
, s
->be_buffer_size
, "To TPM");
160 * rw_offset serves as length indicator for length of data;
161 * it's reset when the response comes back
163 s
->loc
[locty
].state
= TPM_TIS_STATE_EXECUTION
;
165 s
->cmd
= (TPMBackendCmd
) {
168 .in_len
= s
->rw_offset
,
170 .out_len
= s
->be_buffer_size
,
173 tpm_backend_deliver_request(s
->be_driver
, &s
->cmd
);
176 /* raise an interrupt if allowed */
177 static void tpm_tis_raise_irq(TPMState
*s
, uint8_t locty
, uint32_t irqmask
)
179 if (!TPM_TIS_IS_VALID_LOCTY(locty
)) {
183 if ((s
->loc
[locty
].inte
& TPM_TIS_INT_ENABLED
) &&
184 (s
->loc
[locty
].inte
& irqmask
)) {
185 trace_tpm_tis_raise_irq(irqmask
);
186 qemu_irq_raise(s
->irq
);
187 s
->loc
[locty
].ints
|= irqmask
;
191 static uint32_t tpm_tis_check_request_use_except(TPMState
*s
, uint8_t locty
)
195 for (l
= 0; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
199 if ((s
->loc
[l
].access
& TPM_TIS_ACCESS_REQUEST_USE
)) {
207 static void tpm_tis_new_active_locality(TPMState
*s
, uint8_t new_active_locty
)
209 bool change
= (s
->active_locty
!= new_active_locty
);
213 if (change
&& TPM_TIS_IS_VALID_LOCTY(s
->active_locty
)) {
214 is_seize
= TPM_TIS_IS_VALID_LOCTY(new_active_locty
) &&
215 s
->loc
[new_active_locty
].access
& TPM_TIS_ACCESS_SEIZE
;
218 mask
= ~(TPM_TIS_ACCESS_ACTIVE_LOCALITY
);
220 mask
= ~(TPM_TIS_ACCESS_ACTIVE_LOCALITY
|
221 TPM_TIS_ACCESS_REQUEST_USE
);
223 /* reset flags on the old active locality */
224 s
->loc
[s
->active_locty
].access
&= mask
;
227 s
->loc
[s
->active_locty
].access
|= TPM_TIS_ACCESS_BEEN_SEIZED
;
231 s
->active_locty
= new_active_locty
;
233 trace_tpm_tis_new_active_locality(s
->active_locty
);
235 if (TPM_TIS_IS_VALID_LOCTY(new_active_locty
)) {
236 /* set flags on the new active locality */
237 s
->loc
[new_active_locty
].access
|= TPM_TIS_ACCESS_ACTIVE_LOCALITY
;
238 s
->loc
[new_active_locty
].access
&= ~(TPM_TIS_ACCESS_REQUEST_USE
|
239 TPM_TIS_ACCESS_SEIZE
);
243 tpm_tis_raise_irq(s
, s
->active_locty
, TPM_TIS_INT_LOCALITY_CHANGED
);
247 /* abort -- this function switches the locality */
248 static void tpm_tis_abort(TPMState
*s
)
252 trace_tpm_tis_abort(s
->next_locty
);
255 * Need to react differently depending on who's aborting now and
256 * which locality will become active afterwards.
258 if (s
->aborting_locty
== s
->next_locty
) {
259 s
->loc
[s
->aborting_locty
].state
= TPM_TIS_STATE_READY
;
260 tpm_tis_sts_set(&s
->loc
[s
->aborting_locty
],
261 TPM_TIS_STS_COMMAND_READY
);
262 tpm_tis_raise_irq(s
, s
->aborting_locty
, TPM_TIS_INT_COMMAND_READY
);
265 /* locality after abort is another one than the current one */
266 tpm_tis_new_active_locality(s
, s
->next_locty
);
268 s
->next_locty
= TPM_TIS_NO_LOCALITY
;
269 /* nobody's aborting a command anymore */
270 s
->aborting_locty
= TPM_TIS_NO_LOCALITY
;
273 /* prepare aborting current command */
274 static void tpm_tis_prep_abort(TPMState
*s
, uint8_t locty
, uint8_t newlocty
)
278 assert(TPM_TIS_IS_VALID_LOCTY(newlocty
));
280 s
->aborting_locty
= locty
; /* may also be TPM_TIS_NO_LOCALITY */
281 s
->next_locty
= newlocty
; /* locality after successful abort */
284 * only abort a command using an interrupt if currently executing
285 * a command AND if there's a valid connection to the vTPM.
287 for (busy_locty
= 0; busy_locty
< TPM_TIS_NUM_LOCALITIES
; busy_locty
++) {
288 if (s
->loc
[busy_locty
].state
== TPM_TIS_STATE_EXECUTION
) {
290 * request the backend to cancel. Some backends may not
293 tpm_backend_cancel_cmd(s
->be_driver
);
302 * Callback from the TPM to indicate that the response was received.
304 static void tpm_tis_request_completed(TPMIf
*ti
, int ret
)
306 TPMState
*s
= TPM(ti
);
307 uint8_t locty
= s
->cmd
.locty
;
310 assert(TPM_TIS_IS_VALID_LOCTY(locty
));
312 if (s
->cmd
.selftest_done
) {
313 for (l
= 0; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
314 s
->loc
[l
].sts
|= TPM_TIS_STS_SELFTEST_DONE
;
318 /* FIXME: report error if ret != 0 */
319 tpm_tis_sts_set(&s
->loc
[locty
],
320 TPM_TIS_STS_VALID
| TPM_TIS_STS_DATA_AVAILABLE
);
321 s
->loc
[locty
].state
= TPM_TIS_STATE_COMPLETION
;
324 if (trace_event_get_state_backends(TRACE_TPM_TIS_SHOW_BUFFER
)) {
325 tpm_tis_show_buffer(s
->buffer
, s
->be_buffer_size
, "From TPM");
328 if (TPM_TIS_IS_VALID_LOCTY(s
->next_locty
)) {
332 tpm_tis_raise_irq(s
, locty
,
333 TPM_TIS_INT_DATA_AVAILABLE
| TPM_TIS_INT_STS_VALID
);
337 * Read a byte of response data
339 static uint32_t tpm_tis_data_read(TPMState
*s
, uint8_t locty
)
341 uint32_t ret
= TPM_TIS_NO_DATA_BYTE
;
344 if ((s
->loc
[locty
].sts
& TPM_TIS_STS_DATA_AVAILABLE
)) {
345 len
= MIN(tpm_cmd_get_size(&s
->buffer
),
348 ret
= s
->buffer
[s
->rw_offset
++];
349 if (s
->rw_offset
>= len
) {
351 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_VALID
);
352 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_STS_VALID
);
354 trace_tpm_tis_data_read(ret
, s
->rw_offset
- 1);
361 static void tpm_tis_dump_state(void *opaque
, hwaddr addr
)
363 static const unsigned regs
[] = {
365 TPM_TIS_REG_INT_ENABLE
,
366 TPM_TIS_REG_INT_VECTOR
,
367 TPM_TIS_REG_INT_STATUS
,
368 TPM_TIS_REG_INTF_CAPABILITY
,
374 uint8_t locty
= tpm_tis_locality_from_addr(addr
);
375 hwaddr base
= addr
& ~0xfff;
376 TPMState
*s
= opaque
;
378 printf("tpm_tis: active locality : %d\n"
379 "tpm_tis: state of locality %d : %d\n"
380 "tpm_tis: register dump:\n",
382 locty
, s
->loc
[locty
].state
);
384 for (idx
= 0; regs
[idx
] != 0xfff; idx
++) {
385 printf("tpm_tis: 0x%04x : 0x%08x\n", regs
[idx
],
386 (int)tpm_tis_mmio_read(opaque
, base
+ regs
[idx
], 4));
389 printf("tpm_tis: r/w offset : %d\n"
390 "tpm_tis: result buffer : ",
393 idx
< MIN(tpm_cmd_get_size(&s
->buffer
), s
->be_buffer_size
);
396 s
->rw_offset
== idx
? '>' : ' ',
398 ((idx
& 0xf) == 0xf) ? "\ntpm_tis: " : "");
405 * Read a register of the TIS interface
406 * See specs pages 33-63 for description of the registers
408 static uint64_t tpm_tis_mmio_read(void *opaque
, hwaddr addr
,
411 TPMState
*s
= opaque
;
412 uint16_t offset
= addr
& 0xffc;
413 uint8_t shift
= (addr
& 0x3) * 8;
414 uint32_t val
= 0xffffffff;
415 uint8_t locty
= tpm_tis_locality_from_addr(addr
);
419 if (tpm_backend_had_startup_error(s
->be_driver
)) {
424 case TPM_TIS_REG_ACCESS
:
425 /* never show the SEIZE flag even though we use it internally */
426 val
= s
->loc
[locty
].access
& ~TPM_TIS_ACCESS_SEIZE
;
427 /* the pending flag is always calculated */
428 if (tpm_tis_check_request_use_except(s
, locty
)) {
429 val
|= TPM_TIS_ACCESS_PENDING_REQUEST
;
431 val
|= !tpm_backend_get_tpm_established_flag(s
->be_driver
);
433 case TPM_TIS_REG_INT_ENABLE
:
434 val
= s
->loc
[locty
].inte
;
436 case TPM_TIS_REG_INT_VECTOR
:
439 case TPM_TIS_REG_INT_STATUS
:
440 val
= s
->loc
[locty
].ints
;
442 case TPM_TIS_REG_INTF_CAPABILITY
:
443 switch (s
->be_tpm_version
) {
444 case TPM_VERSION_UNSPEC
:
447 case TPM_VERSION_1_2
:
448 val
= TPM_TIS_CAPABILITIES_SUPPORTED1_3
;
450 case TPM_VERSION_2_0
:
451 val
= TPM_TIS_CAPABILITIES_SUPPORTED2_0
;
455 case TPM_TIS_REG_STS
:
456 if (s
->active_locty
== locty
) {
457 if ((s
->loc
[locty
].sts
& TPM_TIS_STS_DATA_AVAILABLE
)) {
458 val
= TPM_TIS_BURST_COUNT(
459 MIN(tpm_cmd_get_size(&s
->buffer
),
461 - s
->rw_offset
) | s
->loc
[locty
].sts
;
463 avail
= s
->be_buffer_size
- s
->rw_offset
;
465 * byte-sized reads should not return 0x00 for 0x100
468 if (size
== 1 && avail
> 0xff) {
471 val
= TPM_TIS_BURST_COUNT(avail
) | s
->loc
[locty
].sts
;
475 case TPM_TIS_REG_DATA_FIFO
:
476 case TPM_TIS_REG_DATA_XFIFO
... TPM_TIS_REG_DATA_XFIFO_END
:
477 if (s
->active_locty
== locty
) {
478 if (size
> 4 - (addr
& 0x3)) {
479 /* prevent access beyond FIFO */
480 size
= 4 - (addr
& 0x3);
485 switch (s
->loc
[locty
].state
) {
486 case TPM_TIS_STATE_COMPLETION
:
487 v
= tpm_tis_data_read(s
, locty
);
490 v
= TPM_TIS_NO_DATA_BYTE
;
497 shift
= 0; /* no more adjustments */
500 case TPM_TIS_REG_INTERFACE_ID
:
501 val
= s
->loc
[locty
].iface_id
;
503 case TPM_TIS_REG_DID_VID
:
504 val
= (TPM_TIS_TPM_DID
<< 16) | TPM_TIS_TPM_VID
;
506 case TPM_TIS_REG_RID
:
507 val
= TPM_TIS_TPM_RID
;
510 case TPM_TIS_REG_DEBUG
:
511 tpm_tis_dump_state(opaque
, addr
);
520 trace_tpm_tis_mmio_read(size
, addr
, val
);
526 * Write a value to a register of the TIS interface
527 * See specs pages 33-63 for description of the registers
529 static void tpm_tis_mmio_write(void *opaque
, hwaddr addr
,
530 uint64_t val
, unsigned size
)
532 TPMState
*s
= opaque
;
533 uint16_t off
= addr
& 0xffc;
534 uint8_t shift
= (addr
& 0x3) * 8;
535 uint8_t locty
= tpm_tis_locality_from_addr(addr
);
536 uint8_t active_locty
, l
;
537 int c
, set_new_locty
= 1;
539 uint32_t mask
= (size
== 1) ? 0xff : ((size
== 2) ? 0xffff : ~0);
541 trace_tpm_tis_mmio_write(size
, addr
, val
);
544 trace_tpm_tis_mmio_write_locty4();
548 if (tpm_backend_had_startup_error(s
->be_driver
)) {
562 case TPM_TIS_REG_ACCESS
:
564 if ((val
& TPM_TIS_ACCESS_SEIZE
)) {
565 val
&= ~(TPM_TIS_ACCESS_REQUEST_USE
|
566 TPM_TIS_ACCESS_ACTIVE_LOCALITY
);
569 active_locty
= s
->active_locty
;
571 if ((val
& TPM_TIS_ACCESS_ACTIVE_LOCALITY
)) {
572 /* give up locality if currently owned */
573 if (s
->active_locty
== locty
) {
574 trace_tpm_tis_mmio_write_release_locty(locty
);
576 uint8_t newlocty
= TPM_TIS_NO_LOCALITY
;
577 /* anybody wants the locality ? */
578 for (c
= TPM_TIS_NUM_LOCALITIES
- 1; c
>= 0; c
--) {
579 if ((s
->loc
[c
].access
& TPM_TIS_ACCESS_REQUEST_USE
)) {
580 trace_tpm_tis_mmio_write_locty_req_use(c
);
585 trace_tpm_tis_mmio_write_next_locty(newlocty
);
587 if (TPM_TIS_IS_VALID_LOCTY(newlocty
)) {
589 tpm_tis_prep_abort(s
, locty
, newlocty
);
591 active_locty
= TPM_TIS_NO_LOCALITY
;
594 /* not currently the owner; clear a pending request */
595 s
->loc
[locty
].access
&= ~TPM_TIS_ACCESS_REQUEST_USE
;
599 if ((val
& TPM_TIS_ACCESS_BEEN_SEIZED
)) {
600 s
->loc
[locty
].access
&= ~TPM_TIS_ACCESS_BEEN_SEIZED
;
603 if ((val
& TPM_TIS_ACCESS_SEIZE
)) {
605 * allow seize if a locality is active and the requesting
606 * locality is higher than the one that's active
608 * allow seize for requesting locality if no locality is
611 while ((TPM_TIS_IS_VALID_LOCTY(s
->active_locty
) &&
612 locty
> s
->active_locty
) ||
613 !TPM_TIS_IS_VALID_LOCTY(s
->active_locty
)) {
614 bool higher_seize
= FALSE
;
616 /* already a pending SEIZE ? */
617 if ((s
->loc
[locty
].access
& TPM_TIS_ACCESS_SEIZE
)) {
621 /* check for ongoing seize by a higher locality */
622 for (l
= locty
+ 1; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
623 if ((s
->loc
[l
].access
& TPM_TIS_ACCESS_SEIZE
)) {
633 /* cancel any seize by a lower locality */
634 for (l
= 0; l
< locty
; l
++) {
635 s
->loc
[l
].access
&= ~TPM_TIS_ACCESS_SEIZE
;
638 s
->loc
[locty
].access
|= TPM_TIS_ACCESS_SEIZE
;
640 trace_tpm_tis_mmio_write_locty_seized(locty
, s
->active_locty
);
641 trace_tpm_tis_mmio_write_init_abort();
644 tpm_tis_prep_abort(s
, s
->active_locty
, locty
);
649 if ((val
& TPM_TIS_ACCESS_REQUEST_USE
)) {
650 if (s
->active_locty
!= locty
) {
651 if (TPM_TIS_IS_VALID_LOCTY(s
->active_locty
)) {
652 s
->loc
[locty
].access
|= TPM_TIS_ACCESS_REQUEST_USE
;
654 /* no locality active -> make this one active now */
655 active_locty
= locty
;
661 tpm_tis_new_active_locality(s
, active_locty
);
665 case TPM_TIS_REG_INT_ENABLE
:
666 if (s
->active_locty
!= locty
) {
670 s
->loc
[locty
].inte
&= mask
;
671 s
->loc
[locty
].inte
|= (val
& (TPM_TIS_INT_ENABLED
|
672 TPM_TIS_INT_POLARITY_MASK
|
673 TPM_TIS_INTERRUPTS_SUPPORTED
));
675 case TPM_TIS_REG_INT_VECTOR
:
676 /* hard wired -- ignore */
678 case TPM_TIS_REG_INT_STATUS
:
679 if (s
->active_locty
!= locty
) {
683 /* clearing of interrupt flags */
684 if (((val
& TPM_TIS_INTERRUPTS_SUPPORTED
)) &&
685 (s
->loc
[locty
].ints
& TPM_TIS_INTERRUPTS_SUPPORTED
)) {
686 s
->loc
[locty
].ints
&= ~val
;
687 if (s
->loc
[locty
].ints
== 0) {
688 qemu_irq_lower(s
->irq
);
689 trace_tpm_tis_mmio_write_lowering_irq();
692 s
->loc
[locty
].ints
&= ~(val
& TPM_TIS_INTERRUPTS_SUPPORTED
);
694 case TPM_TIS_REG_STS
:
695 if (s
->active_locty
!= locty
) {
699 if (s
->be_tpm_version
== TPM_VERSION_2_0
) {
700 /* some flags that are only supported for TPM 2 */
701 if (val
& TPM_TIS_STS_COMMAND_CANCEL
) {
702 if (s
->loc
[locty
].state
== TPM_TIS_STATE_EXECUTION
) {
704 * request the backend to cancel. Some backends may not
707 tpm_backend_cancel_cmd(s
->be_driver
);
711 if (val
& TPM_TIS_STS_RESET_ESTABLISHMENT_BIT
) {
712 if (locty
== 3 || locty
== 4) {
713 tpm_backend_reset_tpm_established_flag(s
->be_driver
, locty
);
718 val
&= (TPM_TIS_STS_COMMAND_READY
| TPM_TIS_STS_TPM_GO
|
719 TPM_TIS_STS_RESPONSE_RETRY
);
721 if (val
== TPM_TIS_STS_COMMAND_READY
) {
722 switch (s
->loc
[locty
].state
) {
724 case TPM_TIS_STATE_READY
:
728 case TPM_TIS_STATE_IDLE
:
729 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_COMMAND_READY
);
730 s
->loc
[locty
].state
= TPM_TIS_STATE_READY
;
731 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_COMMAND_READY
);
734 case TPM_TIS_STATE_EXECUTION
:
735 case TPM_TIS_STATE_RECEPTION
:
736 /* abort currently running command */
737 trace_tpm_tis_mmio_write_init_abort();
738 tpm_tis_prep_abort(s
, locty
, locty
);
741 case TPM_TIS_STATE_COMPLETION
:
743 /* shortcut to ready state with C/R set */
744 s
->loc
[locty
].state
= TPM_TIS_STATE_READY
;
745 if (!(s
->loc
[locty
].sts
& TPM_TIS_STS_COMMAND_READY
)) {
746 tpm_tis_sts_set(&s
->loc
[locty
],
747 TPM_TIS_STS_COMMAND_READY
);
748 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_COMMAND_READY
);
750 s
->loc
[locty
].sts
&= ~(TPM_TIS_STS_DATA_AVAILABLE
);
754 } else if (val
== TPM_TIS_STS_TPM_GO
) {
755 switch (s
->loc
[locty
].state
) {
756 case TPM_TIS_STATE_RECEPTION
:
757 if ((s
->loc
[locty
].sts
& TPM_TIS_STS_EXPECT
) == 0) {
758 tpm_tis_tpm_send(s
, locty
);
765 } else if (val
== TPM_TIS_STS_RESPONSE_RETRY
) {
766 switch (s
->loc
[locty
].state
) {
767 case TPM_TIS_STATE_COMPLETION
:
769 tpm_tis_sts_set(&s
->loc
[locty
],
771 TPM_TIS_STS_DATA_AVAILABLE
);
779 case TPM_TIS_REG_DATA_FIFO
:
780 case TPM_TIS_REG_DATA_XFIFO
... TPM_TIS_REG_DATA_XFIFO_END
:
782 if (s
->active_locty
!= locty
) {
786 if (s
->loc
[locty
].state
== TPM_TIS_STATE_IDLE
||
787 s
->loc
[locty
].state
== TPM_TIS_STATE_EXECUTION
||
788 s
->loc
[locty
].state
== TPM_TIS_STATE_COMPLETION
) {
791 trace_tpm_tis_mmio_write_data2send(val
, size
);
792 if (s
->loc
[locty
].state
== TPM_TIS_STATE_READY
) {
793 s
->loc
[locty
].state
= TPM_TIS_STATE_RECEPTION
;
794 tpm_tis_sts_set(&s
->loc
[locty
],
795 TPM_TIS_STS_EXPECT
| TPM_TIS_STS_VALID
);
799 if (size
> 4 - (addr
& 0x3)) {
800 /* prevent access beyond FIFO */
801 size
= 4 - (addr
& 0x3);
804 while ((s
->loc
[locty
].sts
& TPM_TIS_STS_EXPECT
) && size
> 0) {
805 if (s
->rw_offset
< s
->be_buffer_size
) {
806 s
->buffer
[s
->rw_offset
++] =
811 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_VALID
);
815 /* check for complete packet */
816 if (s
->rw_offset
> 5 &&
817 (s
->loc
[locty
].sts
& TPM_TIS_STS_EXPECT
)) {
818 /* we have a packet length - see if we have all of it */
819 bool need_irq
= !(s
->loc
[locty
].sts
& TPM_TIS_STS_VALID
);
821 len
= tpm_cmd_get_size(&s
->buffer
);
822 if (len
> s
->rw_offset
) {
823 tpm_tis_sts_set(&s
->loc
[locty
],
824 TPM_TIS_STS_EXPECT
| TPM_TIS_STS_VALID
);
826 /* packet complete */
827 tpm_tis_sts_set(&s
->loc
[locty
], TPM_TIS_STS_VALID
);
830 tpm_tis_raise_irq(s
, locty
, TPM_TIS_INT_STS_VALID
);
835 case TPM_TIS_REG_INTERFACE_ID
:
836 if (val
& TPM_TIS_IFACE_ID_INT_SEL_LOCK
) {
837 for (l
= 0; l
< TPM_TIS_NUM_LOCALITIES
; l
++) {
838 s
->loc
[l
].iface_id
|= TPM_TIS_IFACE_ID_INT_SEL_LOCK
;
845 static const MemoryRegionOps tpm_tis_memory_ops
= {
846 .read
= tpm_tis_mmio_read
,
847 .write
= tpm_tis_mmio_write
,
848 .endianness
= DEVICE_LITTLE_ENDIAN
,
850 .min_access_size
= 1,
851 .max_access_size
= 4,
856 * Get the TPMVersion of the backend device being used
858 static enum TPMVersion
tpm_tis_get_tpm_version(TPMIf
*ti
)
860 TPMState
*s
= TPM(ti
);
862 if (tpm_backend_had_startup_error(s
->be_driver
)) {
863 return TPM_VERSION_UNSPEC
;
866 return tpm_backend_get_tpm_version(s
->be_driver
);
870 * This function is called when the machine starts, resets or due to
873 static void tpm_tis_reset(DeviceState
*dev
)
875 TPMState
*s
= TPM(dev
);
878 s
->be_tpm_version
= tpm_backend_get_tpm_version(s
->be_driver
);
879 s
->be_buffer_size
= MIN(tpm_backend_get_buffer_size(s
->be_driver
),
882 if (s
->ppi_enabled
) {
883 tpm_ppi_reset(&s
->ppi
);
885 tpm_backend_reset(s
->be_driver
);
887 s
->active_locty
= TPM_TIS_NO_LOCALITY
;
888 s
->next_locty
= TPM_TIS_NO_LOCALITY
;
889 s
->aborting_locty
= TPM_TIS_NO_LOCALITY
;
891 for (c
= 0; c
< TPM_TIS_NUM_LOCALITIES
; c
++) {
892 s
->loc
[c
].access
= TPM_TIS_ACCESS_TPM_REG_VALID_STS
;
893 switch (s
->be_tpm_version
) {
894 case TPM_VERSION_UNSPEC
:
896 case TPM_VERSION_1_2
:
897 s
->loc
[c
].sts
= TPM_TIS_STS_TPM_FAMILY1_2
;
898 s
->loc
[c
].iface_id
= TPM_TIS_IFACE_ID_SUPPORTED_FLAGS1_3
;
900 case TPM_VERSION_2_0
:
901 s
->loc
[c
].sts
= TPM_TIS_STS_TPM_FAMILY2_0
;
902 s
->loc
[c
].iface_id
= TPM_TIS_IFACE_ID_SUPPORTED_FLAGS2_0
;
905 s
->loc
[c
].inte
= TPM_TIS_INT_POLARITY_LOW_LEVEL
;
907 s
->loc
[c
].state
= TPM_TIS_STATE_IDLE
;
912 tpm_backend_startup_tpm(s
->be_driver
, s
->be_buffer_size
);
915 /* persistent state handling */
917 static int tpm_tis_pre_save(void *opaque
)
919 TPMState
*s
= opaque
;
920 uint8_t locty
= s
->active_locty
;
922 trace_tpm_tis_pre_save(locty
, s
->rw_offset
);
925 tpm_tis_dump_state(opaque
, 0);
929 * Synchronize with backend completion.
931 tpm_backend_finish_sync(s
->be_driver
);
936 static const VMStateDescription vmstate_locty
= {
937 .name
= "tpm-tis/locty",
939 .fields
= (VMStateField
[]) {
940 VMSTATE_UINT32(state
, TPMLocality
),
941 VMSTATE_UINT32(inte
, TPMLocality
),
942 VMSTATE_UINT32(ints
, TPMLocality
),
943 VMSTATE_UINT8(access
, TPMLocality
),
944 VMSTATE_UINT32(sts
, TPMLocality
),
945 VMSTATE_UINT32(iface_id
, TPMLocality
),
946 VMSTATE_END_OF_LIST(),
950 static const VMStateDescription vmstate_tpm_tis
= {
953 .pre_save
= tpm_tis_pre_save
,
954 .fields
= (VMStateField
[]) {
955 VMSTATE_BUFFER(buffer
, TPMState
),
956 VMSTATE_UINT16(rw_offset
, TPMState
),
957 VMSTATE_UINT8(active_locty
, TPMState
),
958 VMSTATE_UINT8(aborting_locty
, TPMState
),
959 VMSTATE_UINT8(next_locty
, TPMState
),
961 VMSTATE_STRUCT_ARRAY(loc
, TPMState
, TPM_TIS_NUM_LOCALITIES
, 0,
962 vmstate_locty
, TPMLocality
),
964 VMSTATE_END_OF_LIST()
968 static Property tpm_tis_properties
[] = {
969 DEFINE_PROP_UINT32("irq", TPMState
, irq_num
, TPM_TIS_IRQ
),
970 DEFINE_PROP_TPMBE("tpmdev", TPMState
, be_driver
),
971 DEFINE_PROP_BOOL("ppi", TPMState
, ppi_enabled
, true),
972 DEFINE_PROP_END_OF_LIST(),
975 static void tpm_tis_realizefn(DeviceState
*dev
, Error
**errp
)
977 TPMState
*s
= TPM(dev
);
980 error_setg(errp
, "at most one TPM device is permitted");
985 error_setg(errp
, "'tpmdev' property is required");
988 if (s
->irq_num
> 15) {
989 error_setg(errp
, "IRQ %d is outside valid range of 0 to 15",
994 isa_init_irq(&s
->busdev
, &s
->irq
, s
->irq_num
);
996 memory_region_add_subregion(isa_address_space(ISA_DEVICE(dev
)),
997 TPM_TIS_ADDR_BASE
, &s
->mmio
);
999 if (s
->ppi_enabled
) {
1000 tpm_ppi_init(&s
->ppi
, isa_address_space(ISA_DEVICE(dev
)),
1001 TPM_PPI_ADDR_BASE
, OBJECT(s
));
1005 static void tpm_tis_initfn(Object
*obj
)
1007 TPMState
*s
= TPM(obj
);
1009 memory_region_init_io(&s
->mmio
, OBJECT(s
), &tpm_tis_memory_ops
,
1011 TPM_TIS_NUM_LOCALITIES
<< TPM_TIS_LOCALITY_SHIFT
);
1014 static void tpm_tis_class_init(ObjectClass
*klass
, void *data
)
1016 DeviceClass
*dc
= DEVICE_CLASS(klass
);
1017 TPMIfClass
*tc
= TPM_IF_CLASS(klass
);
1019 dc
->realize
= tpm_tis_realizefn
;
1020 dc
->props
= tpm_tis_properties
;
1021 dc
->reset
= tpm_tis_reset
;
1022 dc
->vmsd
= &vmstate_tpm_tis
;
1023 tc
->model
= TPM_MODEL_TPM_TIS
;
1024 tc
->get_version
= tpm_tis_get_tpm_version
;
1025 tc
->request_completed
= tpm_tis_request_completed
;
1028 static const TypeInfo tpm_tis_info
= {
1029 .name
= TYPE_TPM_TIS
,
1030 .parent
= TYPE_ISA_DEVICE
,
1031 .instance_size
= sizeof(TPMState
),
1032 .instance_init
= tpm_tis_initfn
,
1033 .class_init
= tpm_tis_class_init
,
1034 .interfaces
= (InterfaceInfo
[]) {
1040 static void tpm_tis_register(void)
1042 type_register_static(&tpm_tis_info
);
1045 type_init(tpm_tis_register
)