COLO: notify net filters about checkpoint/failover event
[qemu/ar7.git] / hw / display / vga_int.h
blob6e4fa48a79b73ae560214517ae5328b2890e5682
1 /*
2 * QEMU internal VGA defines.
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #ifndef HW_VGA_INT_H
26 #define HW_VGA_INT_H
28 #include "exec/ioport.h"
29 #include "exec/memory.h"
30 #include "ui/console.h"
32 #include "hw/display/bochs-vbe.h"
34 #define ST01_V_RETRACE 0x08
35 #define ST01_DISP_ENABLE 0x01
37 #define CH_ATTR_SIZE (160 * 100)
38 #define VGA_MAX_HEIGHT 2048
40 struct vga_precise_retrace {
41 int64_t ticks_per_char;
42 int64_t total_chars;
43 int htotal;
44 int hstart;
45 int hend;
46 int vstart;
47 int vend;
48 int freq;
51 union vga_retrace {
52 struct vga_precise_retrace precise;
55 struct VGACommonState;
56 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
57 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
59 typedef struct VGACommonState {
60 MemoryRegion *legacy_address_space;
61 uint8_t *vram_ptr;
62 MemoryRegion vram;
63 MemoryRegion vram_vbe;
64 uint32_t vram_size;
65 uint32_t vram_size_mb; /* property */
66 uint32_t vbe_size;
67 uint32_t vbe_size_mask;
68 uint32_t latch;
69 bool has_chain4_alias;
70 MemoryRegion chain4_alias;
71 uint8_t sr_index;
72 uint8_t sr[256];
73 uint8_t sr_vbe[256];
74 uint8_t gr_index;
75 uint8_t gr[256];
76 uint8_t ar_index;
77 uint8_t ar[21];
78 int ar_flip_flop;
79 uint8_t cr_index;
80 uint8_t cr[256]; /* CRT registers */
81 uint8_t msr; /* Misc Output Register */
82 uint8_t fcr; /* Feature Control Register */
83 uint8_t st00; /* status 0 */
84 uint8_t st01; /* status 1 */
85 uint8_t dac_state;
86 uint8_t dac_sub_index;
87 uint8_t dac_read_index;
88 uint8_t dac_write_index;
89 uint8_t dac_cache[3]; /* used when writing */
90 int dac_8bit;
91 uint8_t palette[768];
92 int32_t bank_offset;
93 int (*get_bpp)(struct VGACommonState *s);
94 void (*get_offsets)(struct VGACommonState *s,
95 uint32_t *pline_offset,
96 uint32_t *pstart_addr,
97 uint32_t *pline_compare);
98 void (*get_resolution)(struct VGACommonState *s,
99 int *pwidth,
100 int *pheight);
101 PortioList vga_port_list;
102 PortioList vbe_port_list;
103 /* bochs vbe state */
104 uint16_t vbe_index;
105 uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
106 uint32_t vbe_start_addr;
107 uint32_t vbe_line_offset;
108 uint32_t vbe_bank_mask;
109 int vbe_mapped;
110 /* display refresh support */
111 QemuConsole *con;
112 uint32_t font_offsets[2];
113 int graphic_mode;
114 uint8_t shift_control;
115 uint8_t double_scan;
116 uint32_t line_offset;
117 uint32_t line_compare;
118 uint32_t start_addr;
119 uint32_t plane_updated;
120 uint32_t last_line_offset;
121 uint8_t last_cw, last_ch;
122 uint32_t last_width, last_height; /* in chars or pixels */
123 uint32_t last_scr_width, last_scr_height; /* in pixels */
124 uint32_t last_depth; /* in bits */
125 bool last_byteswap;
126 bool force_shadow;
127 uint8_t cursor_start, cursor_end;
128 bool cursor_visible_phase;
129 int64_t cursor_blink_time;
130 uint32_t cursor_offset;
131 const GraphicHwOps *hw_ops;
132 bool full_update_text;
133 bool full_update_gfx;
134 bool big_endian_fb;
135 bool default_endian_fb;
136 bool global_vmstate;
137 /* hardware mouse cursor support */
138 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
139 uint32_t hw_cursor_x;
140 uint32_t hw_cursor_y;
141 void (*cursor_invalidate)(struct VGACommonState *s);
142 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
143 /* tell for each page if it has been updated since the last time */
144 uint32_t last_palette[256];
145 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
146 /* retrace */
147 vga_retrace_fn retrace;
148 vga_update_retrace_info_fn update_retrace_info;
149 union vga_retrace retrace_info;
150 uint8_t is_vbe_vmstate;
151 } VGACommonState;
153 static inline int c6_to_8(int v)
155 int b;
156 v &= 0x3f;
157 b = v & 1;
158 return (v << 2) | (b << 1) | b;
161 void vga_common_init(VGACommonState *s, Object *obj);
162 void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
163 MemoryRegion *address_space_io, bool init_vga_ports);
164 MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
165 const MemoryRegionPortio **vga_ports,
166 const MemoryRegionPortio **vbe_ports);
167 void vga_common_reset(VGACommonState *s);
169 void vga_sync_dirty_bitmap(VGACommonState *s);
170 void vga_dirty_log_start(VGACommonState *s);
171 void vga_dirty_log_stop(VGACommonState *s);
173 extern const VMStateDescription vmstate_vga_common;
174 uint32_t vga_ioport_read(void *opaque, uint32_t addr);
175 void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
176 uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr);
177 void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val);
178 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
180 int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
182 void vga_init_vbe(VGACommonState *s, Object *obj, MemoryRegion *address_space);
183 uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
184 void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
185 void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
187 extern const uint8_t sr_mask[8];
188 extern const uint8_t gr_mask[16];
190 #define VGABIOS_FILENAME "vgabios.bin"
191 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
193 extern const MemoryRegionOps vga_mem_ops;
195 /* vga-pci.c */
196 void pci_std_vga_mmio_region_init(VGACommonState *s,
197 Object *owner,
198 MemoryRegion *parent,
199 MemoryRegion *subs,
200 bool qext, bool edid);
202 #endif