2 * APIC support - common bits of emulated and KVM kernel model
4 * Copyright (c) 2004-2005 Fabrice Bellard
5 * Copyright (c) 2011 Jan Kiszka, Siemens AG
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>
21 #include "apic_internal.h"
24 static int apic_irq_delivered
;
26 void cpu_set_apic_base(DeviceState
*d
, uint64_t val
)
28 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
31 trace_cpu_set_apic_base(val
);
34 info
= DO_UPCAST(APICCommonInfo
, busdev
.qdev
, s
->busdev
.qdev
.info
);
35 info
->set_base(s
, val
);
39 uint64_t cpu_get_apic_base(DeviceState
*d
)
41 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
43 trace_cpu_get_apic_base(s
? (uint64_t)s
->apicbase
: 0);
45 return s
? s
->apicbase
: 0;
48 void cpu_set_apic_tpr(DeviceState
*d
, uint8_t val
)
50 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
54 info
= DO_UPCAST(APICCommonInfo
, busdev
.qdev
, s
->busdev
.qdev
.info
);
55 info
->set_tpr(s
, val
);
59 uint8_t cpu_get_apic_tpr(DeviceState
*d
)
61 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
63 return s
? s
->tpr
>> 4 : 0;
66 void apic_report_irq_delivered(int delivered
)
68 apic_irq_delivered
+= delivered
;
70 trace_apic_report_irq_delivered(apic_irq_delivered
);
73 void apic_reset_irq_delivered(void)
75 trace_apic_reset_irq_delivered(apic_irq_delivered
);
77 apic_irq_delivered
= 0;
80 int apic_get_irq_delivered(void)
82 trace_apic_get_irq_delivered(apic_irq_delivered
);
84 return apic_irq_delivered
;
87 void apic_deliver_nmi(DeviceState
*d
)
89 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
92 info
= DO_UPCAST(APICCommonInfo
, busdev
.qdev
, s
->busdev
.qdev
.info
);
93 info
->external_nmi(s
);
96 bool apic_next_timer(APICCommonState
*s
, int64_t current_time
)
100 /* We need to store the timer state separately to support APIC
101 * implementations that maintain a non-QEMU timer, e.g. inside the
102 * host kernel. This open-coded state allows us to migrate between
104 s
->timer_expiry
= -1;
106 if (s
->lvt
[APIC_LVT_TIMER
] & APIC_LVT_MASKED
) {
110 d
= (current_time
- s
->initial_count_load_time
) >> s
->count_shift
;
112 if (s
->lvt
[APIC_LVT_TIMER
] & APIC_LVT_TIMER_PERIODIC
) {
113 if (!s
->initial_count
) {
116 d
= ((d
/ ((uint64_t)s
->initial_count
+ 1)) + 1) *
117 ((uint64_t)s
->initial_count
+ 1);
119 if (d
>= s
->initial_count
) {
122 d
= (uint64_t)s
->initial_count
+ 1;
124 s
->next_time
= s
->initial_count_load_time
+ (d
<< s
->count_shift
);
125 s
->timer_expiry
= s
->next_time
;
129 void apic_init_reset(DeviceState
*d
)
131 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
138 s
->spurious_vec
= 0xff;
141 memset(s
->isr
, 0, sizeof(s
->isr
));
142 memset(s
->tmr
, 0, sizeof(s
->tmr
));
143 memset(s
->irr
, 0, sizeof(s
->irr
));
144 for (i
= 0; i
< APIC_LVT_NB
; i
++) {
145 s
->lvt
[i
] = APIC_LVT_MASKED
;
148 memset(s
->icr
, 0, sizeof(s
->icr
));
151 s
->initial_count
= 0;
152 s
->initial_count_load_time
= 0;
154 s
->wait_for_sipi
= 1;
157 qemu_del_timer(s
->timer
);
159 s
->timer_expiry
= -1;
162 static void apic_reset_common(DeviceState
*d
)
164 APICCommonState
*s
= DO_UPCAST(APICCommonState
, busdev
.qdev
, d
);
167 bsp
= cpu_is_bsp(s
->cpu_env
);
168 s
->apicbase
= 0xfee00000 |
169 (bsp
? MSR_IA32_APICBASE_BSP
: 0) | MSR_IA32_APICBASE_ENABLE
;
175 * LINT0 delivery mode on CPU #0 is set to ExtInt at initialization
176 * time typically by BIOS, so PIC interrupt can be delivered to the
177 * processor when local APIC is enabled.
179 s
->lvt
[APIC_LVT_LINT0
] = 0x700;
183 /* This function is only used for old state version 1 and 2 */
184 static int apic_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
186 APICCommonState
*s
= opaque
;
189 if (version_id
> 2) {
193 /* XXX: what if the base changes? (registered memory regions) */
194 qemu_get_be32s(f
, &s
->apicbase
);
195 qemu_get_8s(f
, &s
->id
);
196 qemu_get_8s(f
, &s
->arb_id
);
197 qemu_get_8s(f
, &s
->tpr
);
198 qemu_get_be32s(f
, &s
->spurious_vec
);
199 qemu_get_8s(f
, &s
->log_dest
);
200 qemu_get_8s(f
, &s
->dest_mode
);
201 for (i
= 0; i
< 8; i
++) {
202 qemu_get_be32s(f
, &s
->isr
[i
]);
203 qemu_get_be32s(f
, &s
->tmr
[i
]);
204 qemu_get_be32s(f
, &s
->irr
[i
]);
206 for (i
= 0; i
< APIC_LVT_NB
; i
++) {
207 qemu_get_be32s(f
, &s
->lvt
[i
]);
209 qemu_get_be32s(f
, &s
->esr
);
210 qemu_get_be32s(f
, &s
->icr
[0]);
211 qemu_get_be32s(f
, &s
->icr
[1]);
212 qemu_get_be32s(f
, &s
->divide_conf
);
213 s
->count_shift
= qemu_get_be32(f
);
214 qemu_get_be32s(f
, &s
->initial_count
);
215 s
->initial_count_load_time
= qemu_get_be64(f
);
216 s
->next_time
= qemu_get_be64(f
);
218 if (version_id
>= 2) {
219 qemu_get_timer(f
, s
->timer
);
224 static int apic_init_common(SysBusDevice
*dev
)
226 APICCommonState
*s
= FROM_SYSBUS(APICCommonState
, dev
);
227 APICCommonInfo
*info
;
230 if (apic_no
>= MAX_APICS
) {
235 info
= DO_UPCAST(APICCommonInfo
, busdev
.qdev
, s
->busdev
.qdev
.info
);
238 sysbus_init_mmio(&s
->busdev
, &s
->io_memory
);
242 static int apic_dispatch_post_load(void *opaque
, int version_id
)
244 APICCommonState
*s
= opaque
;
245 APICCommonInfo
*info
=
246 DO_UPCAST(APICCommonInfo
, busdev
.qdev
, s
->busdev
.qdev
.info
);
248 if (info
->post_load
) {
254 static const VMStateDescription vmstate_apic_common
= {
257 .minimum_version_id
= 3,
258 .minimum_version_id_old
= 1,
259 .load_state_old
= apic_load_old
,
260 .post_load
= apic_dispatch_post_load
,
261 .fields
= (VMStateField
[]) {
262 VMSTATE_UINT32(apicbase
, APICCommonState
),
263 VMSTATE_UINT8(id
, APICCommonState
),
264 VMSTATE_UINT8(arb_id
, APICCommonState
),
265 VMSTATE_UINT8(tpr
, APICCommonState
),
266 VMSTATE_UINT32(spurious_vec
, APICCommonState
),
267 VMSTATE_UINT8(log_dest
, APICCommonState
),
268 VMSTATE_UINT8(dest_mode
, APICCommonState
),
269 VMSTATE_UINT32_ARRAY(isr
, APICCommonState
, 8),
270 VMSTATE_UINT32_ARRAY(tmr
, APICCommonState
, 8),
271 VMSTATE_UINT32_ARRAY(irr
, APICCommonState
, 8),
272 VMSTATE_UINT32_ARRAY(lvt
, APICCommonState
, APIC_LVT_NB
),
273 VMSTATE_UINT32(esr
, APICCommonState
),
274 VMSTATE_UINT32_ARRAY(icr
, APICCommonState
, 2),
275 VMSTATE_UINT32(divide_conf
, APICCommonState
),
276 VMSTATE_INT32(count_shift
, APICCommonState
),
277 VMSTATE_UINT32(initial_count
, APICCommonState
),
278 VMSTATE_INT64(initial_count_load_time
, APICCommonState
),
279 VMSTATE_INT64(next_time
, APICCommonState
),
280 VMSTATE_INT64(timer_expiry
,
281 APICCommonState
), /* open-coded timer state */
282 VMSTATE_END_OF_LIST()
286 static Property apic_properties_common
[] = {
287 DEFINE_PROP_UINT8("id", APICCommonState
, id
, -1),
288 DEFINE_PROP_PTR("cpu_env", APICCommonState
, cpu_env
),
289 DEFINE_PROP_END_OF_LIST(),
293 void apic_qdev_register(APICCommonInfo
*info
)
295 info
->busdev
.init
= apic_init_common
;
296 info
->busdev
.qdev
.size
= sizeof(APICCommonState
),
297 info
->busdev
.qdev
.vmsd
= &vmstate_apic_common
;
298 info
->busdev
.qdev
.reset
= apic_reset_common
;
299 info
->busdev
.qdev
.no_user
= 1;
300 info
->busdev
.qdev
.props
= apic_properties_common
;
301 sysbus_register_withprop(&info
->busdev
);