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cris: avoid "naked" qemu_log
[qemu/ar7.git] / memory.c
blob1c1c19234bc5ab7f20b60a115556974b34898ff2
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qemu/error-report.h"
22 #include "qom/object.h"
23 #include "trace.h"
24 #include <assert.h>
25
26 #include "exec/memory-internal.h"
27 #include "exec/ram_addr.h"
28 #include "sysemu/kvm.h"
29 #include "sysemu/sysemu.h"
30
31 //#define DEBUG_UNASSIGNED
32
33 #define RAM_ADDR_INVALID (~(ram_addr_t)0)
34
35 static unsigned memory_region_transaction_depth;
36 static bool memory_region_update_pending;
37 static bool ioeventfd_update_pending;
38 static bool global_dirty_log = false;
39
40 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
41 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
42
43 static QTAILQ_HEAD(, AddressSpace) address_spaces
44 = QTAILQ_HEAD_INITIALIZER(address_spaces);
45
46 typedef struct AddrRange AddrRange;
47
48 /*
49 * Note that signed integers are needed for negative offsetting in aliases
50 * (large MemoryRegion::alias_offset).
51 */
52 struct AddrRange {
53 Int128 start;
54 Int128 size;
55 };
56
57 static AddrRange addrrange_make(Int128 start, Int128 size)
58 {
59 return (AddrRange) { start, size };
60 }
61
62 static bool addrrange_equal(AddrRange r1, AddrRange r2)
63 {
64 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
65 }
66
67 static Int128 addrrange_end(AddrRange r)
68 {
69 return int128_add(r.start, r.size);
70 }
71
72 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
73 {
74 int128_addto(&range.start, delta);
75 return range;
76 }
77
78 static bool addrrange_contains(AddrRange range, Int128 addr)
79 {
80 return int128_ge(addr, range.start)
81 && int128_lt(addr, addrrange_end(range));
82 }
83
84 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
85 {
86 return addrrange_contains(r1, r2.start)
87 || addrrange_contains(r2, r1.start);
88 }
89
90 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
91 {
92 Int128 start = int128_max(r1.start, r2.start);
93 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
94 return addrrange_make(start, int128_sub(end, start));
95 }
96
97 enum ListenerDirection { Forward, Reverse };
98
99 static bool memory_listener_match(MemoryListener *listener,
100 MemoryRegionSection *section)
101 {
102 return !listener->address_space_filter
103 || listener->address_space_filter == section->address_space;
104 }
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
120 memory_listeners, link) { \
121 if (_listener->_callback) { \
122 _listener->_callback(_listener, ##_args); \
123 } \
124 } \
125 break; \
126 default: \
127 abort(); \
128 } \
129 } while (0)
130
131 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
132 do { \
133 MemoryListener *_listener; \
134 \
135 switch (_direction) { \
136 case Forward: \
137 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
138 if (_listener->_callback \
139 && memory_listener_match(_listener, _section)) { \
140 _listener->_callback(_listener, _section, ##_args); \
141 } \
142 } \
143 break; \
144 case Reverse: \
145 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
146 memory_listeners, link) { \
147 if (_listener->_callback \
148 && memory_listener_match(_listener, _section)) { \
149 _listener->_callback(_listener, _section, ##_args); \
150 } \
151 } \
152 break; \
153 default: \
154 abort(); \
155 } \
156 } while (0)
157
158 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
159 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
160 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
161 .mr = (fr)->mr, \
162 .address_space = (as), \
163 .offset_within_region = (fr)->offset_in_region, \
164 .size = (fr)->addr.size, \
165 .offset_within_address_space = int128_get64((fr)->addr.start), \
166 .readonly = (fr)->readonly, \
167 }), ##_args)
168
169 struct CoalescedMemoryRange {
170 AddrRange addr;
171 QTAILQ_ENTRY(CoalescedMemoryRange) link;
172 };
173
174 struct MemoryRegionIoeventfd {
175 AddrRange addr;
176 bool match_data;
177 uint64_t data;
178 EventNotifier *e;
179 };
180
181 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
182 MemoryRegionIoeventfd b)
183 {
184 if (int128_lt(a.addr.start, b.addr.start)) {
185 return true;
186 } else if (int128_gt(a.addr.start, b.addr.start)) {
187 return false;
188 } else if (int128_lt(a.addr.size, b.addr.size)) {
189 return true;
190 } else if (int128_gt(a.addr.size, b.addr.size)) {
191 return false;
192 } else if (a.match_data < b.match_data) {
193 return true;
194 } else if (a.match_data > b.match_data) {
195 return false;
196 } else if (a.match_data) {
197 if (a.data < b.data) {
198 return true;
199 } else if (a.data > b.data) {
200 return false;
201 }
202 }
203 if (a.e < b.e) {
204 return true;
205 } else if (a.e > b.e) {
206 return false;
207 }
208 return false;
209 }
210
211 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
212 MemoryRegionIoeventfd b)
213 {
214 return !memory_region_ioeventfd_before(a, b)
215 && !memory_region_ioeventfd_before(b, a);
216 }
217
218 typedef struct FlatRange FlatRange;
219 typedef struct FlatView FlatView;
220
221 /* Range of memory in the global map. Addresses are absolute. */
222 struct FlatRange {
223 MemoryRegion *mr;
224 hwaddr offset_in_region;
225 AddrRange addr;
226 uint8_t dirty_log_mask;
227 bool romd_mode;
228 bool readonly;
229 };
230
231 /* Flattened global view of current active memory hierarchy. Kept in sorted
232 * order.
233 */
234 struct FlatView {
235 struct rcu_head rcu;
236 unsigned ref;
237 FlatRange *ranges;
238 unsigned nr;
239 unsigned nr_allocated;
240 };
241
242 typedef struct AddressSpaceOps AddressSpaceOps;
243
244 #define FOR_EACH_FLAT_RANGE(var, view) \
245 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
246
247 static bool flatrange_equal(FlatRange *a, FlatRange *b)
248 {
249 return a->mr == b->mr
250 && addrrange_equal(a->addr, b->addr)
251 && a->offset_in_region == b->offset_in_region
252 && a->romd_mode == b->romd_mode
253 && a->readonly == b->readonly;
254 }
255
256 static void flatview_init(FlatView *view)
257 {
258 view->ref = 1;
259 view->ranges = NULL;
260 view->nr = 0;
261 view->nr_allocated = 0;
262 }
263
264 /* Insert a range into a given position. Caller is responsible for maintaining
265 * sorting order.
266 */
267 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
268 {
269 if (view->nr == view->nr_allocated) {
270 view->nr_allocated = MAX(2 * view->nr, 10);
271 view->ranges = g_realloc(view->ranges,
272 view->nr_allocated * sizeof(*view->ranges));
273 }
274 memmove(view->ranges + pos + 1, view->ranges + pos,
275 (view->nr - pos) * sizeof(FlatRange));
276 view->ranges[pos] = *range;
277 memory_region_ref(range->mr);
278 ++view->nr;
279 }
280
281 static void flatview_destroy(FlatView *view)
282 {
283 int i;
284
285 for (i = 0; i < view->nr; i++) {
286 memory_region_unref(view->ranges[i].mr);
287 }
288 g_free(view->ranges);
289 g_free(view);
290 }
291
292 static void flatview_ref(FlatView *view)
293 {
294 atomic_inc(&view->ref);
295 }
296
297 static void flatview_unref(FlatView *view)
298 {
299 if (atomic_fetch_dec(&view->ref) == 1) {
300 flatview_destroy(view);
301 }
302 }
303
304 static bool can_merge(FlatRange *r1, FlatRange *r2)
305 {
306 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
307 && r1->mr == r2->mr
308 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
309 r1->addr.size),
310 int128_make64(r2->offset_in_region))
311 && r1->dirty_log_mask == r2->dirty_log_mask
312 && r1->romd_mode == r2->romd_mode
313 && r1->readonly == r2->readonly;
314 }
315
316 /* Attempt to simplify a view by merging adjacent ranges */
317 static void flatview_simplify(FlatView *view)
318 {
319 unsigned i, j;
320
321 i = 0;
322 while (i < view->nr) {
323 j = i + 1;
324 while (j < view->nr
325 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
326 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
327 ++j;
328 }
329 ++i;
330 memmove(&view->ranges[i], &view->ranges[j],
331 (view->nr - j) * sizeof(view->ranges[j]));
332 view->nr -= j - i;
333 }
334 }
335
336 static bool memory_region_big_endian(MemoryRegion *mr)
337 {
338 #ifdef TARGET_WORDS_BIGENDIAN
339 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
340 #else
341 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
342 #endif
343 }
344
345 static bool memory_region_wrong_endianness(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
355 {
356 if (memory_region_wrong_endianness(mr)) {
357 switch (size) {
358 case 1:
359 break;
360 case 2:
361 *data = bswap16(*data);
362 break;
363 case 4:
364 *data = bswap32(*data);
365 break;
366 case 8:
367 *data = bswap64(*data);
368 break;
369 default:
370 abort();
371 }
372 }
373 }
374
375 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
376 hwaddr addr,
377 uint64_t *value,
378 unsigned size,
379 unsigned shift,
380 uint64_t mask,
381 MemTxAttrs attrs)
382 {
383 uint64_t tmp;
384
385 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
386 trace_memory_region_ops_read(mr, addr, tmp, size);
387 *value |= (tmp & mask) << shift;
388 return MEMTX_OK;
389 }
390
391 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
392 hwaddr addr,
393 uint64_t *value,
394 unsigned size,
395 unsigned shift,
396 uint64_t mask,
397 MemTxAttrs attrs)
398 {
399 uint64_t tmp;
400
401 tmp = mr->ops->read(mr->opaque, addr, size);
402 trace_memory_region_ops_read(mr, addr, tmp, size);
403 *value |= (tmp & mask) << shift;
404 return MEMTX_OK;
405 }
406
407 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
408 hwaddr addr,
409 uint64_t *value,
410 unsigned size,
411 unsigned shift,
412 uint64_t mask,
413 MemTxAttrs attrs)
414 {
415 uint64_t tmp = 0;
416 MemTxResult r;
417
418 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
419 trace_memory_region_ops_read(mr, addr, tmp, size);
420 *value |= (tmp & mask) << shift;
421 return r;
422 }
423
424 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = (*value >> shift) & mask;
435 trace_memory_region_ops_write(mr, addr, tmp, size);
436 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
437 return MEMTX_OK;
438 }
439
440 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
441 hwaddr addr,
442 uint64_t *value,
443 unsigned size,
444 unsigned shift,
445 uint64_t mask,
446 MemTxAttrs attrs)
447 {
448 uint64_t tmp;
449
450 tmp = (*value >> shift) & mask;
451 trace_memory_region_ops_write(mr, addr, tmp, size);
452 mr->ops->write(mr->opaque, addr, tmp, size);
453 return MEMTX_OK;
454 }
455
456 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
457 hwaddr addr,
458 uint64_t *value,
459 unsigned size,
460 unsigned shift,
461 uint64_t mask,
462 MemTxAttrs attrs)
463 {
464 uint64_t tmp;
465
466 tmp = (*value >> shift) & mask;
467 trace_memory_region_ops_write(mr, addr, tmp, size);
468 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
469 }
470
471 static MemTxResult access_with_adjusted_size(hwaddr addr,
472 uint64_t *value,
473 unsigned size,
474 unsigned access_size_min,
475 unsigned access_size_max,
476 MemTxResult (*access)(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned shift,
481 uint64_t mask,
482 MemTxAttrs attrs),
483 MemoryRegion *mr,
484 MemTxAttrs attrs)
485 {
486 uint64_t access_mask;
487 unsigned access_size;
488 unsigned i;
489 MemTxResult r = MEMTX_OK;
490
491 if (!access_size_min) {
492 access_size_min = 1;
493 }
494 if (!access_size_max) {
495 access_size_max = 4;
496 }
497
498 /* FIXME: support unaligned access? */
499 access_size = MAX(MIN(size, access_size_max), access_size_min);
500 access_mask = -1ULL >> (64 - access_size * 8);
501 if (memory_region_big_endian(mr)) {
502 for (i = 0; i < size; i += access_size) {
503 r |= access(mr, addr + i, value, access_size,
504 (size - access_size - i) * 8, access_mask, attrs);
505 }
506 } else {
507 for (i = 0; i < size; i += access_size) {
508 r |= access(mr, addr + i, value, access_size, i * 8,
509 access_mask, attrs);
510 }
511 }
512 return r;
513 }
514
515 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
516 {
517 AddressSpace *as;
518
519 while (mr->container) {
520 mr = mr->container;
521 }
522 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
523 if (mr == as->root) {
524 return as;
525 }
526 }
527 return NULL;
528 }
529
530 /* Render a memory region into the global view. Ranges in @view obscure
531 * ranges in @mr.
532 */
533 static void render_memory_region(FlatView *view,
534 MemoryRegion *mr,
535 Int128 base,
536 AddrRange clip,
537 bool readonly)
538 {
539 MemoryRegion *subregion;
540 unsigned i;
541 hwaddr offset_in_region;
542 Int128 remain;
543 Int128 now;
544 FlatRange fr;
545 AddrRange tmp;
546
547 if (!mr->enabled) {
548 return;
549 }
550
551 int128_addto(&base, int128_make64(mr->addr));
552 readonly |= mr->readonly;
553
554 tmp = addrrange_make(base, mr->size);
555
556 if (!addrrange_intersects(tmp, clip)) {
557 return;
558 }
559
560 clip = addrrange_intersection(tmp, clip);
561
562 if (mr->alias) {
563 int128_subfrom(&base, int128_make64(mr->alias->addr));
564 int128_subfrom(&base, int128_make64(mr->alias_offset));
565 render_memory_region(view, mr->alias, base, clip, readonly);
566 return;
567 }
568
569 /* Render subregions in priority order. */
570 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
571 render_memory_region(view, subregion, base, clip, readonly);
572 }
573
574 if (!mr->terminates) {
575 return;
576 }
577
578 offset_in_region = int128_get64(int128_sub(clip.start, base));
579 base = clip.start;
580 remain = clip.size;
581
582 fr.mr = mr;
583 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
584 fr.romd_mode = mr->romd_mode;
585 fr.readonly = readonly;
586
587 /* Render the region itself into any gaps left by the current view. */
588 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
589 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
590 continue;
591 }
592 if (int128_lt(base, view->ranges[i].addr.start)) {
593 now = int128_min(remain,
594 int128_sub(view->ranges[i].addr.start, base));
595 fr.offset_in_region = offset_in_region;
596 fr.addr = addrrange_make(base, now);
597 flatview_insert(view, i, &fr);
598 ++i;
599 int128_addto(&base, now);
600 offset_in_region += int128_get64(now);
601 int128_subfrom(&remain, now);
602 }
603 now = int128_sub(int128_min(int128_add(base, remain),
604 addrrange_end(view->ranges[i].addr)),
605 base);
606 int128_addto(&base, now);
607 offset_in_region += int128_get64(now);
608 int128_subfrom(&remain, now);
609 }
610 if (int128_nz(remain)) {
611 fr.offset_in_region = offset_in_region;
612 fr.addr = addrrange_make(base, remain);
613 flatview_insert(view, i, &fr);
614 }
615 }
616
617 /* Render a memory topology into a list of disjoint absolute ranges. */
618 static FlatView *generate_memory_topology(MemoryRegion *mr)
619 {
620 FlatView *view;
621
622 view = g_new(FlatView, 1);
623 flatview_init(view);
624
625 if (mr) {
626 render_memory_region(view, mr, int128_zero(),
627 addrrange_make(int128_zero(), int128_2_64()), false);
628 }
629 flatview_simplify(view);
630
631 return view;
632 }
633
634 static void address_space_add_del_ioeventfds(AddressSpace *as,
635 MemoryRegionIoeventfd *fds_new,
636 unsigned fds_new_nb,
637 MemoryRegionIoeventfd *fds_old,
638 unsigned fds_old_nb)
639 {
640 unsigned iold, inew;
641 MemoryRegionIoeventfd *fd;
642 MemoryRegionSection section;
643
644 /* Generate a symmetric difference of the old and new fd sets, adding
645 * and deleting as necessary.
646 */
647
648 iold = inew = 0;
649 while (iold < fds_old_nb || inew < fds_new_nb) {
650 if (iold < fds_old_nb
651 && (inew == fds_new_nb
652 || memory_region_ioeventfd_before(fds_old[iold],
653 fds_new[inew]))) {
654 fd = &fds_old[iold];
655 section = (MemoryRegionSection) {
656 .address_space = as,
657 .offset_within_address_space = int128_get64(fd->addr.start),
658 .size = fd->addr.size,
659 };
660 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
661 fd->match_data, fd->data, fd->e);
662 ++iold;
663 } else if (inew < fds_new_nb
664 && (iold == fds_old_nb
665 || memory_region_ioeventfd_before(fds_new[inew],
666 fds_old[iold]))) {
667 fd = &fds_new[inew];
668 section = (MemoryRegionSection) {
669 .address_space = as,
670 .offset_within_address_space = int128_get64(fd->addr.start),
671 .size = fd->addr.size,
672 };
673 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
674 fd->match_data, fd->data, fd->e);
675 ++inew;
676 } else {
677 ++iold;
678 ++inew;
679 }
680 }
681 }
682
683 static FlatView *address_space_get_flatview(AddressSpace *as)
684 {
685 FlatView *view;
686
687 rcu_read_lock();
688 view = atomic_rcu_read(&as->current_map);
689 flatview_ref(view);
690 rcu_read_unlock();
691 return view;
692 }
693
694 static void address_space_update_ioeventfds(AddressSpace *as)
695 {
696 FlatView *view;
697 FlatRange *fr;
698 unsigned ioeventfd_nb = 0;
699 MemoryRegionIoeventfd *ioeventfds = NULL;
700 AddrRange tmp;
701 unsigned i;
702
703 view = address_space_get_flatview(as);
704 FOR_EACH_FLAT_RANGE(fr, view) {
705 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
706 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
707 int128_sub(fr->addr.start,
708 int128_make64(fr->offset_in_region)));
709 if (addrrange_intersects(fr->addr, tmp)) {
710 ++ioeventfd_nb;
711 ioeventfds = g_realloc(ioeventfds,
712 ioeventfd_nb * sizeof(*ioeventfds));
713 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
714 ioeventfds[ioeventfd_nb-1].addr = tmp;
715 }
716 }
717 }
718
719 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
720 as->ioeventfds, as->ioeventfd_nb);
721
722 g_free(as->ioeventfds);
723 as->ioeventfds = ioeventfds;
724 as->ioeventfd_nb = ioeventfd_nb;
725 flatview_unref(view);
726 }
727
728 static void address_space_update_topology_pass(AddressSpace *as,
729 const FlatView *old_view,
730 const FlatView *new_view,
731 bool adding)
732 {
733 unsigned iold, inew;
734 FlatRange *frold, *frnew;
735
736 /* Generate a symmetric difference of the old and new memory maps.
737 * Kill ranges in the old map, and instantiate ranges in the new map.
738 */
739 iold = inew = 0;
740 while (iold < old_view->nr || inew < new_view->nr) {
741 if (iold < old_view->nr) {
742 frold = &old_view->ranges[iold];
743 } else {
744 frold = NULL;
745 }
746 if (inew < new_view->nr) {
747 frnew = &new_view->ranges[inew];
748 } else {
749 frnew = NULL;
750 }
751
752 if (frold
753 && (!frnew
754 || int128_lt(frold->addr.start, frnew->addr.start)
755 || (int128_eq(frold->addr.start, frnew->addr.start)
756 && !flatrange_equal(frold, frnew)))) {
757 /* In old but not in new, or in both but attributes changed. */
758
759 if (!adding) {
760 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
761 }
762
763 ++iold;
764 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
765 /* In both and unchanged (except logging may have changed) */
766
767 if (adding) {
768 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
769 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
770 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
771 frold->dirty_log_mask,
772 frnew->dirty_log_mask);
773 }
774 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
775 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
776 frold->dirty_log_mask,
777 frnew->dirty_log_mask);
778 }
779 }
780
781 ++iold;
782 ++inew;
783 } else {
784 /* In new */
785
786 if (adding) {
787 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
788 }
789
790 ++inew;
791 }
792 }
793 }
794
795
796 static void address_space_update_topology(AddressSpace *as)
797 {
798 FlatView *old_view = address_space_get_flatview(as);
799 FlatView *new_view = generate_memory_topology(as->root);
800
801 address_space_update_topology_pass(as, old_view, new_view, false);
802 address_space_update_topology_pass(as, old_view, new_view, true);
803
804 /* Writes are protected by the BQL. */
805 atomic_rcu_set(&as->current_map, new_view);
806 call_rcu(old_view, flatview_unref, rcu);
807
808 /* Note that all the old MemoryRegions are still alive up to this
809 * point. This relieves most MemoryListeners from the need to
810 * ref/unref the MemoryRegions they get---unless they use them
811 * outside the iothread mutex, in which case precise reference
812 * counting is necessary.
813 */
814 flatview_unref(old_view);
815
816 address_space_update_ioeventfds(as);
817 }
818
819 void memory_region_transaction_begin(void)
820 {
821 qemu_flush_coalesced_mmio_buffer();
822 ++memory_region_transaction_depth;
823 }
824
825 static void memory_region_clear_pending(void)
826 {
827 memory_region_update_pending = false;
828 ioeventfd_update_pending = false;
829 }
830
831 void memory_region_transaction_commit(void)
832 {
833 AddressSpace *as;
834
835 assert(memory_region_transaction_depth);
836 --memory_region_transaction_depth;
837 if (!memory_region_transaction_depth) {
838 if (memory_region_update_pending) {
839 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
840
841 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
842 address_space_update_topology(as);
843 }
844
845 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
846 } else if (ioeventfd_update_pending) {
847 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
848 address_space_update_ioeventfds(as);
849 }
850 }
851 memory_region_clear_pending();
852 }
853 }
854
855 static void memory_region_destructor_none(MemoryRegion *mr)
856 {
857 }
858
859 static void memory_region_destructor_ram(MemoryRegion *mr)
860 {
861 qemu_ram_free(mr->ram_addr);
862 }
863
864 static void memory_region_destructor_rom_device(MemoryRegion *mr)
865 {
866 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
867 }
868
869 static bool memory_region_need_escape(char c)
870 {
871 return c == '/' || c == '[' || c == '\\' || c == ']';
872 }
873
874 static char *memory_region_escape_name(const char *name)
875 {
876 const char *p;
877 char *escaped, *q;
878 uint8_t c;
879 size_t bytes = 0;
880
881 for (p = name; *p; p++) {
882 bytes += memory_region_need_escape(*p) ? 4 : 1;
883 }
884 if (bytes == p - name) {
885 return g_memdup(name, bytes + 1);
886 }
887
888 escaped = g_malloc(bytes + 1);
889 for (p = name, q = escaped; *p; p++) {
890 c = *p;
891 if (unlikely(memory_region_need_escape(c))) {
892 *q++ = '\\';
893 *q++ = 'x';
894 *q++ = "0123456789abcdef"[c >> 4];
895 c = "0123456789abcdef"[c & 15];
896 }
897 *q++ = c;
898 }
899 *q = 0;
900 return escaped;
901 }
902
903 void memory_region_init(MemoryRegion *mr,
904 Object *owner,
905 const char *name,
906 uint64_t size)
907 {
908 if (!owner) {
909 owner = container_get(qdev_get_machine(), "/unattached");
910 }
911
912 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
913 mr->size = int128_make64(size);
914 if (size == UINT64_MAX) {
915 mr->size = int128_2_64();
916 }
917 mr->name = g_strdup(name);
918
919 if (name) {
920 char *escaped_name = memory_region_escape_name(name);
921 char *name_array = g_strdup_printf("%s[*]", escaped_name);
922 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
923 object_unref(OBJECT(mr));
924 g_free(name_array);
925 g_free(escaped_name);
926 }
927 }
928
929 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
930 const char *name, Error **errp)
931 {
932 MemoryRegion *mr = MEMORY_REGION(obj);
933 uint64_t value = mr->addr;
934
935 visit_type_uint64(v, &value, name, errp);
936 }
937
938 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
939 const char *name, Error **errp)
940 {
941 MemoryRegion *mr = MEMORY_REGION(obj);
942 gchar *path = (gchar *)"";
943
944 if (mr->container) {
945 path = object_get_canonical_path(OBJECT(mr->container));
946 }
947 visit_type_str(v, &path, name, errp);
948 if (mr->container) {
949 g_free(path);
950 }
951 }
952
953 static Object *memory_region_resolve_container(Object *obj, void *opaque,
954 const char *part)
955 {
956 MemoryRegion *mr = MEMORY_REGION(obj);
957
958 return OBJECT(mr->container);
959 }
960
961 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
962 const char *name, Error **errp)
963 {
964 MemoryRegion *mr = MEMORY_REGION(obj);
965 int32_t value = mr->priority;
966
967 visit_type_int32(v, &value, name, errp);
968 }
969
970 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
971 {
972 MemoryRegion *mr = MEMORY_REGION(obj);
973
974 return mr->may_overlap;
975 }
976
977 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
978 const char *name, Error **errp)
979 {
980 MemoryRegion *mr = MEMORY_REGION(obj);
981 uint64_t value = memory_region_size(mr);
982
983 visit_type_uint64(v, &value, name, errp);
984 }
985
986 static void memory_region_initfn(Object *obj)
987 {
988 MemoryRegion *mr = MEMORY_REGION(obj);
989 ObjectProperty *op;
990
991 mr->ops = &unassigned_mem_ops;
992 mr->ram_addr = RAM_ADDR_INVALID;
993 mr->enabled = true;
994 mr->romd_mode = true;
995 mr->global_locking = true;
996 mr->destructor = memory_region_destructor_none;
997 QTAILQ_INIT(&mr->subregions);
998 QTAILQ_INIT(&mr->coalesced);
999
1000 op = object_property_add(OBJECT(mr), "container",
1001 "link<" TYPE_MEMORY_REGION ">",
1002 memory_region_get_container,
1003 NULL, /* memory_region_set_container */
1004 NULL, NULL, &error_abort);
1005 op->resolve = memory_region_resolve_container;
1006
1007 object_property_add(OBJECT(mr), "addr", "uint64",
1008 memory_region_get_addr,
1009 NULL, /* memory_region_set_addr */
1010 NULL, NULL, &error_abort);
1011 object_property_add(OBJECT(mr), "priority", "uint32",
1012 memory_region_get_priority,
1013 NULL, /* memory_region_set_priority */
1014 NULL, NULL, &error_abort);
1015 object_property_add_bool(OBJECT(mr), "may-overlap",
1016 memory_region_get_may_overlap,
1017 NULL, /* memory_region_set_may_overlap */
1018 &error_abort);
1019 object_property_add(OBJECT(mr), "size", "uint64",
1020 memory_region_get_size,
1021 NULL, /* memory_region_set_size, */
1022 NULL, NULL, &error_abort);
1023 }
1024
1025 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1026 unsigned size)
1027 {
1028 #ifdef DEBUG_UNASSIGNED
1029 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1030 #endif
1031 if (current_cpu != NULL) {
1032 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1033 }
1034 return 0;
1035 }
1036
1037 static void unassigned_mem_write(void *opaque, hwaddr addr,
1038 uint64_t val, unsigned size)
1039 {
1040 #ifdef DEBUG_UNASSIGNED
1041 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1042 #endif
1043 if (current_cpu != NULL) {
1044 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1045 }
1046 }
1047
1048 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1049 unsigned size, bool is_write)
1050 {
1051 return false;
1052 }
1053
1054 const MemoryRegionOps unassigned_mem_ops = {
1055 .valid.accepts = unassigned_mem_accepts,
1056 .endianness = DEVICE_NATIVE_ENDIAN,
1057 };
1058
1059 bool memory_region_access_valid(MemoryRegion *mr,
1060 hwaddr addr,
1061 unsigned size,
1062 bool is_write)
1063 {
1064 int access_size_min, access_size_max;
1065 int access_size, i;
1066
1067 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1068 return false;
1069 }
1070
1071 if (!mr->ops->valid.accepts) {
1072 return true;
1073 }
1074
1075 access_size_min = mr->ops->valid.min_access_size;
1076 if (!mr->ops->valid.min_access_size) {
1077 access_size_min = 1;
1078 }
1079
1080 access_size_max = mr->ops->valid.max_access_size;
1081 if (!mr->ops->valid.max_access_size) {
1082 access_size_max = 4;
1083 }
1084
1085 access_size = MAX(MIN(size, access_size_max), access_size_min);
1086 for (i = 0; i < size; i += access_size) {
1087 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1088 is_write)) {
1089 return false;
1090 }
1091 }
1092
1093 return true;
1094 }
1095
1096 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1097 hwaddr addr,
1098 uint64_t *pval,
1099 unsigned size,
1100 MemTxAttrs attrs)
1101 {
1102 *pval = 0;
1103
1104 if (mr->ops->read) {
1105 return access_with_adjusted_size(addr, pval, size,
1106 mr->ops->impl.min_access_size,
1107 mr->ops->impl.max_access_size,
1108 memory_region_read_accessor,
1109 mr, attrs);
1110 } else if (mr->ops->read_with_attrs) {
1111 return access_with_adjusted_size(addr, pval, size,
1112 mr->ops->impl.min_access_size,
1113 mr->ops->impl.max_access_size,
1114 memory_region_read_with_attrs_accessor,
1115 mr, attrs);
1116 } else {
1117 return access_with_adjusted_size(addr, pval, size, 1, 4,
1118 memory_region_oldmmio_read_accessor,
1119 mr, attrs);
1120 }
1121 }
1122
1123 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1124 hwaddr addr,
1125 uint64_t *pval,
1126 unsigned size,
1127 MemTxAttrs attrs)
1128 {
1129 MemTxResult r;
1130
1131 if (!memory_region_access_valid(mr, addr, size, false)) {
1132 *pval = unassigned_mem_read(mr, addr, size);
1133 return MEMTX_DECODE_ERROR;
1134 }
1135
1136 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1137 adjust_endianness(mr, pval, size);
1138 return r;
1139 }
1140
1141 /* Return true if an eventfd was signalled */
1142 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1143 hwaddr addr,
1144 uint64_t data,
1145 unsigned size,
1146 MemTxAttrs attrs)
1147 {
1148 MemoryRegionIoeventfd ioeventfd = {
1149 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1150 .data = data,
1151 };
1152 unsigned i;
1153
1154 for (i = 0; i < mr->ioeventfd_nb; i++) {
1155 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1156 ioeventfd.e = mr->ioeventfds[i].e;
1157
1158 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1159 event_notifier_set(ioeventfd.e);
1160 return true;
1161 }
1162 }
1163
1164 return false;
1165 }
1166
1167 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1168 hwaddr addr,
1169 uint64_t data,
1170 unsigned size,
1171 MemTxAttrs attrs)
1172 {
1173 if (!memory_region_access_valid(mr, addr, size, true)) {
1174 unassigned_mem_write(mr, addr, data, size);
1175 return MEMTX_DECODE_ERROR;
1176 }
1177
1178 adjust_endianness(mr, &data, size);
1179
1180 if ((!kvm_eventfds_enabled()) &&
1181 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1182 return MEMTX_OK;
1183 }
1184
1185 if (mr->ops->write) {
1186 return access_with_adjusted_size(addr, &data, size,
1187 mr->ops->impl.min_access_size,
1188 mr->ops->impl.max_access_size,
1189 memory_region_write_accessor, mr,
1190 attrs);
1191 } else if (mr->ops->write_with_attrs) {
1192 return
1193 access_with_adjusted_size(addr, &data, size,
1194 mr->ops->impl.min_access_size,
1195 mr->ops->impl.max_access_size,
1196 memory_region_write_with_attrs_accessor,
1197 mr, attrs);
1198 } else {
1199 return access_with_adjusted_size(addr, &data, size, 1, 4,
1200 memory_region_oldmmio_write_accessor,
1201 mr, attrs);
1202 }
1203 }
1204
1205 void memory_region_init_io(MemoryRegion *mr,
1206 Object *owner,
1207 const MemoryRegionOps *ops,
1208 void *opaque,
1209 const char *name,
1210 uint64_t size)
1211 {
1212 memory_region_init(mr, owner, name, size);
1213 mr->ops = ops ? ops : &unassigned_mem_ops;
1214 mr->opaque = opaque;
1215 mr->terminates = true;
1216 }
1217
1218 void memory_region_init_ram(MemoryRegion *mr,
1219 Object *owner,
1220 const char *name,
1221 uint64_t size,
1222 Error **errp)
1223 {
1224 memory_region_init(mr, owner, name, size);
1225 mr->ram = true;
1226 mr->terminates = true;
1227 mr->destructor = memory_region_destructor_ram;
1228 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1229 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1230 }
1231
1232 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1233 Object *owner,
1234 const char *name,
1235 uint64_t size,
1236 uint64_t max_size,
1237 void (*resized)(const char*,
1238 uint64_t length,
1239 void *host),
1240 Error **errp)
1241 {
1242 memory_region_init(mr, owner, name, size);
1243 mr->ram = true;
1244 mr->terminates = true;
1245 mr->destructor = memory_region_destructor_ram;
1246 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1247 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1248 }
1249
1250 #ifdef __linux__
1251 void memory_region_init_ram_from_file(MemoryRegion *mr,
1252 struct Object *owner,
1253 const char *name,
1254 uint64_t size,
1255 bool share,
1256 const char *path,
1257 Error **errp)
1258 {
1259 memory_region_init(mr, owner, name, size);
1260 mr->ram = true;
1261 mr->terminates = true;
1262 mr->destructor = memory_region_destructor_ram;
1263 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1264 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1265 }
1266 #endif
1267
1268 void memory_region_init_ram_ptr(MemoryRegion *mr,
1269 Object *owner,
1270 const char *name,
1271 uint64_t size,
1272 void *ptr)
1273 {
1274 memory_region_init(mr, owner, name, size);
1275 mr->ram = true;
1276 mr->terminates = true;
1277 mr->destructor = memory_region_destructor_ram;
1278 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1279
1280 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1281 assert(ptr != NULL);
1282 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1283 }
1284
1285 void memory_region_set_skip_dump(MemoryRegion *mr)
1286 {
1287 mr->skip_dump = true;
1288 }
1289
1290 void memory_region_init_alias(MemoryRegion *mr,
1291 Object *owner,
1292 const char *name,
1293 MemoryRegion *orig,
1294 hwaddr offset,
1295 uint64_t size)
1296 {
1297 memory_region_init(mr, owner, name, size);
1298 mr->alias = orig;
1299 mr->alias_offset = offset;
1300 }
1301
1302 void memory_region_init_rom_device(MemoryRegion *mr,
1303 Object *owner,
1304 const MemoryRegionOps *ops,
1305 void *opaque,
1306 const char *name,
1307 uint64_t size,
1308 Error **errp)
1309 {
1310 memory_region_init(mr, owner, name, size);
1311 mr->ops = ops;
1312 mr->opaque = opaque;
1313 mr->terminates = true;
1314 mr->rom_device = true;
1315 mr->destructor = memory_region_destructor_rom_device;
1316 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1317 }
1318
1319 void memory_region_init_iommu(MemoryRegion *mr,
1320 Object *owner,
1321 const MemoryRegionIOMMUOps *ops,
1322 const char *name,
1323 uint64_t size)
1324 {
1325 memory_region_init(mr, owner, name, size);
1326 mr->iommu_ops = ops,
1327 mr->terminates = true; /* then re-forwards */
1328 notifier_list_init(&mr->iommu_notify);
1329 }
1330
1331 static void memory_region_finalize(Object *obj)
1332 {
1333 MemoryRegion *mr = MEMORY_REGION(obj);
1334
1335 assert(!mr->container);
1336
1337 /* We know the region is not visible in any address space (it
1338 * does not have a container and cannot be a root either because
1339 * it has no references, so we can blindly clear mr->enabled.
1340 * memory_region_set_enabled instead could trigger a transaction
1341 * and cause an infinite loop.
1342 */
1343 mr->enabled = false;
1344 memory_region_transaction_begin();
1345 while (!QTAILQ_EMPTY(&mr->subregions)) {
1346 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1347 memory_region_del_subregion(mr, subregion);
1348 }
1349 memory_region_transaction_commit();
1350
1351 mr->destructor(mr);
1352 memory_region_clear_coalescing(mr);
1353 g_free((char *)mr->name);
1354 g_free(mr->ioeventfds);
1355 }
1356
1357 Object *memory_region_owner(MemoryRegion *mr)
1358 {
1359 Object *obj = OBJECT(mr);
1360 return obj->parent;
1361 }
1362
1363 void memory_region_ref(MemoryRegion *mr)
1364 {
1365 /* MMIO callbacks most likely will access data that belongs
1366 * to the owner, hence the need to ref/unref the owner whenever
1367 * the memory region is in use.
1368 *
1369 * The memory region is a child of its owner. As long as the
1370 * owner doesn't call unparent itself on the memory region,
1371 * ref-ing the owner will also keep the memory region alive.
1372 * Memory regions without an owner are supposed to never go away,
1373 * but we still ref/unref them for debugging purposes.
1374 */
1375 Object *obj = OBJECT(mr);
1376 if (obj && obj->parent) {
1377 object_ref(obj->parent);
1378 } else {
1379 object_ref(obj);
1380 }
1381 }
1382
1383 void memory_region_unref(MemoryRegion *mr)
1384 {
1385 Object *obj = OBJECT(mr);
1386 if (obj && obj->parent) {
1387 object_unref(obj->parent);
1388 } else {
1389 object_unref(obj);
1390 }
1391 }
1392
1393 uint64_t memory_region_size(MemoryRegion *mr)
1394 {
1395 if (int128_eq(mr->size, int128_2_64())) {
1396 return UINT64_MAX;
1397 }
1398 return int128_get64(mr->size);
1399 }
1400
1401 const char *memory_region_name(const MemoryRegion *mr)
1402 {
1403 if (!mr->name) {
1404 ((MemoryRegion *)mr)->name =
1405 object_get_canonical_path_component(OBJECT(mr));
1406 }
1407 return mr->name;
1408 }
1409
1410 bool memory_region_is_ram(MemoryRegion *mr)
1411 {
1412 return mr->ram;
1413 }
1414
1415 bool memory_region_is_skip_dump(MemoryRegion *mr)
1416 {
1417 return mr->skip_dump;
1418 }
1419
1420 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1421 {
1422 uint8_t mask = mr->dirty_log_mask;
1423 if (global_dirty_log) {
1424 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1425 }
1426 return mask;
1427 }
1428
1429 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1430 {
1431 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1432 }
1433
1434 bool memory_region_is_rom(MemoryRegion *mr)
1435 {
1436 return mr->ram && mr->readonly;
1437 }
1438
1439 bool memory_region_is_iommu(MemoryRegion *mr)
1440 {
1441 return mr->iommu_ops;
1442 }
1443
1444 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1445 {
1446 notifier_list_add(&mr->iommu_notify, n);
1447 }
1448
1449 void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n,
1450 hwaddr granularity, bool is_write)
1451 {
1452 hwaddr addr;
1453 IOMMUTLBEntry iotlb;
1454
1455 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1456 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1457 if (iotlb.perm != IOMMU_NONE) {
1458 n->notify(n, &iotlb);
1459 }
1460
1461 /* if (2^64 - MR size) < granularity, it's possible to get an
1462 * infinite loop here. This should catch such a wraparound */
1463 if ((addr + granularity) < addr) {
1464 break;
1465 }
1466 }
1467 }
1468
1469 void memory_region_unregister_iommu_notifier(Notifier *n)
1470 {
1471 notifier_remove(n);
1472 }
1473
1474 void memory_region_notify_iommu(MemoryRegion *mr,
1475 IOMMUTLBEntry entry)
1476 {
1477 assert(memory_region_is_iommu(mr));
1478 notifier_list_notify(&mr->iommu_notify, &entry);
1479 }
1480
1481 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1482 {
1483 uint8_t mask = 1 << client;
1484 uint8_t old_logging;
1485
1486 assert(client == DIRTY_MEMORY_VGA);
1487 old_logging = mr->vga_logging_count;
1488 mr->vga_logging_count += log ? 1 : -1;
1489 if (!!old_logging == !!mr->vga_logging_count) {
1490 return;
1491 }
1492
1493 memory_region_transaction_begin();
1494 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1495 memory_region_update_pending |= mr->enabled;
1496 memory_region_transaction_commit();
1497 }
1498
1499 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1500 hwaddr size, unsigned client)
1501 {
1502 assert(mr->ram_addr != RAM_ADDR_INVALID);
1503 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1504 }
1505
1506 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1507 hwaddr size)
1508 {
1509 assert(mr->ram_addr != RAM_ADDR_INVALID);
1510 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1511 memory_region_get_dirty_log_mask(mr));
1512 }
1513
1514 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1515 hwaddr size, unsigned client)
1516 {
1517 assert(mr->ram_addr != RAM_ADDR_INVALID);
1518 return cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr,
1519 size, client);
1520 }
1521
1522
1523 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1524 {
1525 AddressSpace *as;
1526 FlatRange *fr;
1527
1528 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1529 FlatView *view = address_space_get_flatview(as);
1530 FOR_EACH_FLAT_RANGE(fr, view) {
1531 if (fr->mr == mr) {
1532 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1533 }
1534 }
1535 flatview_unref(view);
1536 }
1537 }
1538
1539 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1540 {
1541 if (mr->readonly != readonly) {
1542 memory_region_transaction_begin();
1543 mr->readonly = readonly;
1544 memory_region_update_pending |= mr->enabled;
1545 memory_region_transaction_commit();
1546 }
1547 }
1548
1549 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1550 {
1551 if (mr->romd_mode != romd_mode) {
1552 memory_region_transaction_begin();
1553 mr->romd_mode = romd_mode;
1554 memory_region_update_pending |= mr->enabled;
1555 memory_region_transaction_commit();
1556 }
1557 }
1558
1559 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1560 hwaddr size, unsigned client)
1561 {
1562 assert(mr->ram_addr != RAM_ADDR_INVALID);
1563 cpu_physical_memory_test_and_clear_dirty(mr->ram_addr + addr, size,
1564 client);
1565 }
1566
1567 int memory_region_get_fd(MemoryRegion *mr)
1568 {
1569 if (mr->alias) {
1570 return memory_region_get_fd(mr->alias);
1571 }
1572
1573 assert(mr->ram_addr != RAM_ADDR_INVALID);
1574
1575 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1576 }
1577
1578 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1579 {
1580 if (mr->alias) {
1581 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1582 }
1583
1584 assert(mr->ram_addr != RAM_ADDR_INVALID);
1585
1586 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1587 }
1588
1589 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1590 {
1591 assert(mr->ram_addr != RAM_ADDR_INVALID);
1592
1593 qemu_ram_resize(mr->ram_addr, newsize, errp);
1594 }
1595
1596 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1597 {
1598 FlatView *view;
1599 FlatRange *fr;
1600 CoalescedMemoryRange *cmr;
1601 AddrRange tmp;
1602 MemoryRegionSection section;
1603
1604 view = address_space_get_flatview(as);
1605 FOR_EACH_FLAT_RANGE(fr, view) {
1606 if (fr->mr == mr) {
1607 section = (MemoryRegionSection) {
1608 .address_space = as,
1609 .offset_within_address_space = int128_get64(fr->addr.start),
1610 .size = fr->addr.size,
1611 };
1612
1613 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1614 int128_get64(fr->addr.start),
1615 int128_get64(fr->addr.size));
1616 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1617 tmp = addrrange_shift(cmr->addr,
1618 int128_sub(fr->addr.start,
1619 int128_make64(fr->offset_in_region)));
1620 if (!addrrange_intersects(tmp, fr->addr)) {
1621 continue;
1622 }
1623 tmp = addrrange_intersection(tmp, fr->addr);
1624 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1625 int128_get64(tmp.start),
1626 int128_get64(tmp.size));
1627 }
1628 }
1629 }
1630 flatview_unref(view);
1631 }
1632
1633 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1634 {
1635 AddressSpace *as;
1636
1637 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1638 memory_region_update_coalesced_range_as(mr, as);
1639 }
1640 }
1641
1642 void memory_region_set_coalescing(MemoryRegion *mr)
1643 {
1644 memory_region_clear_coalescing(mr);
1645 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1646 }
1647
1648 void memory_region_add_coalescing(MemoryRegion *mr,
1649 hwaddr offset,
1650 uint64_t size)
1651 {
1652 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1653
1654 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1655 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1656 memory_region_update_coalesced_range(mr);
1657 memory_region_set_flush_coalesced(mr);
1658 }
1659
1660 void memory_region_clear_coalescing(MemoryRegion *mr)
1661 {
1662 CoalescedMemoryRange *cmr;
1663 bool updated = false;
1664
1665 qemu_flush_coalesced_mmio_buffer();
1666 mr->flush_coalesced_mmio = false;
1667
1668 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1669 cmr = QTAILQ_FIRST(&mr->coalesced);
1670 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1671 g_free(cmr);
1672 updated = true;
1673 }
1674
1675 if (updated) {
1676 memory_region_update_coalesced_range(mr);
1677 }
1678 }
1679
1680 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1681 {
1682 mr->flush_coalesced_mmio = true;
1683 }
1684
1685 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1686 {
1687 qemu_flush_coalesced_mmio_buffer();
1688 if (QTAILQ_EMPTY(&mr->coalesced)) {
1689 mr->flush_coalesced_mmio = false;
1690 }
1691 }
1692
1693 void memory_region_set_global_locking(MemoryRegion *mr)
1694 {
1695 mr->global_locking = true;
1696 }
1697
1698 void memory_region_clear_global_locking(MemoryRegion *mr)
1699 {
1700 mr->global_locking = false;
1701 }
1702
1703 static bool userspace_eventfd_warning;
1704
1705 void memory_region_add_eventfd(MemoryRegion *mr,
1706 hwaddr addr,
1707 unsigned size,
1708 bool match_data,
1709 uint64_t data,
1710 EventNotifier *e)
1711 {
1712 MemoryRegionIoeventfd mrfd = {
1713 .addr.start = int128_make64(addr),
1714 .addr.size = int128_make64(size),
1715 .match_data = match_data,
1716 .data = data,
1717 .e = e,
1718 };
1719 unsigned i;
1720
1721 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1722 userspace_eventfd_warning))) {
1723 userspace_eventfd_warning = true;
1724 error_report("Using eventfd without MMIO binding in KVM. "
1725 "Suboptimal performance expected");
1726 }
1727
1728 if (size) {
1729 adjust_endianness(mr, &mrfd.data, size);
1730 }
1731 memory_region_transaction_begin();
1732 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1733 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1734 break;
1735 }
1736 }
1737 ++mr->ioeventfd_nb;
1738 mr->ioeventfds = g_realloc(mr->ioeventfds,
1739 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1740 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1741 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1742 mr->ioeventfds[i] = mrfd;
1743 ioeventfd_update_pending |= mr->enabled;
1744 memory_region_transaction_commit();
1745 }
1746
1747 void memory_region_del_eventfd(MemoryRegion *mr,
1748 hwaddr addr,
1749 unsigned size,
1750 bool match_data,
1751 uint64_t data,
1752 EventNotifier *e)
1753 {
1754 MemoryRegionIoeventfd mrfd = {
1755 .addr.start = int128_make64(addr),
1756 .addr.size = int128_make64(size),
1757 .match_data = match_data,
1758 .data = data,
1759 .e = e,
1760 };
1761 unsigned i;
1762
1763 if (size) {
1764 adjust_endianness(mr, &mrfd.data, size);
1765 }
1766 memory_region_transaction_begin();
1767 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1768 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1769 break;
1770 }
1771 }
1772 assert(i != mr->ioeventfd_nb);
1773 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1774 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1775 --mr->ioeventfd_nb;
1776 mr->ioeventfds = g_realloc(mr->ioeventfds,
1777 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1778 ioeventfd_update_pending |= mr->enabled;
1779 memory_region_transaction_commit();
1780 }
1781
1782 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1783 {
1784 hwaddr offset = subregion->addr;
1785 MemoryRegion *mr = subregion->container;
1786 MemoryRegion *other;
1787
1788 memory_region_transaction_begin();
1789
1790 memory_region_ref(subregion);
1791 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1792 if (subregion->may_overlap || other->may_overlap) {
1793 continue;
1794 }
1795 if (int128_ge(int128_make64(offset),
1796 int128_add(int128_make64(other->addr), other->size))
1797 || int128_le(int128_add(int128_make64(offset), subregion->size),
1798 int128_make64(other->addr))) {
1799 continue;
1800 }
1801 #if 0
1802 printf("warning: subregion collision %llx/%llx (%s) "
1803 "vs %llx/%llx (%s)\n",
1804 (unsigned long long)offset,
1805 (unsigned long long)int128_get64(subregion->size),
1806 subregion->name,
1807 (unsigned long long)other->addr,
1808 (unsigned long long)int128_get64(other->size),
1809 other->name);
1810 #endif
1811 }
1812 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1813 if (subregion->priority >= other->priority) {
1814 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1815 goto done;
1816 }
1817 }
1818 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1819 done:
1820 memory_region_update_pending |= mr->enabled && subregion->enabled;
1821 memory_region_transaction_commit();
1822 }
1823
1824 static void memory_region_add_subregion_common(MemoryRegion *mr,
1825 hwaddr offset,
1826 MemoryRegion *subregion)
1827 {
1828 assert(!subregion->container);
1829 subregion->container = mr;
1830 subregion->addr = offset;
1831 memory_region_update_container_subregions(subregion);
1832 }
1833
1834 void memory_region_add_subregion(MemoryRegion *mr,
1835 hwaddr offset,
1836 MemoryRegion *subregion)
1837 {
1838 subregion->may_overlap = false;
1839 subregion->priority = 0;
1840 memory_region_add_subregion_common(mr, offset, subregion);
1841 }
1842
1843 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1844 hwaddr offset,
1845 MemoryRegion *subregion,
1846 int priority)
1847 {
1848 subregion->may_overlap = true;
1849 subregion->priority = priority;
1850 memory_region_add_subregion_common(mr, offset, subregion);
1851 }
1852
1853 void memory_region_del_subregion(MemoryRegion *mr,
1854 MemoryRegion *subregion)
1855 {
1856 memory_region_transaction_begin();
1857 assert(subregion->container == mr);
1858 subregion->container = NULL;
1859 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1860 memory_region_unref(subregion);
1861 memory_region_update_pending |= mr->enabled && subregion->enabled;
1862 memory_region_transaction_commit();
1863 }
1864
1865 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1866 {
1867 if (enabled == mr->enabled) {
1868 return;
1869 }
1870 memory_region_transaction_begin();
1871 mr->enabled = enabled;
1872 memory_region_update_pending = true;
1873 memory_region_transaction_commit();
1874 }
1875
1876 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1877 {
1878 Int128 s = int128_make64(size);
1879
1880 if (size == UINT64_MAX) {
1881 s = int128_2_64();
1882 }
1883 if (int128_eq(s, mr->size)) {
1884 return;
1885 }
1886 memory_region_transaction_begin();
1887 mr->size = s;
1888 memory_region_update_pending = true;
1889 memory_region_transaction_commit();
1890 }
1891
1892 static void memory_region_readd_subregion(MemoryRegion *mr)
1893 {
1894 MemoryRegion *container = mr->container;
1895
1896 if (container) {
1897 memory_region_transaction_begin();
1898 memory_region_ref(mr);
1899 memory_region_del_subregion(container, mr);
1900 mr->container = container;
1901 memory_region_update_container_subregions(mr);
1902 memory_region_unref(mr);
1903 memory_region_transaction_commit();
1904 }
1905 }
1906
1907 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1908 {
1909 if (addr != mr->addr) {
1910 mr->addr = addr;
1911 memory_region_readd_subregion(mr);
1912 }
1913 }
1914
1915 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1916 {
1917 assert(mr->alias);
1918
1919 if (offset == mr->alias_offset) {
1920 return;
1921 }
1922
1923 memory_region_transaction_begin();
1924 mr->alias_offset = offset;
1925 memory_region_update_pending |= mr->enabled;
1926 memory_region_transaction_commit();
1927 }
1928
1929 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1930 {
1931 return mr->ram_addr;
1932 }
1933
1934 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1935 {
1936 return mr->align;
1937 }
1938
1939 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1940 {
1941 const AddrRange *addr = addr_;
1942 const FlatRange *fr = fr_;
1943
1944 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1945 return -1;
1946 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1947 return 1;
1948 }
1949 return 0;
1950 }
1951
1952 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1953 {
1954 return bsearch(&addr, view->ranges, view->nr,
1955 sizeof(FlatRange), cmp_flatrange_addr);
1956 }
1957
1958 bool memory_region_is_mapped(MemoryRegion *mr)
1959 {
1960 return mr->container ? true : false;
1961 }
1962
1963 /* Same as memory_region_find, but it does not add a reference to the
1964 * returned region. It must be called from an RCU critical section.
1965 */
1966 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
1967 hwaddr addr, uint64_t size)
1968 {
1969 MemoryRegionSection ret = { .mr = NULL };
1970 MemoryRegion *root;
1971 AddressSpace *as;
1972 AddrRange range;
1973 FlatView *view;
1974 FlatRange *fr;
1975
1976 addr += mr->addr;
1977 for (root = mr; root->container; ) {
1978 root = root->container;
1979 addr += root->addr;
1980 }
1981
1982 as = memory_region_to_address_space(root);
1983 if (!as) {
1984 return ret;
1985 }
1986 range = addrrange_make(int128_make64(addr), int128_make64(size));
1987
1988 view = atomic_rcu_read(&as->current_map);
1989 fr = flatview_lookup(view, range);
1990 if (!fr) {
1991 return ret;
1992 }
1993
1994 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1995 --fr;
1996 }
1997
1998 ret.mr = fr->mr;
1999 ret.address_space = as;
2000 range = addrrange_intersection(range, fr->addr);
2001 ret.offset_within_region = fr->offset_in_region;
2002 ret.offset_within_region += int128_get64(int128_sub(range.start,
2003 fr->addr.start));
2004 ret.size = range.size;
2005 ret.offset_within_address_space = int128_get64(range.start);
2006 ret.readonly = fr->readonly;
2007 return ret;
2008 }
2009
2010 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2011 hwaddr addr, uint64_t size)
2012 {
2013 MemoryRegionSection ret;
2014 rcu_read_lock();
2015 ret = memory_region_find_rcu(mr, addr, size);
2016 if (ret.mr) {
2017 memory_region_ref(ret.mr);
2018 }
2019 rcu_read_unlock();
2020 return ret;
2021 }
2022
2023 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2024 {
2025 MemoryRegion *mr;
2026
2027 rcu_read_lock();
2028 mr = memory_region_find_rcu(container, addr, 1).mr;
2029 rcu_read_unlock();
2030 return mr && mr != container;
2031 }
2032
2033 void address_space_sync_dirty_bitmap(AddressSpace *as)
2034 {
2035 FlatView *view;
2036 FlatRange *fr;
2037
2038 view = address_space_get_flatview(as);
2039 FOR_EACH_FLAT_RANGE(fr, view) {
2040 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
2041 }
2042 flatview_unref(view);
2043 }
2044
2045 void memory_global_dirty_log_start(void)
2046 {
2047 global_dirty_log = true;
2048
2049 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2050
2051 /* Refresh DIRTY_LOG_MIGRATION bit. */
2052 memory_region_transaction_begin();
2053 memory_region_update_pending = true;
2054 memory_region_transaction_commit();
2055 }
2056
2057 void memory_global_dirty_log_stop(void)
2058 {
2059 global_dirty_log = false;
2060
2061 /* Refresh DIRTY_LOG_MIGRATION bit. */
2062 memory_region_transaction_begin();
2063 memory_region_update_pending = true;
2064 memory_region_transaction_commit();
2065
2066 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2067 }
2068
2069 static void listener_add_address_space(MemoryListener *listener,
2070 AddressSpace *as)
2071 {
2072 FlatView *view;
2073 FlatRange *fr;
2074
2075 if (listener->address_space_filter
2076 && listener->address_space_filter != as) {
2077 return;
2078 }
2079
2080 if (listener->begin) {
2081 listener->begin(listener);
2082 }
2083 if (global_dirty_log) {
2084 if (listener->log_global_start) {
2085 listener->log_global_start(listener);
2086 }
2087 }
2088
2089 view = address_space_get_flatview(as);
2090 FOR_EACH_FLAT_RANGE(fr, view) {
2091 MemoryRegionSection section = {
2092 .mr = fr->mr,
2093 .address_space = as,
2094 .offset_within_region = fr->offset_in_region,
2095 .size = fr->addr.size,
2096 .offset_within_address_space = int128_get64(fr->addr.start),
2097 .readonly = fr->readonly,
2098 };
2099 if (fr->dirty_log_mask && listener->log_start) {
2100 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2101 }
2102 if (listener->region_add) {
2103 listener->region_add(listener, &section);
2104 }
2105 }
2106 if (listener->commit) {
2107 listener->commit(listener);
2108 }
2109 flatview_unref(view);
2110 }
2111
2112 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2113 {
2114 MemoryListener *other = NULL;
2115 AddressSpace *as;
2116
2117 listener->address_space_filter = filter;
2118 if (QTAILQ_EMPTY(&memory_listeners)
2119 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2120 memory_listeners)->priority) {
2121 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2122 } else {
2123 QTAILQ_FOREACH(other, &memory_listeners, link) {
2124 if (listener->priority < other->priority) {
2125 break;
2126 }
2127 }
2128 QTAILQ_INSERT_BEFORE(other, listener, link);
2129 }
2130
2131 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2132 listener_add_address_space(listener, as);
2133 }
2134 }
2135
2136 void memory_listener_unregister(MemoryListener *listener)
2137 {
2138 QTAILQ_REMOVE(&memory_listeners, listener, link);
2139 }
2140
2141 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2142 {
2143 memory_region_ref(root);
2144 memory_region_transaction_begin();
2145 as->root = root;
2146 as->current_map = g_new(FlatView, 1);
2147 flatview_init(as->current_map);
2148 as->ioeventfd_nb = 0;
2149 as->ioeventfds = NULL;
2150 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2151 as->name = g_strdup(name ? name : "anonymous");
2152 address_space_init_dispatch(as);
2153 memory_region_update_pending |= root->enabled;
2154 memory_region_transaction_commit();
2155 }
2156
2157 static void do_address_space_destroy(AddressSpace *as)
2158 {
2159 MemoryListener *listener;
2160
2161 address_space_destroy_dispatch(as);
2162
2163 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2164 assert(listener->address_space_filter != as);
2165 }
2166
2167 flatview_unref(as->current_map);
2168 g_free(as->name);
2169 g_free(as->ioeventfds);
2170 memory_region_unref(as->root);
2171 }
2172
2173 void address_space_destroy(AddressSpace *as)
2174 {
2175 MemoryRegion *root = as->root;
2176
2177 /* Flush out anything from MemoryListeners listening in on this */
2178 memory_region_transaction_begin();
2179 as->root = NULL;
2180 memory_region_transaction_commit();
2181 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2182 address_space_unregister(as);
2183
2184 /* At this point, as->dispatch and as->current_map are dummy
2185 * entries that the guest should never use. Wait for the old
2186 * values to expire before freeing the data.
2187 */
2188 as->root = root;
2189 call_rcu(as, do_address_space_destroy, rcu);
2190 }
2191
2192 typedef struct MemoryRegionList MemoryRegionList;
2193
2194 struct MemoryRegionList {
2195 const MemoryRegion *mr;
2196 QTAILQ_ENTRY(MemoryRegionList) queue;
2197 };
2198
2199 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2200
2201 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2202 const MemoryRegion *mr, unsigned int level,
2203 hwaddr base,
2204 MemoryRegionListHead *alias_print_queue)
2205 {
2206 MemoryRegionList *new_ml, *ml, *next_ml;
2207 MemoryRegionListHead submr_print_queue;
2208 const MemoryRegion *submr;
2209 unsigned int i;
2210
2211 if (!mr) {
2212 return;
2213 }
2214
2215 for (i = 0; i < level; i++) {
2216 mon_printf(f, " ");
2217 }
2218
2219 if (mr->alias) {
2220 MemoryRegionList *ml;
2221 bool found = false;
2222
2223 /* check if the alias is already in the queue */
2224 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2225 if (ml->mr == mr->alias) {
2226 found = true;
2227 }
2228 }
2229
2230 if (!found) {
2231 ml = g_new(MemoryRegionList, 1);
2232 ml->mr = mr->alias;
2233 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2234 }
2235 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2236 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2237 "-" TARGET_FMT_plx "%s\n",
2238 base + mr->addr,
2239 base + mr->addr
2240 + (int128_nz(mr->size) ?
2241 (hwaddr)int128_get64(int128_sub(mr->size,
2242 int128_one())) : 0),
2243 mr->priority,
2244 mr->romd_mode ? 'R' : '-',
2245 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2246 : '-',
2247 memory_region_name(mr),
2248 memory_region_name(mr->alias),
2249 mr->alias_offset,
2250 mr->alias_offset
2251 + (int128_nz(mr->size) ?
2252 (hwaddr)int128_get64(int128_sub(mr->size,
2253 int128_one())) : 0),
2254 mr->enabled ? "" : " [disabled]");
2255 } else {
2256 mon_printf(f,
2257 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2258 base + mr->addr,
2259 base + mr->addr
2260 + (int128_nz(mr->size) ?
2261 (hwaddr)int128_get64(int128_sub(mr->size,
2262 int128_one())) : 0),
2263 mr->priority,
2264 mr->romd_mode ? 'R' : '-',
2265 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2266 : '-',
2267 memory_region_name(mr),
2268 mr->enabled ? "" : " [disabled]");
2269 }
2270
2271 QTAILQ_INIT(&submr_print_queue);
2272
2273 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2274 new_ml = g_new(MemoryRegionList, 1);
2275 new_ml->mr = submr;
2276 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2277 if (new_ml->mr->addr < ml->mr->addr ||
2278 (new_ml->mr->addr == ml->mr->addr &&
2279 new_ml->mr->priority > ml->mr->priority)) {
2280 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2281 new_ml = NULL;
2282 break;
2283 }
2284 }
2285 if (new_ml) {
2286 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2287 }
2288 }
2289
2290 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2291 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2292 alias_print_queue);
2293 }
2294
2295 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2296 g_free(ml);
2297 }
2298 }
2299
2300 void mtree_info(fprintf_function mon_printf, void *f)
2301 {
2302 MemoryRegionListHead ml_head;
2303 MemoryRegionList *ml, *ml2;
2304 AddressSpace *as;
2305
2306 QTAILQ_INIT(&ml_head);
2307
2308 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2309 mon_printf(f, "address-space: %s\n", as->name);
2310 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2311 mon_printf(f, "\n");
2312 }
2313
2314 /* print aliased regions */
2315 QTAILQ_FOREACH(ml, &ml_head, queue) {
2316 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2317 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2318 mon_printf(f, "\n");
2319 }
2320
2321 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2322 g_free(ml);
2323 }
2324 }
2325
2326 static const TypeInfo memory_region_info = {
2327 .parent = TYPE_OBJECT,
2328 .name = TYPE_MEMORY_REGION,
2329 .instance_size = sizeof(MemoryRegion),
2330 .instance_init = memory_region_initfn,
2331 .instance_finalize = memory_region_finalize,
2332 };
2333
2334 static void memory_register_types(void)
2335 {
2336 type_register_static(&memory_region_info);
2337 }
2338
2339 type_init(memory_register_types)
AR7 emulation for QEMU