2 * OpenRISC int helper routines
4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
5 * Feng Gao <gf91597@gmail.com>
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "exception.h"
24 #include "qemu/host-utils.h"
26 target_ulong
HELPER(ff1
)(target_ulong x
)
28 /*#ifdef TARGET_OPENRISC64
29 return x ? ctz64(x) + 1 : 0;
31 return x
? ctz32(x
) + 1 : 0;
35 target_ulong
HELPER(fl1
)(target_ulong x
)
37 /* not used yet, open it when we need or64. */
38 /*#ifdef TARGET_OPENRISC64
45 uint32_t HELPER(mul32
)(CPUOpenRISCState
*env
,
46 uint32_t ra
, uint32_t rb
)
51 OpenRISCCPU
*cpu
= OPENRISC_CPU(ENV_GET_CPU(env
));
53 result
= (uint64_t)ra
* rb
;
54 /* regisiers in or32 is 32bit, so 32 is NOT a magic number.
55 or64 is not handled in this function, and not implement yet,
56 TARGET_LONG_BITS for or64 is 64, it will break this function,
57 so, we didn't use TARGET_LONG_BITS here. */
59 cy
= result
>> (32 - 1);
61 if ((cy
& 0x1) == 0x0) {
67 if ((cy
& 0x1) == 0x1) {
68 if (high
== 0xffffffff) {
73 cpu
->env
.sr
|= (SR_OV
| SR_CY
);
74 if (cpu
->env
.sr
& SR_OVE
) {
75 raise_exception(cpu
, EXCP_RANGE
);