tests/boot_linux_console: add a test for s390x + s390-ccw-virtio
[qemu/ar7.git] / hw / pci-host / grackle.c
blob5a151e93e953ba51b50721882d3841cfd121894d
1 /*
2 * QEMU Grackle PCI host (heathrow OldWorld PowerMac)
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #include "qemu/osdep.h"
27 #include "hw/pci/pci_host.h"
28 #include "hw/ppc/mac.h"
29 #include "hw/pci/pci.h"
30 #include "hw/intc/heathrow_pic.h"
31 #include "qapi/error.h"
32 #include "trace.h"
34 #define GRACKLE_PCI_HOST_BRIDGE(obj) \
35 OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)
37 typedef struct GrackleState {
38 PCIHostState parent_obj;
40 uint32_t ofw_addr;
41 HeathrowState *pic;
42 qemu_irq irqs[4];
43 MemoryRegion pci_mmio;
44 MemoryRegion pci_hole;
45 MemoryRegion pci_io;
46 } GrackleState;
48 /* Don't know if this matches real hardware, but it agrees with OHW. */
49 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
51 return (irq_num + (pci_dev->devfn >> 3)) & 3;
54 static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
56 GrackleState *s = opaque;
58 trace_grackle_set_irq(irq_num, level);
59 qemu_set_irq(s->irqs[irq_num], level);
62 static void grackle_init_irqs(GrackleState *s)
64 int i;
66 for (i = 0; i < ARRAY_SIZE(s->irqs); i++) {
67 s->irqs[i] = qdev_get_gpio_in(DEVICE(s->pic), 0x15 + i);
71 static void grackle_realize(DeviceState *dev, Error **errp)
73 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
74 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
76 phb->bus = pci_register_root_bus(dev, NULL,
77 pci_grackle_set_irq,
78 pci_grackle_map_irq,
80 &s->pci_mmio,
81 &s->pci_io,
82 0, 4, TYPE_PCI_BUS);
84 pci_create_simple(phb->bus, 0, "grackle");
85 grackle_init_irqs(s);
88 static void grackle_init(Object *obj)
90 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(obj);
91 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
92 PCIHostState *phb = PCI_HOST_BRIDGE(obj);
94 memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL);
95 memory_region_init_io(&s->pci_io, OBJECT(s), &unassigned_io_ops, obj,
96 "pci-isa-mmio", 0x00200000);
98 memory_region_init_alias(&s->pci_hole, OBJECT(s), "pci-hole", &s->pci_mmio,
99 0x80000000ULL, 0x7e000000ULL);
101 memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops,
102 DEVICE(obj), "pci-conf-idx", 0x1000);
103 memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops,
104 DEVICE(obj), "pci-data-idx", 0x1000);
106 object_property_add_link(obj, "pic", TYPE_HEATHROW,
107 (Object **) &s->pic,
108 qdev_prop_allow_set_link_before_realize,
109 0, NULL);
111 sysbus_init_mmio(sbd, &phb->conf_mem);
112 sysbus_init_mmio(sbd, &phb->data_mem);
113 sysbus_init_mmio(sbd, &s->pci_hole);
114 sysbus_init_mmio(sbd, &s->pci_io);
117 static void grackle_pci_realize(PCIDevice *d, Error **errp)
119 d->config[0x09] = 0x01;
122 static void grackle_pci_class_init(ObjectClass *klass, void *data)
124 DeviceClass *dc = DEVICE_CLASS(klass);
125 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
127 k->realize = grackle_pci_realize;
128 k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
129 k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
130 k->revision = 0x00;
131 k->class_id = PCI_CLASS_BRIDGE_HOST;
133 * PCI-facing part of the host bridge, not usable without the
134 * host-facing part, which can't be device_add'ed, yet.
136 dc->user_creatable = false;
139 static const TypeInfo grackle_pci_info = {
140 .name = "grackle",
141 .parent = TYPE_PCI_DEVICE,
142 .instance_size = sizeof(PCIDevice),
143 .class_init = grackle_pci_class_init,
144 .interfaces = (InterfaceInfo[]) {
145 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
146 { },
150 static char *grackle_ofw_unit_address(const SysBusDevice *dev)
152 GrackleState *s = GRACKLE_PCI_HOST_BRIDGE(dev);
154 return g_strdup_printf("%x", s->ofw_addr);
157 static Property grackle_properties[] = {
158 DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1),
159 DEFINE_PROP_END_OF_LIST()
162 static void grackle_class_init(ObjectClass *klass, void *data)
164 DeviceClass *dc = DEVICE_CLASS(klass);
165 SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(klass);
167 dc->realize = grackle_realize;
168 dc->props = grackle_properties;
169 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
170 dc->fw_name = "pci";
171 sbc->explicit_ofw_unit_address = grackle_ofw_unit_address;
174 static const TypeInfo grackle_host_info = {
175 .name = TYPE_GRACKLE_PCI_HOST_BRIDGE,
176 .parent = TYPE_PCI_HOST_BRIDGE,
177 .instance_size = sizeof(GrackleState),
178 .instance_init = grackle_init,
179 .class_init = grackle_class_init,
182 static void grackle_register_types(void)
184 type_register_static(&grackle_pci_info);
185 type_register_static(&grackle_host_info);
188 type_init(grackle_register_types)