hw/i386/xen/xen_platform.c

   1 /*
   2  * XEN platform pci device, formerly known as the event channel device
   3  *
   4  * Copyright (c) 2003-2004 Intel Corp.
   5  * Copyright (c) 2006 XenSource
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "qemu/osdep.h"
  27 #include "qapi/error.h"
  28 #include "hw/hw.h"
  29 #include "hw/i386/pc.h"
  30 #include "hw/ide.h"
  31 #include "hw/pci/pci.h"
  32 #include "hw/irq.h"
  33 #include "hw/xen/xen_common.h"
  34 #include "hw/xen/xen_backend.h"
  35 #include "trace.h"
  36 #include "exec/address-spaces.h"
  37 #include "sysemu/block-backend.h"
  38 #include "qemu/error-report.h"
  39
  40 #include <xenguest.h>
  41
  42 //#define DEBUG_PLATFORM
  43
  44 #ifdef DEBUG_PLATFORM
  45 #define DPRINTF(fmt, ...) do { \
  46     fprintf(stderr, "xen_platform: " fmt, ## __VA_ARGS__); \
  47 } while (0)
  48 #else
  49 #define DPRINTF(fmt, ...) do { } while (0)
  50 #endif
  51
  52 #define PFFLAG_ROM_LOCK 1 /* Sets whether ROM memory area is RW or RO */
  53
  54 typedef struct PCIXenPlatformState {
  55     /*< private >*/
  56     PCIDevice parent_obj;
  57     /*< public >*/
  58
  59     MemoryRegion fixed_io;
  60     MemoryRegion bar;
  61     MemoryRegion mmio_bar;
  62     uint8_t flags; /* used only for version_id == 2 */
  63     int drivers_blacklisted;
  64     uint16_t driver_product_version;
  65
  66     /* Log from guest drivers */
  67     char log_buffer[4096];
  68     int log_buffer_off;
  69 } PCIXenPlatformState;
  70
  71 #define TYPE_XEN_PLATFORM "xen-platform"
  72 #define XEN_PLATFORM(obj) \
  73     OBJECT_CHECK(PCIXenPlatformState, (obj), TYPE_XEN_PLATFORM)
  74
  75 #define XEN_PLATFORM_IOPORT 0x10
  76
  77 /* Send bytes to syslog */
  78 static void log_writeb(PCIXenPlatformState *s, char val)
  79 {
  80     if (val == '\n' || s->log_buffer_off == sizeof(s->log_buffer) - 1) {
  81         /* Flush buffer */
  82         s->log_buffer[s->log_buffer_off] = 0;
  83         trace_xen_platform_log(s->log_buffer);
  84         s->log_buffer_off = 0;
  85     } else {
  86         s->log_buffer[s->log_buffer_off++] = val;
  87     }
  88 }
  89
  90 /* Xen Platform, Fixed IOPort */
  91 #define UNPLUG_ALL_IDE_DISKS 1
  92 #define UNPLUG_ALL_NICS 2
  93 #define UNPLUG_AUX_IDE_DISKS 4
  94
  95 static void unplug_nic(PCIBus *b, PCIDevice *d, void *o)
  96 {
  97     /* We have to ignore passthrough devices */
  98     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
  99             PCI_CLASS_NETWORK_ETHERNET
 100             && strcmp(d->name, "xen-pci-passthrough") != 0) {
 101         object_unparent(OBJECT(d));
 102     }
 103 }
 104
 105 static void pci_unplug_nics(PCIBus *bus)
 106 {
 107     pci_for_each_device(bus, 0, unplug_nic, NULL);
 108 }
 109
 110 static void unplug_disks(PCIBus *b, PCIDevice *d, void *o)
 111 {
 112     /* We have to ignore passthrough devices */
 113     if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
 114             PCI_CLASS_STORAGE_IDE
 115             && strcmp(d->name, "xen-pci-passthrough") != 0) {
 116         pci_piix3_xen_ide_unplug(DEVICE(d));
 117     } else if (pci_get_word(d->config + PCI_CLASS_DEVICE) ==
 118             PCI_CLASS_STORAGE_SCSI
 119             && strcmp(d->name, "xen-pci-passthrough") != 0) {
 120         object_unparent(OBJECT(d));
 121     }
 122 }
 123
 124 static void pci_unplug_disks(PCIBus *bus)
 125 {
 126     pci_for_each_device(bus, 0, unplug_disks, NULL);
 127 }
 128
 129 static void platform_fixed_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
 130 {
 131     PCIXenPlatformState *s = opaque;
 132
 133     switch (addr) {
 134     case 0: {
 135         PCIDevice *pci_dev = PCI_DEVICE(s);
 136         /* Unplug devices.  Value is a bitmask of which devices to
 137            unplug, with bit 0 the IDE devices, bit 1 the network
 138            devices, and bit 2 the non-primary-master IDE devices. */
 139         if (val & UNPLUG_ALL_IDE_DISKS) {
 140             DPRINTF("unplug disks\n");
 141             pci_unplug_disks(pci_dev->bus);
 142         }
 143         if (val & UNPLUG_ALL_NICS) {
 144             DPRINTF("unplug nics\n");
 145             pci_unplug_nics(pci_dev->bus);
 146         }
 147         if (val & UNPLUG_AUX_IDE_DISKS) {
 148             DPRINTF("unplug auxiliary disks not supported\n");
 149         }
 150         break;
 151     }
 152     case 2:
 153         switch (val) {
 154         case 1:
 155             DPRINTF("Citrix Windows PV drivers loaded in guest\n");
 156             break;
 157         case 0:
 158             DPRINTF("Guest claimed to be running PV product 0?\n");
 159             break;
 160         default:
 161             DPRINTF("Unknown PV product %d loaded in guest\n", val);
 162             break;
 163         }
 164         s->driver_product_version = val;
 165         break;
 166     }
 167 }
 168
 169 static void platform_fixed_ioport_writel(void *opaque, uint32_t addr,
 170                                          uint32_t val)
 171 {
 172     switch (addr) {
 173     case 0:
 174         /* PV driver version */
 175         break;
 176     }
 177 }
 178
 179 static void platform_fixed_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
 180 {
 181     PCIXenPlatformState *s = opaque;
 182
 183     switch (addr) {
 184     case 0: /* Platform flags */ {
 185         hvmmem_type_t mem_type = (val & PFFLAG_ROM_LOCK) ?
 186             HVMMEM_ram_ro : HVMMEM_ram_rw;
 187         if (xc_hvm_set_mem_type(xen_xc, xen_domid, mem_type, 0xc0, 0x40)) {
 188             DPRINTF("unable to change ro/rw state of ROM memory area!\n");
 189         } else {
 190             s->flags = val & PFFLAG_ROM_LOCK;
 191             DPRINTF("changed ro/rw state of ROM memory area. now is %s state.\n",
 192                     (mem_type == HVMMEM_ram_ro ? "ro":"rw"));
 193         }
 194         break;
 195     }
 196     case 2:
 197         log_writeb(s, val);
 198         break;
 199     }
 200 }
 201
 202 static uint32_t platform_fixed_ioport_readw(void *opaque, uint32_t addr)
 203 {
 204     PCIXenPlatformState *s = opaque;
 205
 206     switch (addr) {
 207     case 0:
 208         if (s->drivers_blacklisted) {
 209             /* The drivers will recognise this magic number and refuse
 210              * to do anything. */
 211             return 0xd249;
 212         } else {
 213             /* Magic value so that you can identify the interface. */
 214             return 0x49d2;
 215         }
 216     default:
 217         return 0xffff;
 218     }
 219 }
 220
 221 static uint32_t platform_fixed_ioport_readb(void *opaque, uint32_t addr)
 222 {
 223     PCIXenPlatformState *s = opaque;
 224
 225     switch (addr) {
 226     case 0:
 227         /* Platform flags */
 228         return s->flags;
 229     case 2:
 230         /* Version number */
 231         return 1;
 232     default:
 233         return 0xff;
 234     }
 235 }
 236
 237 static void platform_fixed_ioport_reset(void *opaque)
 238 {
 239     PCIXenPlatformState *s = opaque;
 240
 241     platform_fixed_ioport_writeb(s, 0, 0);
 242 }
 243
 244 static uint64_t platform_fixed_ioport_read(void *opaque,
 245                                            hwaddr addr,
 246                                            unsigned size)
 247 {
 248     switch (size) {
 249     case 1:
 250         return platform_fixed_ioport_readb(opaque, addr);
 251     case 2:
 252         return platform_fixed_ioport_readw(opaque, addr);
 253     default:
 254         return -1;
 255     }
 256 }
 257
 258 static void platform_fixed_ioport_write(void *opaque, hwaddr addr,
 259
 260                                         uint64_t val, unsigned size)
 261 {
 262     switch (size) {
 263     case 1:
 264         platform_fixed_ioport_writeb(opaque, addr, val);
 265         break;
 266     case 2:
 267         platform_fixed_ioport_writew(opaque, addr, val);
 268         break;
 269     case 4:
 270         platform_fixed_ioport_writel(opaque, addr, val);
 271         break;
 272     }
 273 }
 274
 275
 276 static const MemoryRegionOps platform_fixed_io_ops = {
 277     .read = platform_fixed_ioport_read,
 278     .write = platform_fixed_ioport_write,
 279     .valid = {
 280         .unaligned = true,
 281     },
 282     .impl = {
 283         .min_access_size = 1,
 284         .max_access_size = 4,
 285         .unaligned = true,
 286     },
 287     .endianness = DEVICE_LITTLE_ENDIAN,
 288 };
 289
 290 static void platform_fixed_ioport_init(PCIXenPlatformState* s)
 291 {
 292     memory_region_init_io(&s->fixed_io, OBJECT(s), &platform_fixed_io_ops, s,
 293                           "xen-fixed", 16);
 294     memory_region_add_subregion(get_system_io(), XEN_PLATFORM_IOPORT,
 295                                 &s->fixed_io);
 296 }
 297
 298 /* Xen Platform PCI Device */
 299
 300 static uint64_t xen_platform_ioport_readb(void *opaque, hwaddr addr,
 301                                           unsigned int size)
 302 {
 303     if (addr == 0) {
 304         return platform_fixed_ioport_readb(opaque, 0);
 305     } else {
 306         return ~0u;
 307     }
 308 }
 309
 310 static void xen_platform_ioport_writeb(void *opaque, hwaddr addr,
 311                                        uint64_t val, unsigned int size)
 312 {
 313     PCIXenPlatformState *s = opaque;
 314
 315     switch (addr) {
 316     case 0: /* Platform flags */
 317         platform_fixed_ioport_writeb(opaque, 0, (uint32_t)val);
 318         break;
 319     case 8:
 320         log_writeb(s, (uint32_t)val);
 321         break;
 322     default:
 323         break;
 324     }
 325 }
 326
 327 static const MemoryRegionOps xen_pci_io_ops = {
 328     .read  = xen_platform_ioport_readb,
 329     .write = xen_platform_ioport_writeb,
 330     .impl.min_access_size = 1,
 331     .impl.max_access_size = 1,
 332 };
 333
 334 static void platform_ioport_bar_setup(PCIXenPlatformState *d)
 335 {
 336     memory_region_init_io(&d->bar, OBJECT(d), &xen_pci_io_ops, d,
 337                           "xen-pci", 0x100);
 338 }
 339
 340 static uint64_t platform_mmio_read(void *opaque, hwaddr addr,
 341                                    unsigned size)
 342 {
 343     DPRINTF("Warning: attempted read from physical address "
 344             "0x" TARGET_FMT_plx " in xen platform mmio space\n", addr);
 345
 346     return 0;
 347 }
 348
 349 static void platform_mmio_write(void *opaque, hwaddr addr,
 350                                 uint64_t val, unsigned size)
 351 {
 352     DPRINTF("Warning: attempted write of 0x%"PRIx64" to physical "
 353             "address 0x" TARGET_FMT_plx " in xen platform mmio space\n",
 354             val, addr);
 355 }
 356
 357 static const MemoryRegionOps platform_mmio_handler = {
 358     .read = &platform_mmio_read,
 359     .write = &platform_mmio_write,
 360     .endianness = DEVICE_NATIVE_ENDIAN,
 361 };
 362
 363 static void platform_mmio_setup(PCIXenPlatformState *d)
 364 {
 365     memory_region_init_io(&d->mmio_bar, OBJECT(d), &platform_mmio_handler, d,
 366                           "xen-mmio", 0x1000000);
 367 }
 368
 369 static int xen_platform_post_load(void *opaque, int version_id)
 370 {
 371     PCIXenPlatformState *s = opaque;
 372
 373     platform_fixed_ioport_writeb(s, 0, s->flags);
 374
 375     return 0;
 376 }
 377
 378 static const VMStateDescription vmstate_xen_platform = {
 379     .name = "platform",
 380     .version_id = 4,
 381     .minimum_version_id = 4,
 382     .post_load = xen_platform_post_load,
 383     .fields = (VMStateField[]) {
 384         VMSTATE_PCI_DEVICE(parent_obj, PCIXenPlatformState),
 385         VMSTATE_UINT8(flags, PCIXenPlatformState),
 386         VMSTATE_END_OF_LIST()
 387     }
 388 };
 389
 390 static void xen_platform_realize(PCIDevice *dev, Error **errp)
 391 {
 392     PCIXenPlatformState *d = XEN_PLATFORM(dev);
 393     uint8_t *pci_conf;
 394
 395     /* Device will crash on reset if xen is not initialized */
 396     if (!xen_enabled()) {
 397         error_setg(errp, "xen-platform device requires the Xen accelerator");
 398         return;
 399     }
 400
 401     pci_conf = dev->config;
 402
 403     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
 404
 405     pci_config_set_prog_interface(pci_conf, 0);
 406
 407     pci_conf[PCI_INTERRUPT_PIN] = 1;
 408
 409     platform_ioport_bar_setup(d);
 410     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->bar);
 411
 412     /* reserve 16MB mmio address for share memory*/
 413     platform_mmio_setup(d);
 414     pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,
 415                      &d->mmio_bar);
 416
 417     platform_fixed_ioport_init(d);
 418 }
 419
 420 static void platform_reset(DeviceState *dev)
 421 {
 422     PCIXenPlatformState *s = XEN_PLATFORM(dev);
 423
 424     platform_fixed_ioport_reset(s);
 425 }
 426
 427 static void xen_platform_class_init(ObjectClass *klass, void *data)
 428 {
 429     DeviceClass *dc = DEVICE_CLASS(klass);
 430     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 431
 432     k->realize = xen_platform_realize;
 433     k->vendor_id = PCI_VENDOR_ID_XEN;
 434     k->device_id = PCI_DEVICE_ID_XEN_PLATFORM;
 435     k->class_id = PCI_CLASS_OTHERS << 8 | 0x80;
 436     k->subsystem_vendor_id = PCI_VENDOR_ID_XEN;
 437     k->subsystem_id = PCI_DEVICE_ID_XEN_PLATFORM;
 438     k->revision = 1;
 439     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 440     dc->desc = "XEN platform pci device";
 441     dc->reset = platform_reset;
 442     dc->vmsd = &vmstate_xen_platform;
 443 }
 444
 445 static const TypeInfo xen_platform_info = {
 446     .name          = TYPE_XEN_PLATFORM,
 447     .parent        = TYPE_PCI_DEVICE,
 448     .instance_size = sizeof(PCIXenPlatformState),
 449     .class_init    = xen_platform_class_init,
 450 };
 451
 452 static void xen_platform_register_types(void)
 453 {
 454     type_register_static(&xen_platform_info);
 455 }
 456
 457 type_init(xen_platform_register_types)