1 /* opcodes/i386-dis.c r1.126 */
2 /* Print i386 instructions for GDB, the GNU debugger.
3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
21 /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
27 /* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
35 #include "disas/bfd.h"
36 /* include/opcode/i386.h r1.78 */
38 /* opcode/i386.h -- Intel 80386 opcode macros
39 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
40 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
41 Free Software Foundation, Inc.
43 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the GNU General Public License as published by
47 the Free Software Foundation; either version 2 of the License, or
48 (at your option) any later version.
50 This program is distributed in the hope that it will be useful,
51 but WITHOUT ANY WARRANTY; without even the implied warranty of
52 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 GNU General Public License for more details.
55 You should have received a copy of the GNU General Public License
56 along with this program; if not, see <http://www.gnu.org/licenses/>. */
58 /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
59 ix86 Unix assemblers, generate floating point instructions with
60 reversed source and destination registers in certain cases.
61 Unfortunately, gcc and possibly many other programs use this
62 reversed syntax, so we're stuck with it.
64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
66 the expected st(3) = st(3) - st
68 This happens with all the non-commutative arithmetic floating point
69 operations with two register operands, where the source register is
70 %st, and destination register is %st(i).
72 The affected opcode map is dceX, dcfX, deeX, defX. */
74 #ifndef SYSV386_COMPAT
75 /* Set non-zero for broken, compatible instructions. Set to zero for
76 non-broken opcodes at your peril. gcc generates SystemV/386
77 compatible instructions. */
78 #define SYSV386_COMPAT 1
81 /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
82 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
84 #define OLDGCC_COMPAT SYSV386_COMPAT
87 #define MOV_AX_DISP32 0xa0
88 #define POP_SEG_SHORT 0x07
89 #define JUMP_PC_RELATIVE 0xeb
90 #define INT_OPCODE 0xcd
91 #define INT3_OPCODE 0xcc
92 /* The opcode for the fwait instruction, which disassembler treats as a
93 prefix when it can. */
94 #define FWAIT_OPCODE 0x9b
95 #define ADDR_PREFIX_OPCODE 0x67
96 #define DATA_PREFIX_OPCODE 0x66
97 #define LOCK_PREFIX_OPCODE 0xf0
98 #define CS_PREFIX_OPCODE 0x2e
99 #define DS_PREFIX_OPCODE 0x3e
100 #define ES_PREFIX_OPCODE 0x26
101 #define FS_PREFIX_OPCODE 0x64
102 #define GS_PREFIX_OPCODE 0x65
103 #define SS_PREFIX_OPCODE 0x36
104 #define REPNE_PREFIX_OPCODE 0xf2
105 #define REPE_PREFIX_OPCODE 0xf3
107 #define TWO_BYTE_OPCODE_ESCAPE 0x0f
108 #define NOP_OPCODE (char) 0x90
110 /* register numbers */
111 #define EBP_REG_NUM 5
112 #define ESP_REG_NUM 4
114 /* modrm_byte.regmem for twobyte escape */
115 #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
116 /* index_base_byte.index for no index register addressing */
117 #define NO_INDEX_REGISTER ESP_REG_NUM
118 /* index_base_byte.base for no base register addressing */
119 #define NO_BASE_REGISTER EBP_REG_NUM
120 #define NO_BASE_REGISTER_16 6
122 /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
123 #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
124 #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
126 /* x86-64 extension prefix. */
127 #define REX_OPCODE 0x40
129 /* Indicates 64 bit operand size. */
131 /* High extension to reg field of modrm byte. */
133 /* High extension to SIB index field. */
135 /* High extension to base field of modrm or SIB, or reg field of opcode. */
138 /* max operands per insn */
139 #define MAX_OPERANDS 4
141 /* max immediates per insn (lcall, ljmp, insertq, extrq) */
142 #define MAX_IMMEDIATE_OPERANDS 2
144 /* max memory refs per insn (string ops) */
145 #define MAX_MEMORY_OPERANDS 2
147 /* max size of insn mnemonics. */
148 #define MAX_MNEM_SIZE 16
150 /* max size of register name in insn mnemonics. */
151 #define MAX_REG_NAME_SIZE 8
153 /* opcodes/i386-dis.c r1.126 */
154 #include "qemu-common.h"
158 static int fetch_data2(struct disassemble_info
*, bfd_byte
*);
159 static int fetch_data(struct disassemble_info
*, bfd_byte
*);
160 static void ckprefix (void);
161 static const char *prefix_name (int, int);
162 static int print_insn (bfd_vma
, disassemble_info
*);
163 static void dofloat (int);
164 static void OP_ST (int, int);
165 static void OP_STi (int, int);
166 static int putop (const char *, int);
167 static void oappend (const char *);
168 static void append_seg (void);
169 static void OP_indirE (int, int);
170 static void print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
);
171 static void print_displacement (char *, bfd_vma
);
172 static void OP_E (int, int);
173 static void OP_G (int, int);
174 static bfd_vma
get64 (void);
175 static bfd_signed_vma
get32 (void);
176 static bfd_signed_vma
get32s (void);
177 static int get16 (void);
178 static void set_op (bfd_vma
, int);
179 static void OP_REG (int, int);
180 static void OP_IMREG (int, int);
181 static void OP_I (int, int);
182 static void OP_I64 (int, int);
183 static void OP_sI (int, int);
184 static void OP_J (int, int);
185 static void OP_SEG (int, int);
186 static void OP_DIR (int, int);
187 static void OP_OFF (int, int);
188 static void OP_OFF64 (int, int);
189 static void ptr_reg (int, int);
190 static void OP_ESreg (int, int);
191 static void OP_DSreg (int, int);
192 static void OP_C (int, int);
193 static void OP_D (int, int);
194 static void OP_T (int, int);
195 static void OP_R (int, int);
196 static void OP_MMX (int, int);
197 static void OP_XMM (int, int);
198 static void OP_EM (int, int);
199 static void OP_EX (int, int);
200 static void OP_EMC (int,int);
201 static void OP_MXC (int,int);
202 static void OP_MS (int, int);
203 static void OP_XS (int, int);
204 static void OP_M (int, int);
205 static void OP_VMX (int, int);
206 static void OP_0fae (int, int);
207 static void OP_0f07 (int, int);
208 static void NOP_Fixup1 (int, int);
209 static void NOP_Fixup2 (int, int);
210 static void OP_3DNowSuffix (int, int);
211 static void OP_SIMD_Suffix (int, int);
212 static void SIMD_Fixup (int, int);
213 static void PNI_Fixup (int, int);
214 static void SVME_Fixup (int, int);
215 static void INVLPG_Fixup (int, int);
216 static void BadOp (void);
217 static void VMX_Fixup (int, int);
218 static void REP_Fixup (int, int);
219 static void CMPXCHG8B_Fixup (int, int);
220 static void XMM_Fixup (int, int);
221 static void CRC32_Fixup (int, int);
224 /* Points to first byte not fetched. */
225 bfd_byte
*max_fetched
;
226 bfd_byte the_buffer
[MAX_MNEM_SIZE
];
239 static enum address_mode address_mode
;
241 /* Flags for the prefixes for the current instruction. See below. */
244 /* REX prefix the current instruction. See below. */
246 /* Bits of REX we've already used. */
248 /* Mark parts used in the REX prefix. When we are testing for
249 empty prefix (for 8bit register REX extension), just mask it
250 out. Otherwise test for REX bit is excuse for existence of REX
251 only in case value is nonzero. */
252 #define USED_REX(value) \
257 rex_used |= (value) | REX_OPCODE; \
260 rex_used |= REX_OPCODE; \
263 /* Flags for prefixes which we somehow handled when printing the
264 current instruction. */
265 static int used_prefixes
;
267 /* Flags stored in PREFIXES. */
268 #define PREFIX_REPZ 1
269 #define PREFIX_REPNZ 2
270 #define PREFIX_LOCK 4
272 #define PREFIX_SS 0x10
273 #define PREFIX_DS 0x20
274 #define PREFIX_ES 0x40
275 #define PREFIX_FS 0x80
276 #define PREFIX_GS 0x100
277 #define PREFIX_DATA 0x200
278 #define PREFIX_ADDR 0x400
279 #define PREFIX_FWAIT 0x800
281 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
282 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
285 fetch_data2(struct disassemble_info
*info
, bfd_byte
*addr
)
288 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
289 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
291 if (addr
<= priv
->the_buffer
+ MAX_MNEM_SIZE
)
292 status
= (*info
->read_memory_func
) (start
,
294 addr
- priv
->max_fetched
,
300 /* If we did manage to read at least one byte, then
301 print_insn_i386 will do something sensible. Otherwise, print
302 an error. We do that here because this is where we know
304 if (priv
->max_fetched
== priv
->the_buffer
)
305 (*info
->memory_error_func
) (status
, start
, info
);
306 longjmp (priv
->bailout
, 1);
309 priv
->max_fetched
= addr
;
314 fetch_data(struct disassemble_info
*info
, bfd_byte
*addr
)
316 if (addr
<= ((struct dis_private
*) (info
->private_data
))->max_fetched
) {
319 return fetch_data2(info
, addr
);
324 #define XX { NULL, 0 }
326 #define Eb { OP_E, b_mode }
327 #define Ev { OP_E, v_mode }
328 #define Ed { OP_E, d_mode }
329 #define Edq { OP_E, dq_mode }
330 #define Edqw { OP_E, dqw_mode }
331 #define Edqb { OP_E, dqb_mode }
332 #define Edqd { OP_E, dqd_mode }
333 #define indirEv { OP_indirE, stack_v_mode }
334 #define indirEp { OP_indirE, f_mode }
335 #define stackEv { OP_E, stack_v_mode }
336 #define Em { OP_E, m_mode }
337 #define Ew { OP_E, w_mode }
338 #define M { OP_M, 0 } /* lea, lgdt, etc. */
339 #define Ma { OP_M, v_mode }
340 #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
341 #define Mq { OP_M, q_mode }
342 #define Gb { OP_G, b_mode }
343 #define Gv { OP_G, v_mode }
344 #define Gd { OP_G, d_mode }
345 #define Gdq { OP_G, dq_mode }
346 #define Gm { OP_G, m_mode }
347 #define Gw { OP_G, w_mode }
348 #define Rd { OP_R, d_mode }
349 #define Rm { OP_R, m_mode }
350 #define Ib { OP_I, b_mode }
351 #define sIb { OP_sI, b_mode } /* sign extened byte */
352 #define Iv { OP_I, v_mode }
353 #define Iq { OP_I, q_mode }
354 #define Iv64 { OP_I64, v_mode }
355 #define Iw { OP_I, w_mode }
356 #define I1 { OP_I, const_1_mode }
357 #define Jb { OP_J, b_mode }
358 #define Jv { OP_J, v_mode }
359 #define Cm { OP_C, m_mode }
360 #define Dm { OP_D, m_mode }
361 #define Td { OP_T, d_mode }
363 #define RMeAX { OP_REG, eAX_reg }
364 #define RMeBX { OP_REG, eBX_reg }
365 #define RMeCX { OP_REG, eCX_reg }
366 #define RMeDX { OP_REG, eDX_reg }
367 #define RMeSP { OP_REG, eSP_reg }
368 #define RMeBP { OP_REG, eBP_reg }
369 #define RMeSI { OP_REG, eSI_reg }
370 #define RMeDI { OP_REG, eDI_reg }
371 #define RMrAX { OP_REG, rAX_reg }
372 #define RMrBX { OP_REG, rBX_reg }
373 #define RMrCX { OP_REG, rCX_reg }
374 #define RMrDX { OP_REG, rDX_reg }
375 #define RMrSP { OP_REG, rSP_reg }
376 #define RMrBP { OP_REG, rBP_reg }
377 #define RMrSI { OP_REG, rSI_reg }
378 #define RMrDI { OP_REG, rDI_reg }
379 #define RMAL { OP_REG, al_reg }
380 #define RMAL { OP_REG, al_reg }
381 #define RMCL { OP_REG, cl_reg }
382 #define RMDL { OP_REG, dl_reg }
383 #define RMBL { OP_REG, bl_reg }
384 #define RMAH { OP_REG, ah_reg }
385 #define RMCH { OP_REG, ch_reg }
386 #define RMDH { OP_REG, dh_reg }
387 #define RMBH { OP_REG, bh_reg }
388 #define RMAX { OP_REG, ax_reg }
389 #define RMDX { OP_REG, dx_reg }
391 #define eAX { OP_IMREG, eAX_reg }
392 #define eBX { OP_IMREG, eBX_reg }
393 #define eCX { OP_IMREG, eCX_reg }
394 #define eDX { OP_IMREG, eDX_reg }
395 #define eSP { OP_IMREG, eSP_reg }
396 #define eBP { OP_IMREG, eBP_reg }
397 #define eSI { OP_IMREG, eSI_reg }
398 #define eDI { OP_IMREG, eDI_reg }
399 #define AL { OP_IMREG, al_reg }
400 #define CL { OP_IMREG, cl_reg }
401 #define DL { OP_IMREG, dl_reg }
402 #define BL { OP_IMREG, bl_reg }
403 #define AH { OP_IMREG, ah_reg }
404 #define CH { OP_IMREG, ch_reg }
405 #define DH { OP_IMREG, dh_reg }
406 #define BH { OP_IMREG, bh_reg }
407 #define AX { OP_IMREG, ax_reg }
408 #define DX { OP_IMREG, dx_reg }
409 #define zAX { OP_IMREG, z_mode_ax_reg }
410 #define indirDX { OP_IMREG, indir_dx_reg }
412 #define Sw { OP_SEG, w_mode }
413 #define Sv { OP_SEG, v_mode }
414 #define Ap { OP_DIR, 0 }
415 #define Ob { OP_OFF64, b_mode }
416 #define Ov { OP_OFF64, v_mode }
417 #define Xb { OP_DSreg, eSI_reg }
418 #define Xv { OP_DSreg, eSI_reg }
419 #define Xz { OP_DSreg, eSI_reg }
420 #define Yb { OP_ESreg, eDI_reg }
421 #define Yv { OP_ESreg, eDI_reg }
422 #define DSBX { OP_DSreg, eBX_reg }
424 #define es { OP_REG, es_reg }
425 #define ss { OP_REG, ss_reg }
426 #define cs { OP_REG, cs_reg }
427 #define ds { OP_REG, ds_reg }
428 #define fs { OP_REG, fs_reg }
429 #define gs { OP_REG, gs_reg }
431 #define MX { OP_MMX, 0 }
432 #define XM { OP_XMM, 0 }
433 #define EM { OP_EM, v_mode }
434 #define EMd { OP_EM, d_mode }
435 #define EMq { OP_EM, q_mode }
436 #define EXd { OP_EX, d_mode }
437 #define EXq { OP_EX, q_mode }
438 #define EXx { OP_EX, x_mode }
439 #define MS { OP_MS, v_mode }
440 #define XS { OP_XS, v_mode }
441 #define EMC { OP_EMC, v_mode }
442 #define MXC { OP_MXC, 0 }
443 #define VM { OP_VMX, q_mode }
444 #define OPSUF { OP_3DNowSuffix, 0 }
445 #define OPSIMD { OP_SIMD_Suffix, 0 }
446 #define XMM0 { XMM_Fixup, 0 }
448 /* Used handle "rep" prefix for string instructions. */
449 #define Xbr { REP_Fixup, eSI_reg }
450 #define Xvr { REP_Fixup, eSI_reg }
451 #define Ybr { REP_Fixup, eDI_reg }
452 #define Yvr { REP_Fixup, eDI_reg }
453 #define Yzr { REP_Fixup, eDI_reg }
454 #define indirDXr { REP_Fixup, indir_dx_reg }
455 #define ALr { REP_Fixup, al_reg }
456 #define eAXr { REP_Fixup, eAX_reg }
458 #define cond_jump_flag { NULL, cond_jump_mode }
459 #define loop_jcxz_flag { NULL, loop_jcxz_mode }
461 /* bits in sizeflag */
462 #define SUFFIX_ALWAYS 4
466 #define b_mode 1 /* byte operand */
467 #define v_mode 2 /* operand size depends on prefixes */
468 #define w_mode 3 /* word operand */
469 #define d_mode 4 /* double word operand */
470 #define q_mode 5 /* quad word operand */
471 #define t_mode 6 /* ten-byte operand */
472 #define x_mode 7 /* 16-byte XMM operand */
473 #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
474 #define cond_jump_mode 9
475 #define loop_jcxz_mode 10
476 #define dq_mode 11 /* operand size depends on REX prefixes. */
477 #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
478 #define f_mode 13 /* 4- or 6-byte pointer operand */
479 #define const_1_mode 14
480 #define stack_v_mode 15 /* v_mode for stack-related opcodes. */
481 #define z_mode 16 /* non-quad operand size depends on prefixes */
482 #define o_mode 17 /* 16-byte operand */
483 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
484 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
529 #define z_mode_ax_reg 149
530 #define indir_dx_reg 150
534 #define USE_PREFIX_USER_TABLE 3
535 #define X86_64_SPECIAL 4
536 #define IS_3BYTE_OPCODE 5
538 #define FLOAT NULL, { { NULL, FLOATCODE } }
540 #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
541 #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
542 #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
543 #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
544 #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
545 #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
546 #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
547 #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
548 #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
549 #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
550 #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
551 #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
552 #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
553 #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
554 #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
555 #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
556 #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
557 #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
558 #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
559 #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
560 #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
561 #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
562 #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
563 #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
564 #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
565 #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
566 #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
567 #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
569 #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
570 #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
571 #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
572 #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
573 #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
574 #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
575 #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
576 #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
577 #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
578 #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
579 #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
580 #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
581 #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
582 #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
583 #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
584 #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
585 #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
586 #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
587 #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
588 #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
589 #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
590 #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
591 #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
592 #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
593 #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
594 #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
595 #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
596 #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
597 #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
598 #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
599 #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
600 #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
601 #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
602 #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
603 #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
604 #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
605 #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
606 #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
607 #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
608 #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
609 #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
610 #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
611 #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
612 #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
613 #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
614 #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
615 #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
616 #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
617 #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
618 #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
619 #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
620 #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
621 #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
622 #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
623 #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
624 #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
625 #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
626 #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
627 #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
628 #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
629 #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
630 #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
631 #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
632 #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
633 #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
634 #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
635 #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
636 #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
637 #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
638 #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
639 #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
640 #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
641 #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
642 #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
643 #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
644 #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
645 #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
646 #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
647 #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
648 #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
649 #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
650 #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
651 #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
652 #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
653 #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
654 #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
655 #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
656 #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
657 #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
658 #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
659 #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
660 #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
661 #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
662 #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
663 #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
664 #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
665 #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
666 #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
669 #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
670 #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
671 #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
672 #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
674 #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
675 #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
677 typedef void (*op_rtn
) (int bytemode
, int sizeflag
);
688 /* Upper case letters in the instruction names here are macros.
689 'A' => print 'b' if no register operands or suffix_always is true
690 'B' => print 'b' if suffix_always is true
691 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
693 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
694 . suffix_always is true
695 'E' => print 'e' if 32-bit form of jcxz
696 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
697 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
698 'H' => print ",pt" or ",pn" branch hint
699 'I' => honor following macro letter even in Intel mode (implemented only
700 . for some of the macro letters)
702 'K' => print 'd' or 'q' if rex prefix is present.
703 'L' => print 'l' if suffix_always is true
704 'N' => print 'n' if instruction has no wait "prefix"
705 'O' => print 'd' or 'o' (or 'q' in Intel mode)
706 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
707 . or suffix_always is true. print 'q' if rex prefix is present.
708 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
710 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
711 'S' => print 'w', 'l' or 'q' if suffix_always is true
712 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
713 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
714 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
715 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
716 'X' => print 's', 'd' depending on data16 prefix (for XMM)
717 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
718 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
720 Many of the above letters print nothing in Intel mode. See "putop"
723 Braces '{' and '}', and vertical bars '|', indicate alternative
724 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
725 modes. In cases where there are only two alternatives, the X86_64
726 instruction is reserved, and "(bad)" is printed.
729 static const struct dis386 dis386
[] = {
731 { "addB", { Eb
, Gb
} },
732 { "addS", { Ev
, Gv
} },
733 { "addB", { Gb
, Eb
} },
734 { "addS", { Gv
, Ev
} },
735 { "addB", { AL
, Ib
} },
736 { "addS", { eAX
, Iv
} },
737 { "push{T|}", { es
} },
738 { "pop{T|}", { es
} },
740 { "orB", { Eb
, Gb
} },
741 { "orS", { Ev
, Gv
} },
742 { "orB", { Gb
, Eb
} },
743 { "orS", { Gv
, Ev
} },
744 { "orB", { AL
, Ib
} },
745 { "orS", { eAX
, Iv
} },
746 { "push{T|}", { cs
} },
747 { "(bad)", { XX
} }, /* 0x0f extended opcode escape */
749 { "adcB", { Eb
, Gb
} },
750 { "adcS", { Ev
, Gv
} },
751 { "adcB", { Gb
, Eb
} },
752 { "adcS", { Gv
, Ev
} },
753 { "adcB", { AL
, Ib
} },
754 { "adcS", { eAX
, Iv
} },
755 { "push{T|}", { ss
} },
756 { "pop{T|}", { ss
} },
758 { "sbbB", { Eb
, Gb
} },
759 { "sbbS", { Ev
, Gv
} },
760 { "sbbB", { Gb
, Eb
} },
761 { "sbbS", { Gv
, Ev
} },
762 { "sbbB", { AL
, Ib
} },
763 { "sbbS", { eAX
, Iv
} },
764 { "push{T|}", { ds
} },
765 { "pop{T|}", { ds
} },
767 { "andB", { Eb
, Gb
} },
768 { "andS", { Ev
, Gv
} },
769 { "andB", { Gb
, Eb
} },
770 { "andS", { Gv
, Ev
} },
771 { "andB", { AL
, Ib
} },
772 { "andS", { eAX
, Iv
} },
773 { "(bad)", { XX
} }, /* SEG ES prefix */
774 { "daa{|}", { XX
} },
776 { "subB", { Eb
, Gb
} },
777 { "subS", { Ev
, Gv
} },
778 { "subB", { Gb
, Eb
} },
779 { "subS", { Gv
, Ev
} },
780 { "subB", { AL
, Ib
} },
781 { "subS", { eAX
, Iv
} },
782 { "(bad)", { XX
} }, /* SEG CS prefix */
783 { "das{|}", { XX
} },
785 { "xorB", { Eb
, Gb
} },
786 { "xorS", { Ev
, Gv
} },
787 { "xorB", { Gb
, Eb
} },
788 { "xorS", { Gv
, Ev
} },
789 { "xorB", { AL
, Ib
} },
790 { "xorS", { eAX
, Iv
} },
791 { "(bad)", { XX
} }, /* SEG SS prefix */
792 { "aaa{|}", { XX
} },
794 { "cmpB", { Eb
, Gb
} },
795 { "cmpS", { Ev
, Gv
} },
796 { "cmpB", { Gb
, Eb
} },
797 { "cmpS", { Gv
, Ev
} },
798 { "cmpB", { AL
, Ib
} },
799 { "cmpS", { eAX
, Iv
} },
800 { "(bad)", { XX
} }, /* SEG DS prefix */
801 { "aas{|}", { XX
} },
803 { "inc{S|}", { RMeAX
} },
804 { "inc{S|}", { RMeCX
} },
805 { "inc{S|}", { RMeDX
} },
806 { "inc{S|}", { RMeBX
} },
807 { "inc{S|}", { RMeSP
} },
808 { "inc{S|}", { RMeBP
} },
809 { "inc{S|}", { RMeSI
} },
810 { "inc{S|}", { RMeDI
} },
812 { "dec{S|}", { RMeAX
} },
813 { "dec{S|}", { RMeCX
} },
814 { "dec{S|}", { RMeDX
} },
815 { "dec{S|}", { RMeBX
} },
816 { "dec{S|}", { RMeSP
} },
817 { "dec{S|}", { RMeBP
} },
818 { "dec{S|}", { RMeSI
} },
819 { "dec{S|}", { RMeDI
} },
821 { "pushV", { RMrAX
} },
822 { "pushV", { RMrCX
} },
823 { "pushV", { RMrDX
} },
824 { "pushV", { RMrBX
} },
825 { "pushV", { RMrSP
} },
826 { "pushV", { RMrBP
} },
827 { "pushV", { RMrSI
} },
828 { "pushV", { RMrDI
} },
830 { "popV", { RMrAX
} },
831 { "popV", { RMrCX
} },
832 { "popV", { RMrDX
} },
833 { "popV", { RMrBX
} },
834 { "popV", { RMrSP
} },
835 { "popV", { RMrBP
} },
836 { "popV", { RMrSI
} },
837 { "popV", { RMrDI
} },
843 { "(bad)", { XX
} }, /* seg fs */
844 { "(bad)", { XX
} }, /* seg gs */
845 { "(bad)", { XX
} }, /* op size prefix */
846 { "(bad)", { XX
} }, /* adr size prefix */
849 { "imulS", { Gv
, Ev
, Iv
} },
850 { "pushT", { sIb
} },
851 { "imulS", { Gv
, Ev
, sIb
} },
852 { "ins{b||b|}", { Ybr
, indirDX
} },
853 { "ins{R||G|}", { Yzr
, indirDX
} },
854 { "outs{b||b|}", { indirDXr
, Xb
} },
855 { "outs{R||G|}", { indirDXr
, Xz
} },
857 { "joH", { Jb
, XX
, cond_jump_flag
} },
858 { "jnoH", { Jb
, XX
, cond_jump_flag
} },
859 { "jbH", { Jb
, XX
, cond_jump_flag
} },
860 { "jaeH", { Jb
, XX
, cond_jump_flag
} },
861 { "jeH", { Jb
, XX
, cond_jump_flag
} },
862 { "jneH", { Jb
, XX
, cond_jump_flag
} },
863 { "jbeH", { Jb
, XX
, cond_jump_flag
} },
864 { "jaH", { Jb
, XX
, cond_jump_flag
} },
866 { "jsH", { Jb
, XX
, cond_jump_flag
} },
867 { "jnsH", { Jb
, XX
, cond_jump_flag
} },
868 { "jpH", { Jb
, XX
, cond_jump_flag
} },
869 { "jnpH", { Jb
, XX
, cond_jump_flag
} },
870 { "jlH", { Jb
, XX
, cond_jump_flag
} },
871 { "jgeH", { Jb
, XX
, cond_jump_flag
} },
872 { "jleH", { Jb
, XX
, cond_jump_flag
} },
873 { "jgH", { Jb
, XX
, cond_jump_flag
} },
879 { "testB", { Eb
, Gb
} },
880 { "testS", { Ev
, Gv
} },
881 { "xchgB", { Eb
, Gb
} },
882 { "xchgS", { Ev
, Gv
} },
884 { "movB", { Eb
, Gb
} },
885 { "movS", { Ev
, Gv
} },
886 { "movB", { Gb
, Eb
} },
887 { "movS", { Gv
, Ev
} },
888 { "movD", { Sv
, Sw
} },
889 { "leaS", { Gv
, M
} },
890 { "movD", { Sw
, Sv
} },
894 { "xchgS", { RMeCX
, eAX
} },
895 { "xchgS", { RMeDX
, eAX
} },
896 { "xchgS", { RMeBX
, eAX
} },
897 { "xchgS", { RMeSP
, eAX
} },
898 { "xchgS", { RMeBP
, eAX
} },
899 { "xchgS", { RMeSI
, eAX
} },
900 { "xchgS", { RMeDI
, eAX
} },
902 { "cW{t||t|}R", { XX
} },
903 { "cR{t||t|}O", { XX
} },
904 { "Jcall{T|}", { Ap
} },
905 { "(bad)", { XX
} }, /* fwait */
906 { "pushfT", { XX
} },
908 { "sahf{|}", { XX
} },
909 { "lahf{|}", { XX
} },
911 { "movB", { AL
, Ob
} },
912 { "movS", { eAX
, Ov
} },
913 { "movB", { Ob
, AL
} },
914 { "movS", { Ov
, eAX
} },
915 { "movs{b||b|}", { Ybr
, Xb
} },
916 { "movs{R||R|}", { Yvr
, Xv
} },
917 { "cmps{b||b|}", { Xb
, Yb
} },
918 { "cmps{R||R|}", { Xv
, Yv
} },
920 { "testB", { AL
, Ib
} },
921 { "testS", { eAX
, Iv
} },
922 { "stosB", { Ybr
, AL
} },
923 { "stosS", { Yvr
, eAX
} },
924 { "lodsB", { ALr
, Xb
} },
925 { "lodsS", { eAXr
, Xv
} },
926 { "scasB", { AL
, Yb
} },
927 { "scasS", { eAX
, Yv
} },
929 { "movB", { RMAL
, Ib
} },
930 { "movB", { RMCL
, Ib
} },
931 { "movB", { RMDL
, Ib
} },
932 { "movB", { RMBL
, Ib
} },
933 { "movB", { RMAH
, Ib
} },
934 { "movB", { RMCH
, Ib
} },
935 { "movB", { RMDH
, Ib
} },
936 { "movB", { RMBH
, Ib
} },
938 { "movS", { RMeAX
, Iv64
} },
939 { "movS", { RMeCX
, Iv64
} },
940 { "movS", { RMeDX
, Iv64
} },
941 { "movS", { RMeBX
, Iv64
} },
942 { "movS", { RMeSP
, Iv64
} },
943 { "movS", { RMeBP
, Iv64
} },
944 { "movS", { RMeSI
, Iv64
} },
945 { "movS", { RMeDI
, Iv64
} },
951 { "les{S|}", { Gv
, Mp
} },
952 { "ldsS", { Gv
, Mp
} },
956 { "enterT", { Iw
, Ib
} },
957 { "leaveT", { XX
} },
962 { "into{|}", { XX
} },
969 { "aam{|}", { sIb
} },
970 { "aad{|}", { sIb
} },
972 { "xlat", { DSBX
} },
983 { "loopneFH", { Jb
, XX
, loop_jcxz_flag
} },
984 { "loopeFH", { Jb
, XX
, loop_jcxz_flag
} },
985 { "loopFH", { Jb
, XX
, loop_jcxz_flag
} },
986 { "jEcxzH", { Jb
, XX
, loop_jcxz_flag
} },
987 { "inB", { AL
, Ib
} },
988 { "inG", { zAX
, Ib
} },
989 { "outB", { Ib
, AL
} },
990 { "outG", { Ib
, zAX
} },
994 { "Jjmp{T|}", { Ap
} },
996 { "inB", { AL
, indirDX
} },
997 { "inG", { zAX
, indirDX
} },
998 { "outB", { indirDX
, AL
} },
999 { "outG", { indirDX
, zAX
} },
1001 { "(bad)", { XX
} }, /* lock prefix */
1002 { "icebp", { XX
} },
1003 { "(bad)", { XX
} }, /* repne */
1004 { "(bad)", { XX
} }, /* repz */
1020 static const struct dis386 dis386_twobyte
[] = {
1024 { "larS", { Gv
, Ew
} },
1025 { "lslS", { Gv
, Ew
} },
1026 { "(bad)", { XX
} },
1027 { "syscall", { XX
} },
1029 { "sysretP", { XX
} },
1032 { "wbinvd", { XX
} },
1033 { "(bad)", { XX
} },
1035 { "(bad)", { XX
} },
1037 { "femms", { XX
} },
1038 { "", { MX
, EM
, OPSUF
} }, /* See OP_3DNowSuffix. */
1043 { "movlpX", { EXq
, XM
, { SIMD_Fixup
, 'h' } } },
1044 { "unpcklpX", { XM
, EXq
} },
1045 { "unpckhpX", { XM
, EXq
} },
1047 { "movhpX", { EXq
, XM
, { SIMD_Fixup
, 'l' } } },
1050 { "(bad)", { XX
} },
1051 { "(bad)", { XX
} },
1052 { "(bad)", { XX
} },
1053 { "(bad)", { XX
} },
1054 { "(bad)", { XX
} },
1055 { "(bad)", { XX
} },
1058 { "movZ", { Rm
, Cm
} },
1059 { "movZ", { Rm
, Dm
} },
1060 { "movZ", { Cm
, Rm
} },
1061 { "movZ", { Dm
, Rm
} },
1062 { "movL", { Rd
, Td
} },
1063 { "(bad)", { XX
} },
1064 { "movL", { Td
, Rd
} },
1065 { "(bad)", { XX
} },
1067 { "movapX", { XM
, EXx
} },
1068 { "movapX", { EXx
, XM
} },
1076 { "wrmsr", { XX
} },
1077 { "rdtsc", { XX
} },
1078 { "rdmsr", { XX
} },
1079 { "rdpmc", { XX
} },
1080 { "sysenter", { XX
} },
1081 { "sysexit", { XX
} },
1082 { "(bad)", { XX
} },
1083 { "(bad)", { XX
} },
1086 { "(bad)", { XX
} },
1088 { "(bad)", { XX
} },
1089 { "(bad)", { XX
} },
1090 { "(bad)", { XX
} },
1091 { "(bad)", { XX
} },
1092 { "(bad)", { XX
} },
1094 { "cmovo", { Gv
, Ev
} },
1095 { "cmovno", { Gv
, Ev
} },
1096 { "cmovb", { Gv
, Ev
} },
1097 { "cmovae", { Gv
, Ev
} },
1098 { "cmove", { Gv
, Ev
} },
1099 { "cmovne", { Gv
, Ev
} },
1100 { "cmovbe", { Gv
, Ev
} },
1101 { "cmova", { Gv
, Ev
} },
1103 { "cmovs", { Gv
, Ev
} },
1104 { "cmovns", { Gv
, Ev
} },
1105 { "cmovp", { Gv
, Ev
} },
1106 { "cmovnp", { Gv
, Ev
} },
1107 { "cmovl", { Gv
, Ev
} },
1108 { "cmovge", { Gv
, Ev
} },
1109 { "cmovle", { Gv
, Ev
} },
1110 { "cmovg", { Gv
, Ev
} },
1112 { "movmskpX", { Gdq
, XS
} },
1116 { "andpX", { XM
, EXx
} },
1117 { "andnpX", { XM
, EXx
} },
1118 { "orpX", { XM
, EXx
} },
1119 { "xorpX", { XM
, EXx
} },
1133 { "packsswb", { MX
, EM
} },
1134 { "pcmpgtb", { MX
, EM
} },
1135 { "pcmpgtw", { MX
, EM
} },
1136 { "pcmpgtd", { MX
, EM
} },
1137 { "packuswb", { MX
, EM
} },
1139 { "punpckhbw", { MX
, EM
} },
1140 { "punpckhwd", { MX
, EM
} },
1141 { "punpckhdq", { MX
, EM
} },
1142 { "packssdw", { MX
, EM
} },
1145 { "movd", { MX
, Edq
} },
1152 { "pcmpeqb", { MX
, EM
} },
1153 { "pcmpeqw", { MX
, EM
} },
1154 { "pcmpeqd", { MX
, EM
} },
1159 { "(bad)", { XX
} },
1160 { "(bad)", { XX
} },
1166 { "joH", { Jv
, XX
, cond_jump_flag
} },
1167 { "jnoH", { Jv
, XX
, cond_jump_flag
} },
1168 { "jbH", { Jv
, XX
, cond_jump_flag
} },
1169 { "jaeH", { Jv
, XX
, cond_jump_flag
} },
1170 { "jeH", { Jv
, XX
, cond_jump_flag
} },
1171 { "jneH", { Jv
, XX
, cond_jump_flag
} },
1172 { "jbeH", { Jv
, XX
, cond_jump_flag
} },
1173 { "jaH", { Jv
, XX
, cond_jump_flag
} },
1175 { "jsH", { Jv
, XX
, cond_jump_flag
} },
1176 { "jnsH", { Jv
, XX
, cond_jump_flag
} },
1177 { "jpH", { Jv
, XX
, cond_jump_flag
} },
1178 { "jnpH", { Jv
, XX
, cond_jump_flag
} },
1179 { "jlH", { Jv
, XX
, cond_jump_flag
} },
1180 { "jgeH", { Jv
, XX
, cond_jump_flag
} },
1181 { "jleH", { Jv
, XX
, cond_jump_flag
} },
1182 { "jgH", { Jv
, XX
, cond_jump_flag
} },
1185 { "setno", { Eb
} },
1187 { "setae", { Eb
} },
1189 { "setne", { Eb
} },
1190 { "setbe", { Eb
} },
1194 { "setns", { Eb
} },
1196 { "setnp", { Eb
} },
1198 { "setge", { Eb
} },
1199 { "setle", { Eb
} },
1202 { "pushT", { fs
} },
1204 { "cpuid", { XX
} },
1205 { "btS", { Ev
, Gv
} },
1206 { "shldS", { Ev
, Gv
, Ib
} },
1207 { "shldS", { Ev
, Gv
, CL
} },
1211 { "pushT", { gs
} },
1214 { "btsS", { Ev
, Gv
} },
1215 { "shrdS", { Ev
, Gv
, Ib
} },
1216 { "shrdS", { Ev
, Gv
, CL
} },
1218 { "imulS", { Gv
, Ev
} },
1220 { "cmpxchgB", { Eb
, Gb
} },
1221 { "cmpxchgS", { Ev
, Gv
} },
1222 { "lssS", { Gv
, Mp
} },
1223 { "btrS", { Ev
, Gv
} },
1224 { "lfsS", { Gv
, Mp
} },
1225 { "lgsS", { Gv
, Mp
} },
1226 { "movz{bR|x|bR|x}", { Gv
, Eb
} },
1227 { "movz{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movzww ! */
1232 { "btcS", { Ev
, Gv
} },
1233 { "bsfS", { Gv
, Ev
} },
1235 { "movs{bR|x|bR|x}", { Gv
, Eb
} },
1236 { "movs{wR|x|wR|x}", { Gv
, Ew
} }, /* yes, there really is movsww ! */
1238 { "xaddB", { Eb
, Gb
} },
1239 { "xaddS", { Ev
, Gv
} },
1241 { "movntiS", { Ev
, Gv
} },
1242 { "pinsrw", { MX
, Edqw
, Ib
} },
1243 { "pextrw", { Gdq
, MS
, Ib
} },
1244 { "shufpX", { XM
, EXx
, Ib
} },
1247 { "bswap", { RMeAX
} },
1248 { "bswap", { RMeCX
} },
1249 { "bswap", { RMeDX
} },
1250 { "bswap", { RMeBX
} },
1251 { "bswap", { RMeSP
} },
1252 { "bswap", { RMeBP
} },
1253 { "bswap", { RMeSI
} },
1254 { "bswap", { RMeDI
} },
1257 { "psrlw", { MX
, EM
} },
1258 { "psrld", { MX
, EM
} },
1259 { "psrlq", { MX
, EM
} },
1260 { "paddq", { MX
, EM
} },
1261 { "pmullw", { MX
, EM
} },
1263 { "pmovmskb", { Gdq
, MS
} },
1265 { "psubusb", { MX
, EM
} },
1266 { "psubusw", { MX
, EM
} },
1267 { "pminub", { MX
, EM
} },
1268 { "pand", { MX
, EM
} },
1269 { "paddusb", { MX
, EM
} },
1270 { "paddusw", { MX
, EM
} },
1271 { "pmaxub", { MX
, EM
} },
1272 { "pandn", { MX
, EM
} },
1274 { "pavgb", { MX
, EM
} },
1275 { "psraw", { MX
, EM
} },
1276 { "psrad", { MX
, EM
} },
1277 { "pavgw", { MX
, EM
} },
1278 { "pmulhuw", { MX
, EM
} },
1279 { "pmulhw", { MX
, EM
} },
1283 { "psubsb", { MX
, EM
} },
1284 { "psubsw", { MX
, EM
} },
1285 { "pminsw", { MX
, EM
} },
1286 { "por", { MX
, EM
} },
1287 { "paddsb", { MX
, EM
} },
1288 { "paddsw", { MX
, EM
} },
1289 { "pmaxsw", { MX
, EM
} },
1290 { "pxor", { MX
, EM
} },
1293 { "psllw", { MX
, EM
} },
1294 { "pslld", { MX
, EM
} },
1295 { "psllq", { MX
, EM
} },
1296 { "pmuludq", { MX
, EM
} },
1297 { "pmaddwd", { MX
, EM
} },
1298 { "psadbw", { MX
, EM
} },
1301 { "psubb", { MX
, EM
} },
1302 { "psubw", { MX
, EM
} },
1303 { "psubd", { MX
, EM
} },
1304 { "psubq", { MX
, EM
} },
1305 { "paddb", { MX
, EM
} },
1306 { "paddw", { MX
, EM
} },
1307 { "paddd", { MX
, EM
} },
1308 { "(bad)", { XX
} },
1311 static const unsigned char onebyte_has_modrm
[256] = {
1312 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1313 /* ------------------------------- */
1314 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1315 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1316 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1317 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1318 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1319 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1320 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1321 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1322 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1323 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1324 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1325 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1326 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1327 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1328 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1329 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1330 /* ------------------------------- */
1331 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1334 static const unsigned char twobyte_has_modrm
[256] = {
1335 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1336 /* ------------------------------- */
1337 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1338 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
1339 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1340 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1341 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1342 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1343 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1344 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
1345 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1346 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1347 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
1348 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
1349 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1350 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1351 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1352 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1353 /* ------------------------------- */
1354 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1357 static const unsigned char twobyte_uses_DATA_prefix
[256] = {
1358 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1359 /* ------------------------------- */
1360 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1361 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1362 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1363 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1364 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1365 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1366 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1367 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
1368 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1369 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1370 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1371 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1372 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1373 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1374 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1375 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1376 /* ------------------------------- */
1377 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1380 static const unsigned char twobyte_uses_REPNZ_prefix
[256] = {
1381 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1382 /* ------------------------------- */
1383 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1384 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1385 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1386 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1387 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1388 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1389 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1390 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1391 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1392 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1393 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1394 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1395 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1396 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1397 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1398 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1399 /* ------------------------------- */
1400 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1403 static const unsigned char twobyte_uses_REPZ_prefix
[256] = {
1404 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1405 /* ------------------------------- */
1406 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1407 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1408 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1409 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1410 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1411 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1412 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1413 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1414 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1415 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1416 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1417 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1418 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1419 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1420 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1421 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1422 /* ------------------------------- */
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1426 /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1427 static const unsigned char threebyte_0x38_uses_DATA_prefix
[256] = {
1428 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1429 /* ------------------------------- */
1430 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1431 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1432 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1433 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1434 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1435 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1436 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1437 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1438 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1439 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1440 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1441 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1442 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1443 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1444 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1445 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1446 /* ------------------------------- */
1447 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1450 /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1451 static const unsigned char threebyte_0x38_uses_REPNZ_prefix
[256] = {
1452 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1453 /* ------------------------------- */
1454 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1455 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1456 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1457 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1458 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1459 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1460 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1461 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1462 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1463 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1464 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1465 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1466 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1467 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1468 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1469 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1470 /* ------------------------------- */
1471 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1474 /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1475 static const unsigned char threebyte_0x38_uses_REPZ_prefix
[256] = {
1476 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1477 /* ------------------------------- */
1478 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1479 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1480 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1481 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1482 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1483 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1484 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1485 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1486 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1487 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1488 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1489 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1490 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1491 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1492 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1493 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1494 /* ------------------------------- */
1495 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1498 /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1499 static const unsigned char threebyte_0x3a_uses_DATA_prefix
[256] = {
1500 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1501 /* ------------------------------- */
1502 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1503 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1504 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1505 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1506 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1507 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1508 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1509 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1510 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1511 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1512 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1513 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1514 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1515 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1516 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1517 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1518 /* ------------------------------- */
1519 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1522 /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1523 static const unsigned char threebyte_0x3a_uses_REPNZ_prefix
[256] = {
1524 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1525 /* ------------------------------- */
1526 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1527 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1528 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1529 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1530 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1531 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1532 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1533 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1534 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1535 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1536 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1537 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1538 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1539 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1540 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1541 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1542 /* ------------------------------- */
1543 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1546 /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1547 static const unsigned char threebyte_0x3a_uses_REPZ_prefix
[256] = {
1548 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1549 /* ------------------------------- */
1550 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1551 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1552 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1553 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1554 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1555 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1556 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1557 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1558 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1559 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1560 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1561 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1562 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1563 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1564 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1565 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1566 /* ------------------------------- */
1567 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1570 static char obuf
[100];
1572 static char scratchbuf
[100];
1573 static unsigned char *start_codep
;
1574 static unsigned char *insn_codep
;
1575 static unsigned char *codep
;
1576 static disassemble_info
*the_info
;
1584 static unsigned char need_modrm
;
1586 /* If we are accessing mod/rm/reg without need_modrm set, then the
1587 values are stale. Hitting this abort likely indicates that you
1588 need to update onebyte_has_modrm or twobyte_has_modrm. */
1589 #define MODRM_CHECK if (!need_modrm) abort ()
1591 static const char * const *names64
;
1592 static const char * const *names32
;
1593 static const char * const *names16
;
1594 static const char * const *names8
;
1595 static const char * const *names8rex
;
1596 static const char * const *names_seg
;
1597 static const char * const *index16
;
1599 static const char * const intel_names64
[] = {
1600 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1601 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1603 static const char * const intel_names32
[] = {
1604 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1605 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1607 static const char * const intel_names16
[] = {
1608 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1609 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1611 static const char * const intel_names8
[] = {
1612 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1614 static const char * const intel_names8rex
[] = {
1615 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1616 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1618 static const char * const intel_names_seg
[] = {
1619 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1621 static const char * const intel_index16
[] = {
1622 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1625 static const char * const att_names64
[] = {
1626 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1627 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1629 static const char * const att_names32
[] = {
1630 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1631 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1633 static const char * const att_names16
[] = {
1634 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1635 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1637 static const char * const att_names8
[] = {
1638 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1640 static const char * const att_names8rex
[] = {
1641 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1642 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1644 static const char * const att_names_seg
[] = {
1645 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1647 static const char * const att_index16
[] = {
1648 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1651 static const struct dis386 grps
[][8] = {
1654 { "popU", { stackEv
} },
1655 { "(bad)", { XX
} },
1656 { "(bad)", { XX
} },
1657 { "(bad)", { XX
} },
1658 { "(bad)", { XX
} },
1659 { "(bad)", { XX
} },
1660 { "(bad)", { XX
} },
1661 { "(bad)", { XX
} },
1665 { "addA", { Eb
, Ib
} },
1666 { "orA", { Eb
, Ib
} },
1667 { "adcA", { Eb
, Ib
} },
1668 { "sbbA", { Eb
, Ib
} },
1669 { "andA", { Eb
, Ib
} },
1670 { "subA", { Eb
, Ib
} },
1671 { "xorA", { Eb
, Ib
} },
1672 { "cmpA", { Eb
, Ib
} },
1676 { "addQ", { Ev
, Iv
} },
1677 { "orQ", { Ev
, Iv
} },
1678 { "adcQ", { Ev
, Iv
} },
1679 { "sbbQ", { Ev
, Iv
} },
1680 { "andQ", { Ev
, Iv
} },
1681 { "subQ", { Ev
, Iv
} },
1682 { "xorQ", { Ev
, Iv
} },
1683 { "cmpQ", { Ev
, Iv
} },
1687 { "addQ", { Ev
, sIb
} },
1688 { "orQ", { Ev
, sIb
} },
1689 { "adcQ", { Ev
, sIb
} },
1690 { "sbbQ", { Ev
, sIb
} },
1691 { "andQ", { Ev
, sIb
} },
1692 { "subQ", { Ev
, sIb
} },
1693 { "xorQ", { Ev
, sIb
} },
1694 { "cmpQ", { Ev
, sIb
} },
1698 { "rolA", { Eb
, Ib
} },
1699 { "rorA", { Eb
, Ib
} },
1700 { "rclA", { Eb
, Ib
} },
1701 { "rcrA", { Eb
, Ib
} },
1702 { "shlA", { Eb
, Ib
} },
1703 { "shrA", { Eb
, Ib
} },
1704 { "(bad)", { XX
} },
1705 { "sarA", { Eb
, Ib
} },
1709 { "rolQ", { Ev
, Ib
} },
1710 { "rorQ", { Ev
, Ib
} },
1711 { "rclQ", { Ev
, Ib
} },
1712 { "rcrQ", { Ev
, Ib
} },
1713 { "shlQ", { Ev
, Ib
} },
1714 { "shrQ", { Ev
, Ib
} },
1715 { "(bad)", { XX
} },
1716 { "sarQ", { Ev
, Ib
} },
1720 { "rolA", { Eb
, I1
} },
1721 { "rorA", { Eb
, I1
} },
1722 { "rclA", { Eb
, I1
} },
1723 { "rcrA", { Eb
, I1
} },
1724 { "shlA", { Eb
, I1
} },
1725 { "shrA", { Eb
, I1
} },
1726 { "(bad)", { XX
} },
1727 { "sarA", { Eb
, I1
} },
1731 { "rolQ", { Ev
, I1
} },
1732 { "rorQ", { Ev
, I1
} },
1733 { "rclQ", { Ev
, I1
} },
1734 { "rcrQ", { Ev
, I1
} },
1735 { "shlQ", { Ev
, I1
} },
1736 { "shrQ", { Ev
, I1
} },
1737 { "(bad)", { XX
} },
1738 { "sarQ", { Ev
, I1
} },
1742 { "rolA", { Eb
, CL
} },
1743 { "rorA", { Eb
, CL
} },
1744 { "rclA", { Eb
, CL
} },
1745 { "rcrA", { Eb
, CL
} },
1746 { "shlA", { Eb
, CL
} },
1747 { "shrA", { Eb
, CL
} },
1748 { "(bad)", { XX
} },
1749 { "sarA", { Eb
, CL
} },
1753 { "rolQ", { Ev
, CL
} },
1754 { "rorQ", { Ev
, CL
} },
1755 { "rclQ", { Ev
, CL
} },
1756 { "rcrQ", { Ev
, CL
} },
1757 { "shlQ", { Ev
, CL
} },
1758 { "shrQ", { Ev
, CL
} },
1759 { "(bad)", { XX
} },
1760 { "sarQ", { Ev
, CL
} },
1764 { "testA", { Eb
, Ib
} },
1765 { "(bad)", { Eb
} },
1768 { "mulA", { Eb
} }, /* Don't print the implicit %al register, */
1769 { "imulA", { Eb
} }, /* to distinguish these opcodes from other */
1770 { "divA", { Eb
} }, /* mul/imul opcodes. Do the same for div */
1771 { "idivA", { Eb
} }, /* and idiv for consistency. */
1775 { "testQ", { Ev
, Iv
} },
1776 { "(bad)", { XX
} },
1779 { "mulQ", { Ev
} }, /* Don't print the implicit register. */
1780 { "imulQ", { Ev
} },
1782 { "idivQ", { Ev
} },
1788 { "(bad)", { XX
} },
1789 { "(bad)", { XX
} },
1790 { "(bad)", { XX
} },
1791 { "(bad)", { XX
} },
1792 { "(bad)", { XX
} },
1793 { "(bad)", { XX
} },
1799 { "callT", { indirEv
} },
1800 { "JcallT", { indirEp
} },
1801 { "jmpT", { indirEv
} },
1802 { "JjmpT", { indirEp
} },
1803 { "pushU", { stackEv
} },
1804 { "(bad)", { XX
} },
1808 { "sldtD", { Sv
} },
1814 { "(bad)", { XX
} },
1815 { "(bad)", { XX
} },
1819 { "sgdt{Q|IQ||}", { { VMX_Fixup
, 0 } } },
1820 { "sidt{Q|IQ||}", { { PNI_Fixup
, 0 } } },
1821 { "lgdt{Q|Q||}", { M
} },
1822 { "lidt{Q|Q||}", { { SVME_Fixup
, 0 } } },
1823 { "smswD", { Sv
} },
1824 { "(bad)", { XX
} },
1826 { "invlpg", { { INVLPG_Fixup
, w_mode
} } },
1830 { "(bad)", { XX
} },
1831 { "(bad)", { XX
} },
1832 { "(bad)", { XX
} },
1833 { "(bad)", { XX
} },
1834 { "btQ", { Ev
, Ib
} },
1835 { "btsQ", { Ev
, Ib
} },
1836 { "btrQ", { Ev
, Ib
} },
1837 { "btcQ", { Ev
, Ib
} },
1841 { "(bad)", { XX
} },
1842 { "cmpxchg8b", { { CMPXCHG8B_Fixup
, q_mode
} } },
1843 { "(bad)", { XX
} },
1844 { "(bad)", { XX
} },
1845 { "(bad)", { XX
} },
1846 { "(bad)", { XX
} },
1847 { "", { VM
} }, /* See OP_VMX. */
1848 { "vmptrst", { Mq
} },
1852 { "movA", { Eb
, Ib
} },
1853 { "(bad)", { XX
} },
1854 { "(bad)", { XX
} },
1855 { "(bad)", { XX
} },
1856 { "(bad)", { XX
} },
1857 { "(bad)", { XX
} },
1858 { "(bad)", { XX
} },
1859 { "(bad)", { XX
} },
1863 { "movQ", { Ev
, Iv
} },
1864 { "(bad)", { XX
} },
1865 { "(bad)", { XX
} },
1866 { "(bad)", { XX
} },
1867 { "(bad)", { XX
} },
1868 { "(bad)", { XX
} },
1869 { "(bad)", { XX
} },
1870 { "(bad)", { XX
} },
1874 { "(bad)", { XX
} },
1875 { "(bad)", { XX
} },
1876 { "psrlw", { MS
, Ib
} },
1877 { "(bad)", { XX
} },
1878 { "psraw", { MS
, Ib
} },
1879 { "(bad)", { XX
} },
1880 { "psllw", { MS
, Ib
} },
1881 { "(bad)", { XX
} },
1885 { "(bad)", { XX
} },
1886 { "(bad)", { XX
} },
1887 { "psrld", { MS
, Ib
} },
1888 { "(bad)", { XX
} },
1889 { "psrad", { MS
, Ib
} },
1890 { "(bad)", { XX
} },
1891 { "pslld", { MS
, Ib
} },
1892 { "(bad)", { XX
} },
1896 { "(bad)", { XX
} },
1897 { "(bad)", { XX
} },
1898 { "psrlq", { MS
, Ib
} },
1899 { "psrldq", { MS
, Ib
} },
1900 { "(bad)", { XX
} },
1901 { "(bad)", { XX
} },
1902 { "psllq", { MS
, Ib
} },
1903 { "pslldq", { MS
, Ib
} },
1907 { "fxsave", { Ev
} },
1908 { "fxrstor", { Ev
} },
1909 { "ldmxcsr", { Ev
} },
1910 { "stmxcsr", { Ev
} },
1911 { "(bad)", { XX
} },
1912 { "lfence", { { OP_0fae
, 0 } } },
1913 { "mfence", { { OP_0fae
, 0 } } },
1914 { "clflush", { { OP_0fae
, 0 } } },
1918 { "prefetchnta", { Ev
} },
1919 { "prefetcht0", { Ev
} },
1920 { "prefetcht1", { Ev
} },
1921 { "prefetcht2", { Ev
} },
1922 { "(bad)", { XX
} },
1923 { "(bad)", { XX
} },
1924 { "(bad)", { XX
} },
1925 { "(bad)", { XX
} },
1929 { "prefetch", { Eb
} },
1930 { "prefetchw", { Eb
} },
1931 { "(bad)", { XX
} },
1932 { "(bad)", { XX
} },
1933 { "(bad)", { XX
} },
1934 { "(bad)", { XX
} },
1935 { "(bad)", { XX
} },
1936 { "(bad)", { XX
} },
1940 { "xstore-rng", { { OP_0f07
, 0 } } },
1941 { "xcrypt-ecb", { { OP_0f07
, 0 } } },
1942 { "xcrypt-cbc", { { OP_0f07
, 0 } } },
1943 { "xcrypt-ctr", { { OP_0f07
, 0 } } },
1944 { "xcrypt-cfb", { { OP_0f07
, 0 } } },
1945 { "xcrypt-ofb", { { OP_0f07
, 0 } } },
1946 { "(bad)", { { OP_0f07
, 0 } } },
1947 { "(bad)", { { OP_0f07
, 0 } } },
1951 { "montmul", { { OP_0f07
, 0 } } },
1952 { "xsha1", { { OP_0f07
, 0 } } },
1953 { "xsha256", { { OP_0f07
, 0 } } },
1954 { "(bad)", { { OP_0f07
, 0 } } },
1955 { "(bad)", { { OP_0f07
, 0 } } },
1956 { "(bad)", { { OP_0f07
, 0 } } },
1957 { "(bad)", { { OP_0f07
, 0 } } },
1958 { "(bad)", { { OP_0f07
, 0 } } },
1962 static const struct dis386 prefix_user_table
[][4] = {
1965 { "addps", { XM
, EXx
} },
1966 { "addss", { XM
, EXd
} },
1967 { "addpd", { XM
, EXx
} },
1968 { "addsd", { XM
, EXq
} },
1972 { "", { XM
, EXx
, OPSIMD
} }, /* See OP_SIMD_SUFFIX. */
1973 { "", { XM
, EXx
, OPSIMD
} },
1974 { "", { XM
, EXx
, OPSIMD
} },
1975 { "", { XM
, EXx
, OPSIMD
} },
1979 { "cvtpi2ps", { XM
, EMC
} },
1980 { "cvtsi2ssY", { XM
, Ev
} },
1981 { "cvtpi2pd", { XM
, EMC
} },
1982 { "cvtsi2sdY", { XM
, Ev
} },
1986 { "cvtps2pi", { MXC
, EXx
} },
1987 { "cvtss2siY", { Gv
, EXx
} },
1988 { "cvtpd2pi", { MXC
, EXx
} },
1989 { "cvtsd2siY", { Gv
, EXx
} },
1993 { "cvttps2pi", { MXC
, EXx
} },
1994 { "cvttss2siY", { Gv
, EXx
} },
1995 { "cvttpd2pi", { MXC
, EXx
} },
1996 { "cvttsd2siY", { Gv
, EXx
} },
2000 { "divps", { XM
, EXx
} },
2001 { "divss", { XM
, EXx
} },
2002 { "divpd", { XM
, EXx
} },
2003 { "divsd", { XM
, EXx
} },
2007 { "maxps", { XM
, EXx
} },
2008 { "maxss", { XM
, EXx
} },
2009 { "maxpd", { XM
, EXx
} },
2010 { "maxsd", { XM
, EXx
} },
2014 { "minps", { XM
, EXx
} },
2015 { "minss", { XM
, EXx
} },
2016 { "minpd", { XM
, EXx
} },
2017 { "minsd", { XM
, EXx
} },
2021 { "movups", { XM
, EXx
} },
2022 { "movss", { XM
, EXx
} },
2023 { "movupd", { XM
, EXx
} },
2024 { "movsd", { XM
, EXx
} },
2028 { "movups", { EXx
, XM
} },
2029 { "movss", { EXx
, XM
} },
2030 { "movupd", { EXx
, XM
} },
2031 { "movsd", { EXx
, XM
} },
2035 { "mulps", { XM
, EXx
} },
2036 { "mulss", { XM
, EXx
} },
2037 { "mulpd", { XM
, EXx
} },
2038 { "mulsd", { XM
, EXx
} },
2042 { "rcpps", { XM
, EXx
} },
2043 { "rcpss", { XM
, EXx
} },
2044 { "(bad)", { XM
, EXx
} },
2045 { "(bad)", { XM
, EXx
} },
2049 { "rsqrtps",{ XM
, EXx
} },
2050 { "rsqrtss",{ XM
, EXx
} },
2051 { "(bad)", { XM
, EXx
} },
2052 { "(bad)", { XM
, EXx
} },
2056 { "sqrtps", { XM
, EXx
} },
2057 { "sqrtss", { XM
, EXx
} },
2058 { "sqrtpd", { XM
, EXx
} },
2059 { "sqrtsd", { XM
, EXx
} },
2063 { "subps", { XM
, EXx
} },
2064 { "subss", { XM
, EXx
} },
2065 { "subpd", { XM
, EXx
} },
2066 { "subsd", { XM
, EXx
} },
2070 { "(bad)", { XM
, EXx
} },
2071 { "cvtdq2pd", { XM
, EXq
} },
2072 { "cvttpd2dq", { XM
, EXx
} },
2073 { "cvtpd2dq", { XM
, EXx
} },
2077 { "cvtdq2ps", { XM
, EXx
} },
2078 { "cvttps2dq", { XM
, EXx
} },
2079 { "cvtps2dq", { XM
, EXx
} },
2080 { "(bad)", { XM
, EXx
} },
2084 { "cvtps2pd", { XM
, EXq
} },
2085 { "cvtss2sd", { XM
, EXx
} },
2086 { "cvtpd2ps", { XM
, EXx
} },
2087 { "cvtsd2ss", { XM
, EXx
} },
2091 { "maskmovq", { MX
, MS
} },
2092 { "(bad)", { XM
, EXx
} },
2093 { "maskmovdqu", { XM
, XS
} },
2094 { "(bad)", { XM
, EXx
} },
2098 { "movq", { MX
, EM
} },
2099 { "movdqu", { XM
, EXx
} },
2100 { "movdqa", { XM
, EXx
} },
2101 { "(bad)", { XM
, EXx
} },
2105 { "movq", { EM
, MX
} },
2106 { "movdqu", { EXx
, XM
} },
2107 { "movdqa", { EXx
, XM
} },
2108 { "(bad)", { EXx
, XM
} },
2112 { "(bad)", { EXx
, XM
} },
2113 { "movq2dq",{ XM
, MS
} },
2114 { "movq", { EXx
, XM
} },
2115 { "movdq2q",{ MX
, XS
} },
2119 { "pshufw", { MX
, EM
, Ib
} },
2120 { "pshufhw",{ XM
, EXx
, Ib
} },
2121 { "pshufd", { XM
, EXx
, Ib
} },
2122 { "pshuflw",{ XM
, EXx
, Ib
} },
2126 { "movd", { Edq
, MX
} },
2127 { "movq", { XM
, EXx
} },
2128 { "movd", { Edq
, XM
} },
2129 { "(bad)", { Ed
, XM
} },
2133 { "(bad)", { MX
, EXx
} },
2134 { "(bad)", { XM
, EXx
} },
2135 { "punpckhqdq", { XM
, EXx
} },
2136 { "(bad)", { XM
, EXx
} },
2140 { "movntq", { EM
, MX
} },
2141 { "(bad)", { EM
, XM
} },
2142 { "movntdq",{ EM
, XM
} },
2143 { "(bad)", { EM
, XM
} },
2147 { "(bad)", { MX
, EXx
} },
2148 { "(bad)", { XM
, EXx
} },
2149 { "punpcklqdq", { XM
, EXx
} },
2150 { "(bad)", { XM
, EXx
} },
2154 { "(bad)", { MX
, EXx
} },
2155 { "(bad)", { XM
, EXx
} },
2156 { "addsubpd", { XM
, EXx
} },
2157 { "addsubps", { XM
, EXx
} },
2161 { "(bad)", { MX
, EXx
} },
2162 { "(bad)", { XM
, EXx
} },
2163 { "haddpd", { XM
, EXx
} },
2164 { "haddps", { XM
, EXx
} },
2168 { "(bad)", { MX
, EXx
} },
2169 { "(bad)", { XM
, EXx
} },
2170 { "hsubpd", { XM
, EXx
} },
2171 { "hsubps", { XM
, EXx
} },
2175 { "movlpX", { XM
, EXq
, { SIMD_Fixup
, 'h' } } }, /* really only 2 operands */
2176 { "movsldup", { XM
, EXx
} },
2177 { "movlpd", { XM
, EXq
} },
2178 { "movddup", { XM
, EXq
} },
2182 { "movhpX", { XM
, EXq
, { SIMD_Fixup
, 'l' } } },
2183 { "movshdup", { XM
, EXx
} },
2184 { "movhpd", { XM
, EXq
} },
2185 { "(bad)", { XM
, EXq
} },
2189 { "(bad)", { XM
, EXx
} },
2190 { "(bad)", { XM
, EXx
} },
2191 { "(bad)", { XM
, EXx
} },
2192 { "lddqu", { XM
, M
} },
2196 {"movntps", { Ev
, XM
} },
2197 {"movntss", { Ev
, XM
} },
2198 {"movntpd", { Ev
, XM
} },
2199 {"movntsd", { Ev
, XM
} },
2204 {"vmread", { Em
, Gm
} },
2206 {"extrq", { XS
, Ib
, Ib
} },
2207 {"insertq", { XM
, XS
, Ib
, Ib
} },
2212 {"vmwrite", { Gm
, Em
} },
2214 {"extrq", { XM
, XS
} },
2215 {"insertq", { XM
, XS
} },
2220 { "bsrS", { Gv
, Ev
} },
2221 { "lzcntS", { Gv
, Ev
} },
2222 { "bsrS", { Gv
, Ev
} },
2223 { "(bad)", { XX
} },
2228 { "(bad)", { XX
} },
2229 { "popcntS", { Gv
, Ev
} },
2230 { "(bad)", { XX
} },
2231 { "(bad)", { XX
} },
2236 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2237 { "pause", { XX
} },
2238 { "xchgS", { { NOP_Fixup1
, eAX_reg
}, { NOP_Fixup2
, eAX_reg
} } },
2239 { "(bad)", { XX
} },
2244 { "(bad)", { XX
} },
2245 { "(bad)", { XX
} },
2246 { "pblendvb", {XM
, EXx
, XMM0
} },
2247 { "(bad)", { XX
} },
2252 { "(bad)", { XX
} },
2253 { "(bad)", { XX
} },
2254 { "blendvps", {XM
, EXx
, XMM0
} },
2255 { "(bad)", { XX
} },
2260 { "(bad)", { XX
} },
2261 { "(bad)", { XX
} },
2262 { "blendvpd", { XM
, EXx
, XMM0
} },
2263 { "(bad)", { XX
} },
2268 { "(bad)", { XX
} },
2269 { "(bad)", { XX
} },
2270 { "ptest", { XM
, EXx
} },
2271 { "(bad)", { XX
} },
2276 { "(bad)", { XX
} },
2277 { "(bad)", { XX
} },
2278 { "pmovsxbw", { XM
, EXx
} },
2279 { "(bad)", { XX
} },
2284 { "(bad)", { XX
} },
2285 { "(bad)", { XX
} },
2286 { "pmovsxbd", { XM
, EXx
} },
2287 { "(bad)", { XX
} },
2292 { "(bad)", { XX
} },
2293 { "(bad)", { XX
} },
2294 { "pmovsxbq", { XM
, EXx
} },
2295 { "(bad)", { XX
} },
2300 { "(bad)", { XX
} },
2301 { "(bad)", { XX
} },
2302 { "pmovsxwd", { XM
, EXx
} },
2303 { "(bad)", { XX
} },
2308 { "(bad)", { XX
} },
2309 { "(bad)", { XX
} },
2310 { "pmovsxwq", { XM
, EXx
} },
2311 { "(bad)", { XX
} },
2316 { "(bad)", { XX
} },
2317 { "(bad)", { XX
} },
2318 { "pmovsxdq", { XM
, EXx
} },
2319 { "(bad)", { XX
} },
2324 { "(bad)", { XX
} },
2325 { "(bad)", { XX
} },
2326 { "pmuldq", { XM
, EXx
} },
2327 { "(bad)", { XX
} },
2332 { "(bad)", { XX
} },
2333 { "(bad)", { XX
} },
2334 { "pcmpeqq", { XM
, EXx
} },
2335 { "(bad)", { XX
} },
2340 { "(bad)", { XX
} },
2341 { "(bad)", { XX
} },
2342 { "movntdqa", { XM
, EM
} },
2343 { "(bad)", { XX
} },
2348 { "(bad)", { XX
} },
2349 { "(bad)", { XX
} },
2350 { "packusdw", { XM
, EXx
} },
2351 { "(bad)", { XX
} },
2356 { "(bad)", { XX
} },
2357 { "(bad)", { XX
} },
2358 { "pmovzxbw", { XM
, EXx
} },
2359 { "(bad)", { XX
} },
2364 { "(bad)", { XX
} },
2365 { "(bad)", { XX
} },
2366 { "pmovzxbd", { XM
, EXx
} },
2367 { "(bad)", { XX
} },
2372 { "(bad)", { XX
} },
2373 { "(bad)", { XX
} },
2374 { "pmovzxbq", { XM
, EXx
} },
2375 { "(bad)", { XX
} },
2380 { "(bad)", { XX
} },
2381 { "(bad)", { XX
} },
2382 { "pmovzxwd", { XM
, EXx
} },
2383 { "(bad)", { XX
} },
2388 { "(bad)", { XX
} },
2389 { "(bad)", { XX
} },
2390 { "pmovzxwq", { XM
, EXx
} },
2391 { "(bad)", { XX
} },
2396 { "(bad)", { XX
} },
2397 { "(bad)", { XX
} },
2398 { "pmovzxdq", { XM
, EXx
} },
2399 { "(bad)", { XX
} },
2404 { "(bad)", { XX
} },
2405 { "(bad)", { XX
} },
2406 { "pminsb", { XM
, EXx
} },
2407 { "(bad)", { XX
} },
2412 { "(bad)", { XX
} },
2413 { "(bad)", { XX
} },
2414 { "pminsd", { XM
, EXx
} },
2415 { "(bad)", { XX
} },
2420 { "(bad)", { XX
} },
2421 { "(bad)", { XX
} },
2422 { "pminuw", { XM
, EXx
} },
2423 { "(bad)", { XX
} },
2428 { "(bad)", { XX
} },
2429 { "(bad)", { XX
} },
2430 { "pminud", { XM
, EXx
} },
2431 { "(bad)", { XX
} },
2436 { "(bad)", { XX
} },
2437 { "(bad)", { XX
} },
2438 { "pmaxsb", { XM
, EXx
} },
2439 { "(bad)", { XX
} },
2444 { "(bad)", { XX
} },
2445 { "(bad)", { XX
} },
2446 { "pmaxsd", { XM
, EXx
} },
2447 { "(bad)", { XX
} },
2452 { "(bad)", { XX
} },
2453 { "(bad)", { XX
} },
2454 { "pmaxuw", { XM
, EXx
} },
2455 { "(bad)", { XX
} },
2460 { "(bad)", { XX
} },
2461 { "(bad)", { XX
} },
2462 { "pmaxud", { XM
, EXx
} },
2463 { "(bad)", { XX
} },
2468 { "(bad)", { XX
} },
2469 { "(bad)", { XX
} },
2470 { "pmulld", { XM
, EXx
} },
2471 { "(bad)", { XX
} },
2476 { "(bad)", { XX
} },
2477 { "(bad)", { XX
} },
2478 { "phminposuw", { XM
, EXx
} },
2479 { "(bad)", { XX
} },
2484 { "(bad)", { XX
} },
2485 { "(bad)", { XX
} },
2486 { "roundps", { XM
, EXx
, Ib
} },
2487 { "(bad)", { XX
} },
2492 { "(bad)", { XX
} },
2493 { "(bad)", { XX
} },
2494 { "roundpd", { XM
, EXx
, Ib
} },
2495 { "(bad)", { XX
} },
2500 { "(bad)", { XX
} },
2501 { "(bad)", { XX
} },
2502 { "roundss", { XM
, EXx
, Ib
} },
2503 { "(bad)", { XX
} },
2508 { "(bad)", { XX
} },
2509 { "(bad)", { XX
} },
2510 { "roundsd", { XM
, EXx
, Ib
} },
2511 { "(bad)", { XX
} },
2516 { "(bad)", { XX
} },
2517 { "(bad)", { XX
} },
2518 { "blendps", { XM
, EXx
, Ib
} },
2519 { "(bad)", { XX
} },
2524 { "(bad)", { XX
} },
2525 { "(bad)", { XX
} },
2526 { "blendpd", { XM
, EXx
, Ib
} },
2527 { "(bad)", { XX
} },
2532 { "(bad)", { XX
} },
2533 { "(bad)", { XX
} },
2534 { "pblendw", { XM
, EXx
, Ib
} },
2535 { "(bad)", { XX
} },
2540 { "(bad)", { XX
} },
2541 { "(bad)", { XX
} },
2542 { "pextrb", { Edqb
, XM
, Ib
} },
2543 { "(bad)", { XX
} },
2548 { "(bad)", { XX
} },
2549 { "(bad)", { XX
} },
2550 { "pextrw", { Edqw
, XM
, Ib
} },
2551 { "(bad)", { XX
} },
2556 { "(bad)", { XX
} },
2557 { "(bad)", { XX
} },
2558 { "pextrK", { Edq
, XM
, Ib
} },
2559 { "(bad)", { XX
} },
2564 { "(bad)", { XX
} },
2565 { "(bad)", { XX
} },
2566 { "extractps", { Edqd
, XM
, Ib
} },
2567 { "(bad)", { XX
} },
2572 { "(bad)", { XX
} },
2573 { "(bad)", { XX
} },
2574 { "pinsrb", { XM
, Edqb
, Ib
} },
2575 { "(bad)", { XX
} },
2580 { "(bad)", { XX
} },
2581 { "(bad)", { XX
} },
2582 { "insertps", { XM
, EXx
, Ib
} },
2583 { "(bad)", { XX
} },
2588 { "(bad)", { XX
} },
2589 { "(bad)", { XX
} },
2590 { "pinsrK", { XM
, Edq
, Ib
} },
2591 { "(bad)", { XX
} },
2596 { "(bad)", { XX
} },
2597 { "(bad)", { XX
} },
2598 { "dpps", { XM
, EXx
, Ib
} },
2599 { "(bad)", { XX
} },
2604 { "(bad)", { XX
} },
2605 { "(bad)", { XX
} },
2606 { "dppd", { XM
, EXx
, Ib
} },
2607 { "(bad)", { XX
} },
2612 { "(bad)", { XX
} },
2613 { "(bad)", { XX
} },
2614 { "mpsadbw", { XM
, EXx
, Ib
} },
2615 { "(bad)", { XX
} },
2620 { "(bad)", { XX
} },
2621 { "(bad)", { XX
} },
2622 { "pcmpgtq", { XM
, EXx
} },
2623 { "(bad)", { XX
} },
2628 { "(bad)", { XX
} },
2629 { "(bad)", { XX
} },
2630 { "(bad)", { XX
} },
2631 { "crc32", { Gdq
, { CRC32_Fixup
, b_mode
} } },
2636 { "(bad)", { XX
} },
2637 { "(bad)", { XX
} },
2638 { "(bad)", { XX
} },
2639 { "crc32", { Gdq
, { CRC32_Fixup
, v_mode
} } },
2644 { "(bad)", { XX
} },
2645 { "(bad)", { XX
} },
2646 { "pcmpestrm", { XM
, EXx
, Ib
} },
2647 { "(bad)", { XX
} },
2652 { "(bad)", { XX
} },
2653 { "(bad)", { XX
} },
2654 { "pcmpestri", { XM
, EXx
, Ib
} },
2655 { "(bad)", { XX
} },
2660 { "(bad)", { XX
} },
2661 { "(bad)", { XX
} },
2662 { "pcmpistrm", { XM
, EXx
, Ib
} },
2663 { "(bad)", { XX
} },
2668 { "(bad)", { XX
} },
2669 { "(bad)", { XX
} },
2670 { "pcmpistri", { XM
, EXx
, Ib
} },
2671 { "(bad)", { XX
} },
2676 { "ucomiss",{ XM
, EXd
} },
2677 { "(bad)", { XX
} },
2678 { "ucomisd",{ XM
, EXq
} },
2679 { "(bad)", { XX
} },
2684 { "comiss", { XM
, EXd
} },
2685 { "(bad)", { XX
} },
2686 { "comisd", { XM
, EXq
} },
2687 { "(bad)", { XX
} },
2692 { "punpcklbw",{ MX
, EMd
} },
2693 { "(bad)", { XX
} },
2694 { "punpcklbw",{ MX
, EMq
} },
2695 { "(bad)", { XX
} },
2700 { "punpcklwd",{ MX
, EMd
} },
2701 { "(bad)", { XX
} },
2702 { "punpcklwd",{ MX
, EMq
} },
2703 { "(bad)", { XX
} },
2708 { "punpckldq",{ MX
, EMd
} },
2709 { "(bad)", { XX
} },
2710 { "punpckldq",{ MX
, EMq
} },
2711 { "(bad)", { XX
} },
2715 static const struct dis386 x86_64_table
[][2] = {
2717 { "pusha{P|}", { XX
} },
2718 { "(bad)", { XX
} },
2721 { "popa{P|}", { XX
} },
2722 { "(bad)", { XX
} },
2725 { "bound{S|}", { Gv
, Ma
} },
2726 { "(bad)", { XX
} },
2729 { "arpl", { Ew
, Gw
} },
2730 { "movs{||lq|xd}", { Gv
, Ed
} },
2734 static const struct dis386 three_byte_table
[][256] = {
2738 { "pshufb", { MX
, EM
} },
2739 { "phaddw", { MX
, EM
} },
2740 { "phaddd", { MX
, EM
} },
2741 { "phaddsw", { MX
, EM
} },
2742 { "pmaddubsw", { MX
, EM
} },
2743 { "phsubw", { MX
, EM
} },
2744 { "phsubd", { MX
, EM
} },
2745 { "phsubsw", { MX
, EM
} },
2747 { "psignb", { MX
, EM
} },
2748 { "psignw", { MX
, EM
} },
2749 { "psignd", { MX
, EM
} },
2750 { "pmulhrsw", { MX
, EM
} },
2751 { "(bad)", { XX
} },
2752 { "(bad)", { XX
} },
2753 { "(bad)", { XX
} },
2754 { "(bad)", { XX
} },
2757 { "(bad)", { XX
} },
2758 { "(bad)", { XX
} },
2759 { "(bad)", { XX
} },
2762 { "(bad)", { XX
} },
2765 { "(bad)", { XX
} },
2766 { "(bad)", { XX
} },
2767 { "(bad)", { XX
} },
2768 { "(bad)", { XX
} },
2769 { "pabsb", { MX
, EM
} },
2770 { "pabsw", { MX
, EM
} },
2771 { "pabsd", { MX
, EM
} },
2772 { "(bad)", { XX
} },
2780 { "(bad)", { XX
} },
2781 { "(bad)", { XX
} },
2787 { "(bad)", { XX
} },
2788 { "(bad)", { XX
} },
2789 { "(bad)", { XX
} },
2790 { "(bad)", { XX
} },
2798 { "(bad)", { XX
} },
2812 { "(bad)", { XX
} },
2813 { "(bad)", { XX
} },
2814 { "(bad)", { XX
} },
2815 { "(bad)", { XX
} },
2816 { "(bad)", { XX
} },
2817 { "(bad)", { XX
} },
2819 { "(bad)", { XX
} },
2820 { "(bad)", { XX
} },
2821 { "(bad)", { XX
} },
2822 { "(bad)", { XX
} },
2823 { "(bad)", { XX
} },
2824 { "(bad)", { XX
} },
2825 { "(bad)", { XX
} },
2826 { "(bad)", { XX
} },
2828 { "(bad)", { XX
} },
2829 { "(bad)", { XX
} },
2830 { "(bad)", { XX
} },
2831 { "(bad)", { XX
} },
2832 { "(bad)", { XX
} },
2833 { "(bad)", { XX
} },
2834 { "(bad)", { XX
} },
2835 { "(bad)", { XX
} },
2837 { "(bad)", { XX
} },
2838 { "(bad)", { XX
} },
2839 { "(bad)", { XX
} },
2840 { "(bad)", { XX
} },
2841 { "(bad)", { XX
} },
2842 { "(bad)", { XX
} },
2843 { "(bad)", { XX
} },
2844 { "(bad)", { XX
} },
2846 { "(bad)", { XX
} },
2847 { "(bad)", { XX
} },
2848 { "(bad)", { XX
} },
2849 { "(bad)", { XX
} },
2850 { "(bad)", { XX
} },
2851 { "(bad)", { XX
} },
2852 { "(bad)", { XX
} },
2853 { "(bad)", { XX
} },
2855 { "(bad)", { XX
} },
2856 { "(bad)", { XX
} },
2857 { "(bad)", { XX
} },
2858 { "(bad)", { XX
} },
2859 { "(bad)", { XX
} },
2860 { "(bad)", { XX
} },
2861 { "(bad)", { XX
} },
2862 { "(bad)", { XX
} },
2864 { "(bad)", { XX
} },
2865 { "(bad)", { XX
} },
2866 { "(bad)", { XX
} },
2867 { "(bad)", { XX
} },
2868 { "(bad)", { XX
} },
2869 { "(bad)", { XX
} },
2870 { "(bad)", { XX
} },
2871 { "(bad)", { XX
} },
2873 { "(bad)", { XX
} },
2874 { "(bad)", { XX
} },
2875 { "(bad)", { XX
} },
2876 { "(bad)", { XX
} },
2877 { "(bad)", { XX
} },
2878 { "(bad)", { XX
} },
2879 { "(bad)", { XX
} },
2880 { "(bad)", { XX
} },
2882 { "(bad)", { XX
} },
2883 { "(bad)", { XX
} },
2884 { "(bad)", { XX
} },
2885 { "(bad)", { XX
} },
2886 { "(bad)", { XX
} },
2887 { "(bad)", { XX
} },
2888 { "(bad)", { XX
} },
2889 { "(bad)", { XX
} },
2891 { "(bad)", { XX
} },
2892 { "(bad)", { XX
} },
2893 { "(bad)", { XX
} },
2894 { "(bad)", { XX
} },
2895 { "(bad)", { XX
} },
2896 { "(bad)", { XX
} },
2897 { "(bad)", { XX
} },
2898 { "(bad)", { XX
} },
2900 { "(bad)", { XX
} },
2901 { "(bad)", { XX
} },
2902 { "(bad)", { XX
} },
2903 { "(bad)", { XX
} },
2904 { "(bad)", { XX
} },
2905 { "(bad)", { XX
} },
2906 { "(bad)", { XX
} },
2907 { "(bad)", { XX
} },
2909 { "(bad)", { XX
} },
2910 { "(bad)", { XX
} },
2911 { "(bad)", { XX
} },
2912 { "(bad)", { XX
} },
2913 { "(bad)", { XX
} },
2914 { "(bad)", { XX
} },
2915 { "(bad)", { XX
} },
2916 { "(bad)", { XX
} },
2918 { "(bad)", { XX
} },
2919 { "(bad)", { XX
} },
2920 { "(bad)", { XX
} },
2921 { "(bad)", { XX
} },
2922 { "(bad)", { XX
} },
2923 { "(bad)", { XX
} },
2924 { "(bad)", { XX
} },
2925 { "(bad)", { XX
} },
2927 { "(bad)", { XX
} },
2928 { "(bad)", { XX
} },
2929 { "(bad)", { XX
} },
2930 { "(bad)", { XX
} },
2931 { "(bad)", { XX
} },
2932 { "(bad)", { XX
} },
2933 { "(bad)", { XX
} },
2934 { "(bad)", { XX
} },
2936 { "(bad)", { XX
} },
2937 { "(bad)", { XX
} },
2938 { "(bad)", { XX
} },
2939 { "(bad)", { XX
} },
2940 { "(bad)", { XX
} },
2941 { "(bad)", { XX
} },
2942 { "(bad)", { XX
} },
2943 { "(bad)", { XX
} },
2945 { "(bad)", { XX
} },
2946 { "(bad)", { XX
} },
2947 { "(bad)", { XX
} },
2948 { "(bad)", { XX
} },
2949 { "(bad)", { XX
} },
2950 { "(bad)", { XX
} },
2951 { "(bad)", { XX
} },
2952 { "(bad)", { XX
} },
2954 { "(bad)", { XX
} },
2955 { "(bad)", { XX
} },
2956 { "(bad)", { XX
} },
2957 { "(bad)", { XX
} },
2958 { "(bad)", { XX
} },
2959 { "(bad)", { XX
} },
2960 { "(bad)", { XX
} },
2961 { "(bad)", { XX
} },
2963 { "(bad)", { XX
} },
2964 { "(bad)", { XX
} },
2965 { "(bad)", { XX
} },
2966 { "(bad)", { XX
} },
2967 { "(bad)", { XX
} },
2968 { "(bad)", { XX
} },
2969 { "(bad)", { XX
} },
2970 { "(bad)", { XX
} },
2972 { "(bad)", { XX
} },
2973 { "(bad)", { XX
} },
2974 { "(bad)", { XX
} },
2975 { "(bad)", { XX
} },
2976 { "(bad)", { XX
} },
2977 { "(bad)", { XX
} },
2978 { "(bad)", { XX
} },
2979 { "(bad)", { XX
} },
2981 { "(bad)", { XX
} },
2982 { "(bad)", { XX
} },
2983 { "(bad)", { XX
} },
2984 { "(bad)", { XX
} },
2985 { "(bad)", { XX
} },
2986 { "(bad)", { XX
} },
2987 { "(bad)", { XX
} },
2988 { "(bad)", { XX
} },
2990 { "(bad)", { XX
} },
2991 { "(bad)", { XX
} },
2992 { "(bad)", { XX
} },
2993 { "(bad)", { XX
} },
2994 { "(bad)", { XX
} },
2995 { "(bad)", { XX
} },
2996 { "(bad)", { XX
} },
2997 { "(bad)", { XX
} },
2999 { "(bad)", { XX
} },
3000 { "(bad)", { XX
} },
3001 { "(bad)", { XX
} },
3002 { "(bad)", { XX
} },
3003 { "(bad)", { XX
} },
3004 { "(bad)", { XX
} },
3005 { "(bad)", { XX
} },
3006 { "(bad)", { XX
} },
3010 { "(bad)", { XX
} },
3011 { "(bad)", { XX
} },
3012 { "(bad)", { XX
} },
3013 { "(bad)", { XX
} },
3014 { "(bad)", { XX
} },
3015 { "(bad)", { XX
} },
3017 { "(bad)", { XX
} },
3018 { "(bad)", { XX
} },
3019 { "(bad)", { XX
} },
3020 { "(bad)", { XX
} },
3021 { "(bad)", { XX
} },
3022 { "(bad)", { XX
} },
3023 { "(bad)", { XX
} },
3024 { "(bad)", { XX
} },
3029 { "(bad)", { XX
} },
3030 { "(bad)", { XX
} },
3031 { "(bad)", { XX
} },
3032 { "(bad)", { XX
} },
3033 { "(bad)", { XX
} },
3034 { "(bad)", { XX
} },
3035 { "(bad)", { XX
} },
3036 { "(bad)", { XX
} },
3045 { "palignr", { MX
, EM
, Ib
} },
3047 { "(bad)", { XX
} },
3048 { "(bad)", { XX
} },
3049 { "(bad)", { XX
} },
3050 { "(bad)", { XX
} },
3056 { "(bad)", { XX
} },
3057 { "(bad)", { XX
} },
3058 { "(bad)", { XX
} },
3059 { "(bad)", { XX
} },
3060 { "(bad)", { XX
} },
3061 { "(bad)", { XX
} },
3062 { "(bad)", { XX
} },
3063 { "(bad)", { XX
} },
3068 { "(bad)", { XX
} },
3069 { "(bad)", { XX
} },
3070 { "(bad)", { XX
} },
3071 { "(bad)", { XX
} },
3072 { "(bad)", { XX
} },
3074 { "(bad)", { XX
} },
3075 { "(bad)", { XX
} },
3076 { "(bad)", { XX
} },
3077 { "(bad)", { XX
} },
3078 { "(bad)", { XX
} },
3079 { "(bad)", { XX
} },
3080 { "(bad)", { XX
} },
3081 { "(bad)", { XX
} },
3083 { "(bad)", { XX
} },
3084 { "(bad)", { XX
} },
3085 { "(bad)", { XX
} },
3086 { "(bad)", { XX
} },
3087 { "(bad)", { XX
} },
3088 { "(bad)", { XX
} },
3089 { "(bad)", { XX
} },
3090 { "(bad)", { XX
} },
3092 { "(bad)", { XX
} },
3093 { "(bad)", { XX
} },
3094 { "(bad)", { XX
} },
3095 { "(bad)", { XX
} },
3096 { "(bad)", { XX
} },
3097 { "(bad)", { XX
} },
3098 { "(bad)", { XX
} },
3099 { "(bad)", { XX
} },
3104 { "(bad)", { XX
} },
3105 { "(bad)", { XX
} },
3106 { "(bad)", { XX
} },
3107 { "(bad)", { XX
} },
3108 { "(bad)", { XX
} },
3110 { "(bad)", { XX
} },
3111 { "(bad)", { XX
} },
3112 { "(bad)", { XX
} },
3113 { "(bad)", { XX
} },
3114 { "(bad)", { XX
} },
3115 { "(bad)", { XX
} },
3116 { "(bad)", { XX
} },
3117 { "(bad)", { XX
} },
3119 { "(bad)", { XX
} },
3120 { "(bad)", { XX
} },
3121 { "(bad)", { XX
} },
3122 { "(bad)", { XX
} },
3123 { "(bad)", { XX
} },
3124 { "(bad)", { XX
} },
3125 { "(bad)", { XX
} },
3126 { "(bad)", { XX
} },
3128 { "(bad)", { XX
} },
3129 { "(bad)", { XX
} },
3130 { "(bad)", { XX
} },
3131 { "(bad)", { XX
} },
3132 { "(bad)", { XX
} },
3133 { "(bad)", { XX
} },
3134 { "(bad)", { XX
} },
3135 { "(bad)", { XX
} },
3141 { "(bad)", { XX
} },
3142 { "(bad)", { XX
} },
3143 { "(bad)", { XX
} },
3144 { "(bad)", { XX
} },
3146 { "(bad)", { XX
} },
3147 { "(bad)", { XX
} },
3148 { "(bad)", { XX
} },
3149 { "(bad)", { XX
} },
3150 { "(bad)", { XX
} },
3151 { "(bad)", { XX
} },
3152 { "(bad)", { XX
} },
3153 { "(bad)", { XX
} },
3155 { "(bad)", { XX
} },
3156 { "(bad)", { XX
} },
3157 { "(bad)", { XX
} },
3158 { "(bad)", { XX
} },
3159 { "(bad)", { XX
} },
3160 { "(bad)", { XX
} },
3161 { "(bad)", { XX
} },
3162 { "(bad)", { XX
} },
3164 { "(bad)", { XX
} },
3165 { "(bad)", { XX
} },
3166 { "(bad)", { XX
} },
3167 { "(bad)", { XX
} },
3168 { "(bad)", { XX
} },
3169 { "(bad)", { XX
} },
3170 { "(bad)", { XX
} },
3171 { "(bad)", { XX
} },
3173 { "(bad)", { XX
} },
3174 { "(bad)", { XX
} },
3175 { "(bad)", { XX
} },
3176 { "(bad)", { XX
} },
3177 { "(bad)", { XX
} },
3178 { "(bad)", { XX
} },
3179 { "(bad)", { XX
} },
3180 { "(bad)", { XX
} },
3182 { "(bad)", { XX
} },
3183 { "(bad)", { XX
} },
3184 { "(bad)", { XX
} },
3185 { "(bad)", { XX
} },
3186 { "(bad)", { XX
} },
3187 { "(bad)", { XX
} },
3188 { "(bad)", { XX
} },
3189 { "(bad)", { XX
} },
3191 { "(bad)", { XX
} },
3192 { "(bad)", { XX
} },
3193 { "(bad)", { XX
} },
3194 { "(bad)", { XX
} },
3195 { "(bad)", { XX
} },
3196 { "(bad)", { XX
} },
3197 { "(bad)", { XX
} },
3198 { "(bad)", { XX
} },
3200 { "(bad)", { XX
} },
3201 { "(bad)", { XX
} },
3202 { "(bad)", { XX
} },
3203 { "(bad)", { XX
} },
3204 { "(bad)", { XX
} },
3205 { "(bad)", { XX
} },
3206 { "(bad)", { XX
} },
3207 { "(bad)", { XX
} },
3209 { "(bad)", { XX
} },
3210 { "(bad)", { XX
} },
3211 { "(bad)", { XX
} },
3212 { "(bad)", { XX
} },
3213 { "(bad)", { XX
} },
3214 { "(bad)", { XX
} },
3215 { "(bad)", { XX
} },
3216 { "(bad)", { XX
} },
3218 { "(bad)", { XX
} },
3219 { "(bad)", { XX
} },
3220 { "(bad)", { XX
} },
3221 { "(bad)", { XX
} },
3222 { "(bad)", { XX
} },
3223 { "(bad)", { XX
} },
3224 { "(bad)", { XX
} },
3225 { "(bad)", { XX
} },
3227 { "(bad)", { XX
} },
3228 { "(bad)", { XX
} },
3229 { "(bad)", { XX
} },
3230 { "(bad)", { XX
} },
3231 { "(bad)", { XX
} },
3232 { "(bad)", { XX
} },
3233 { "(bad)", { XX
} },
3234 { "(bad)", { XX
} },
3236 { "(bad)", { XX
} },
3237 { "(bad)", { XX
} },
3238 { "(bad)", { XX
} },
3239 { "(bad)", { XX
} },
3240 { "(bad)", { XX
} },
3241 { "(bad)", { XX
} },
3242 { "(bad)", { XX
} },
3243 { "(bad)", { XX
} },
3245 { "(bad)", { XX
} },
3246 { "(bad)", { XX
} },
3247 { "(bad)", { XX
} },
3248 { "(bad)", { XX
} },
3249 { "(bad)", { XX
} },
3250 { "(bad)", { XX
} },
3251 { "(bad)", { XX
} },
3252 { "(bad)", { XX
} },
3254 { "(bad)", { XX
} },
3255 { "(bad)", { XX
} },
3256 { "(bad)", { XX
} },
3257 { "(bad)", { XX
} },
3258 { "(bad)", { XX
} },
3259 { "(bad)", { XX
} },
3260 { "(bad)", { XX
} },
3261 { "(bad)", { XX
} },
3263 { "(bad)", { XX
} },
3264 { "(bad)", { XX
} },
3265 { "(bad)", { XX
} },
3266 { "(bad)", { XX
} },
3267 { "(bad)", { XX
} },
3268 { "(bad)", { XX
} },
3269 { "(bad)", { XX
} },
3270 { "(bad)", { XX
} },
3272 { "(bad)", { XX
} },
3273 { "(bad)", { XX
} },
3274 { "(bad)", { XX
} },
3275 { "(bad)", { XX
} },
3276 { "(bad)", { XX
} },
3277 { "(bad)", { XX
} },
3278 { "(bad)", { XX
} },
3279 { "(bad)", { XX
} },
3281 { "(bad)", { XX
} },
3282 { "(bad)", { XX
} },
3283 { "(bad)", { XX
} },
3284 { "(bad)", { XX
} },
3285 { "(bad)", { XX
} },
3286 { "(bad)", { XX
} },
3287 { "(bad)", { XX
} },
3288 { "(bad)", { XX
} },
3290 { "(bad)", { XX
} },
3291 { "(bad)", { XX
} },
3292 { "(bad)", { XX
} },
3293 { "(bad)", { XX
} },
3294 { "(bad)", { XX
} },
3295 { "(bad)", { XX
} },
3296 { "(bad)", { XX
} },
3297 { "(bad)", { XX
} },
3299 { "(bad)", { XX
} },
3300 { "(bad)", { XX
} },
3301 { "(bad)", { XX
} },
3302 { "(bad)", { XX
} },
3303 { "(bad)", { XX
} },
3304 { "(bad)", { XX
} },
3305 { "(bad)", { XX
} },
3306 { "(bad)", { XX
} },
3308 { "(bad)", { XX
} },
3309 { "(bad)", { XX
} },
3310 { "(bad)", { XX
} },
3311 { "(bad)", { XX
} },
3312 { "(bad)", { XX
} },
3313 { "(bad)", { XX
} },
3314 { "(bad)", { XX
} },
3315 { "(bad)", { XX
} },
3319 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
3331 fetch_data(the_info
, codep
+ 1);
3335 /* REX prefixes family. */
3352 if (address_mode
== mode_64bit
)
3358 prefixes
|= PREFIX_REPZ
;
3361 prefixes
|= PREFIX_REPNZ
;
3364 prefixes
|= PREFIX_LOCK
;
3367 prefixes
|= PREFIX_CS
;
3370 prefixes
|= PREFIX_SS
;
3373 prefixes
|= PREFIX_DS
;
3376 prefixes
|= PREFIX_ES
;
3379 prefixes
|= PREFIX_FS
;
3382 prefixes
|= PREFIX_GS
;
3385 prefixes
|= PREFIX_DATA
;
3388 prefixes
|= PREFIX_ADDR
;
3391 /* fwait is really an instruction. If there are prefixes
3392 before the fwait, they belong to the fwait, *not* to the
3393 following instruction. */
3394 if (prefixes
|| rex
)
3396 prefixes
|= PREFIX_FWAIT
;
3400 prefixes
= PREFIX_FWAIT
;
3405 /* Rex is ignored when followed by another prefix. */
3416 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
3420 prefix_name (int pref
, int sizeflag
)
3422 static const char * const rexes
[16] =
3427 "rex.XB", /* 0x43 */
3429 "rex.RB", /* 0x45 */
3430 "rex.RX", /* 0x46 */
3431 "rex.RXB", /* 0x47 */
3433 "rex.WB", /* 0x49 */
3434 "rex.WX", /* 0x4a */
3435 "rex.WXB", /* 0x4b */
3436 "rex.WR", /* 0x4c */
3437 "rex.WRB", /* 0x4d */
3438 "rex.WRX", /* 0x4e */
3439 "rex.WRXB", /* 0x4f */
3444 /* REX prefixes family. */
3461 return rexes
[pref
- 0x40];
3481 return (sizeflag
& DFLAG
) ? "data16" : "data32";
3483 if (address_mode
== mode_64bit
)
3484 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
3486 return (sizeflag
& AFLAG
) ? "addr16" : "addr32";
3494 static char op_out
[MAX_OPERANDS
][100];
3495 static int op_ad
, op_index
[MAX_OPERANDS
];
3496 static int two_source_ops
;
3497 static bfd_vma op_address
[MAX_OPERANDS
];
3498 static bfd_vma op_riprel
[MAX_OPERANDS
];
3499 static bfd_vma start_pc
;
3502 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3503 * (see topic "Redundant prefixes" in the "Differences from 8086"
3504 * section of the "Virtual 8086 Mode" chapter.)
3505 * 'pc' should be the address of this instruction, it will
3506 * be used to print the target address if this is a relative jump or call
3507 * The function returns the length of this instruction in bytes.
3510 static char intel_syntax
;
3511 static char open_char
;
3512 static char close_char
;
3513 static char separator_char
;
3514 static char scale_char
;
3517 print_insn_i386 (bfd_vma pc
, disassemble_info
*info
)
3521 return print_insn (pc
, info
);
3525 print_insn (bfd_vma pc
, disassemble_info
*info
)
3527 const struct dis386
*dp
;
3529 char *op_txt
[MAX_OPERANDS
];
3531 unsigned char uses_DATA_prefix
, uses_LOCK_prefix
;
3532 unsigned char uses_REPNZ_prefix
, uses_REPZ_prefix
;
3535 struct dis_private priv
;
3538 if (info
->mach
== bfd_mach_x86_64_intel_syntax
3539 || info
->mach
== bfd_mach_x86_64
)
3540 address_mode
= mode_64bit
;
3542 address_mode
= mode_32bit
;
3544 if (intel_syntax
== (char) -1)
3545 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
3546 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
3548 if (info
->mach
== bfd_mach_i386_i386
3549 || info
->mach
== bfd_mach_x86_64
3550 || info
->mach
== bfd_mach_i386_i386_intel_syntax
3551 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
3552 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3553 else if (info
->mach
== bfd_mach_i386_i8086
)
3554 priv
.orig_sizeflag
= 0;
3558 for (p
= info
->disassembler_options
; p
!= NULL
; )
3560 if (strncmp (p
, "x86-64", 6) == 0)
3562 address_mode
= mode_64bit
;
3563 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3565 else if (strncmp (p
, "i386", 4) == 0)
3567 address_mode
= mode_32bit
;
3568 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
3570 else if (strncmp (p
, "i8086", 5) == 0)
3572 address_mode
= mode_16bit
;
3573 priv
.orig_sizeflag
= 0;
3575 else if (strncmp (p
, "intel", 5) == 0)
3579 else if (strncmp (p
, "att", 3) == 0)
3583 else if (strncmp (p
, "addr", 4) == 0)
3585 if (address_mode
== mode_64bit
)
3587 if (p
[4] == '3' && p
[5] == '2')
3588 priv
.orig_sizeflag
&= ~AFLAG
;
3589 else if (p
[4] == '6' && p
[5] == '4')
3590 priv
.orig_sizeflag
|= AFLAG
;
3594 if (p
[4] == '1' && p
[5] == '6')
3595 priv
.orig_sizeflag
&= ~AFLAG
;
3596 else if (p
[4] == '3' && p
[5] == '2')
3597 priv
.orig_sizeflag
|= AFLAG
;
3600 else if (strncmp (p
, "data", 4) == 0)
3602 if (p
[4] == '1' && p
[5] == '6')
3603 priv
.orig_sizeflag
&= ~DFLAG
;
3604 else if (p
[4] == '3' && p
[5] == '2')
3605 priv
.orig_sizeflag
|= DFLAG
;
3607 else if (strncmp (p
, "suffix", 6) == 0)
3608 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
3610 p
= strchr (p
, ',');
3617 names64
= intel_names64
;
3618 names32
= intel_names32
;
3619 names16
= intel_names16
;
3620 names8
= intel_names8
;
3621 names8rex
= intel_names8rex
;
3622 names_seg
= intel_names_seg
;
3623 index16
= intel_index16
;
3626 separator_char
= '+';
3631 names64
= att_names64
;
3632 names32
= att_names32
;
3633 names16
= att_names16
;
3634 names8
= att_names8
;
3635 names8rex
= att_names8rex
;
3636 names_seg
= att_names_seg
;
3637 index16
= att_index16
;
3640 separator_char
= ',';
3644 /* The output looks better if we put 7 bytes on a line, since that
3645 puts most long word instructions on a single line. */
3646 info
->bytes_per_line
= 7;
3648 info
->private_data
= &priv
;
3649 priv
.max_fetched
= priv
.the_buffer
;
3650 priv
.insn_start
= pc
;
3653 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3661 start_codep
= priv
.the_buffer
;
3662 codep
= priv
.the_buffer
;
3664 if (setjmp (priv
.bailout
) != 0)
3668 /* Getting here means we tried for data but didn't get it. That
3669 means we have an incomplete instruction of some sort. Just
3670 print the first byte as a prefix or a .byte pseudo-op. */
3671 if (codep
> priv
.the_buffer
)
3673 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3675 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3678 /* Just print the first byte as a .byte instruction. */
3679 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
3680 (unsigned int) priv
.the_buffer
[0]);
3693 sizeflag
= priv
.orig_sizeflag
;
3695 fetch_data(info
, codep
+ 1);
3696 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
3698 if (((prefixes
& PREFIX_FWAIT
)
3699 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
3700 || (rex
&& rex_used
))
3704 /* fwait not followed by floating point instruction, or rex followed
3705 by other prefixes. Print the first prefix. */
3706 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3708 name
= INTERNAL_DISASSEMBLER_ERROR
;
3709 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3716 unsigned char threebyte
;
3717 fetch_data(info
, codep
+ 2);
3718 threebyte
= *++codep
;
3719 dp
= &dis386_twobyte
[threebyte
];
3720 need_modrm
= twobyte_has_modrm
[*codep
];
3721 uses_DATA_prefix
= twobyte_uses_DATA_prefix
[*codep
];
3722 uses_REPNZ_prefix
= twobyte_uses_REPNZ_prefix
[*codep
];
3723 uses_REPZ_prefix
= twobyte_uses_REPZ_prefix
[*codep
];
3724 uses_LOCK_prefix
= (*codep
& ~0x02) == 0x20;
3726 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3728 fetch_data(info
, codep
+ 2);
3733 uses_DATA_prefix
= threebyte_0x38_uses_DATA_prefix
[op
];
3734 uses_REPNZ_prefix
= threebyte_0x38_uses_REPNZ_prefix
[op
];
3735 uses_REPZ_prefix
= threebyte_0x38_uses_REPZ_prefix
[op
];
3738 uses_DATA_prefix
= threebyte_0x3a_uses_DATA_prefix
[op
];
3739 uses_REPNZ_prefix
= threebyte_0x3a_uses_REPNZ_prefix
[op
];
3740 uses_REPZ_prefix
= threebyte_0x3a_uses_REPZ_prefix
[op
];
3749 dp
= &dis386
[*codep
];
3750 need_modrm
= onebyte_has_modrm
[*codep
];
3751 uses_DATA_prefix
= 0;
3752 uses_REPNZ_prefix
= 0;
3753 /* pause is 0xf3 0x90. */
3754 uses_REPZ_prefix
= *codep
== 0x90;
3755 uses_LOCK_prefix
= 0;
3759 if (!uses_REPZ_prefix
&& (prefixes
& PREFIX_REPZ
))
3762 used_prefixes
|= PREFIX_REPZ
;
3764 if (!uses_REPNZ_prefix
&& (prefixes
& PREFIX_REPNZ
))
3767 used_prefixes
|= PREFIX_REPNZ
;
3770 if (!uses_LOCK_prefix
&& (prefixes
& PREFIX_LOCK
))
3773 used_prefixes
|= PREFIX_LOCK
;
3776 if (prefixes
& PREFIX_ADDR
)
3779 if (dp
->op
[2].bytemode
!= loop_jcxz_mode
|| intel_syntax
)
3781 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
3782 oappend ("addr32 ");
3784 oappend ("addr16 ");
3785 used_prefixes
|= PREFIX_ADDR
;
3789 if (!uses_DATA_prefix
&& (prefixes
& PREFIX_DATA
))
3792 if (dp
->op
[2].bytemode
== cond_jump_mode
3793 && dp
->op
[0].bytemode
== v_mode
3796 if (sizeflag
& DFLAG
)
3797 oappend ("data32 ");
3799 oappend ("data16 ");
3800 used_prefixes
|= PREFIX_DATA
;
3804 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== IS_3BYTE_OPCODE
)
3806 dp
= &three_byte_table
[dp
->op
[1].bytemode
][op
];
3807 modrm
.mod
= (*codep
>> 6) & 3;
3808 modrm
.reg
= (*codep
>> 3) & 7;
3809 modrm
.rm
= *codep
& 7;
3811 else if (need_modrm
)
3813 fetch_data(info
, codep
+ 1);
3814 modrm
.mod
= (*codep
>> 6) & 3;
3815 modrm
.reg
= (*codep
>> 3) & 7;
3816 modrm
.rm
= *codep
& 7;
3819 if (dp
->name
== NULL
&& dp
->op
[0].bytemode
== FLOATCODE
)
3826 if (dp
->name
== NULL
)
3828 switch (dp
->op
[0].bytemode
)
3831 dp
= &grps
[dp
->op
[1].bytemode
][modrm
.reg
];
3834 case USE_PREFIX_USER_TABLE
:
3836 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
3837 if (prefixes
& PREFIX_REPZ
)
3841 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3842 before PREFIX_DATA. */
3843 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
3844 if (prefixes
& PREFIX_REPNZ
)
3848 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3849 if (prefixes
& PREFIX_DATA
)
3853 dp
= &prefix_user_table
[dp
->op
[1].bytemode
][index
];
3856 case X86_64_SPECIAL
:
3857 index
= address_mode
== mode_64bit
? 1 : 0;
3858 dp
= &x86_64_table
[dp
->op
[1].bytemode
][index
];
3862 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3867 if (putop (dp
->name
, sizeflag
) == 0)
3869 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3872 op_ad
= MAX_OPERANDS
- 1 - i
;
3874 (*dp
->op
[i
].rtn
) (dp
->op
[i
].bytemode
, sizeflag
);
3879 /* See if any prefixes were not used. If so, print the first one
3880 separately. If we don't do this, we'll wind up printing an
3881 instruction stream which does not precisely correspond to the
3882 bytes we are disassembling. */
3883 if ((prefixes
& ~used_prefixes
) != 0)
3887 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
3889 name
= INTERNAL_DISASSEMBLER_ERROR
;
3890 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
3893 if (rex
& ~rex_used
)
3896 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
3898 name
= INTERNAL_DISASSEMBLER_ERROR
;
3899 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
3902 obufp
= obuf
+ strlen (obuf
);
3903 for (i
= strlen (obuf
); i
< 6; i
++)
3906 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
3908 /* The enter and bound instructions are printed with operands in the same
3909 order as the intel book; everything else is printed in reverse order. */
3910 if (intel_syntax
|| two_source_ops
)
3914 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3915 op_txt
[i
] = op_out
[i
];
3917 for (i
= 0; i
< (MAX_OPERANDS
>> 1); ++i
)
3919 op_ad
= op_index
[i
];
3920 op_index
[i
] = op_index
[MAX_OPERANDS
- 1 - i
];
3921 op_index
[MAX_OPERANDS
- 1 - i
] = op_ad
;
3922 riprel
= op_riprel
[i
];
3923 op_riprel
[i
] = op_riprel
[MAX_OPERANDS
- 1 - i
];
3924 op_riprel
[MAX_OPERANDS
- 1 - i
] = riprel
;
3929 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3930 op_txt
[MAX_OPERANDS
- 1 - i
] = op_out
[i
];
3934 for (i
= 0; i
< MAX_OPERANDS
; ++i
)
3938 (*info
->fprintf_func
) (info
->stream
, ",");
3939 if (op_index
[i
] != -1 && !op_riprel
[i
])
3940 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[i
]], info
);
3942 (*info
->fprintf_func
) (info
->stream
, "%s", op_txt
[i
]);
3946 for (i
= 0; i
< MAX_OPERANDS
; i
++)
3947 if (op_index
[i
] != -1 && op_riprel
[i
])
3949 (*info
->fprintf_func
) (info
->stream
, " # ");
3950 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
3951 + op_address
[op_index
[i
]]), info
);
3954 return codep
- priv
.the_buffer
;
3957 static const char *float_mem
[] = {
4032 static const unsigned char float_mem_mode
[] = {
4107 #define ST { OP_ST, 0 }
4108 #define STi { OP_STi, 0 }
4110 #define FGRPd9_2 NULL, { { NULL, 0 } }
4111 #define FGRPd9_4 NULL, { { NULL, 1 } }
4112 #define FGRPd9_5 NULL, { { NULL, 2 } }
4113 #define FGRPd9_6 NULL, { { NULL, 3 } }
4114 #define FGRPd9_7 NULL, { { NULL, 4 } }
4115 #define FGRPda_5 NULL, { { NULL, 5 } }
4116 #define FGRPdb_4 NULL, { { NULL, 6 } }
4117 #define FGRPde_3 NULL, { { NULL, 7 } }
4118 #define FGRPdf_4 NULL, { { NULL, 8 } }
4120 static const struct dis386 float_reg
[][8] = {
4123 { "fadd", { ST
, STi
} },
4124 { "fmul", { ST
, STi
} },
4125 { "fcom", { STi
} },
4126 { "fcomp", { STi
} },
4127 { "fsub", { ST
, STi
} },
4128 { "fsubr", { ST
, STi
} },
4129 { "fdiv", { ST
, STi
} },
4130 { "fdivr", { ST
, STi
} },
4135 { "fxch", { STi
} },
4137 { "(bad)", { XX
} },
4145 { "fcmovb", { ST
, STi
} },
4146 { "fcmove", { ST
, STi
} },
4147 { "fcmovbe",{ ST
, STi
} },
4148 { "fcmovu", { ST
, STi
} },
4149 { "(bad)", { XX
} },
4151 { "(bad)", { XX
} },
4152 { "(bad)", { XX
} },
4156 { "fcmovnb",{ ST
, STi
} },
4157 { "fcmovne",{ ST
, STi
} },
4158 { "fcmovnbe",{ ST
, STi
} },
4159 { "fcmovnu",{ ST
, STi
} },
4161 { "fucomi", { ST
, STi
} },
4162 { "fcomi", { ST
, STi
} },
4163 { "(bad)", { XX
} },
4167 { "fadd", { STi
, ST
} },
4168 { "fmul", { STi
, ST
} },
4169 { "(bad)", { XX
} },
4170 { "(bad)", { XX
} },
4172 { "fsub", { STi
, ST
} },
4173 { "fsubr", { STi
, ST
} },
4174 { "fdiv", { STi
, ST
} },
4175 { "fdivr", { STi
, ST
} },
4177 { "fsubr", { STi
, ST
} },
4178 { "fsub", { STi
, ST
} },
4179 { "fdivr", { STi
, ST
} },
4180 { "fdiv", { STi
, ST
} },
4185 { "ffree", { STi
} },
4186 { "(bad)", { XX
} },
4188 { "fstp", { STi
} },
4189 { "fucom", { STi
} },
4190 { "fucomp", { STi
} },
4191 { "(bad)", { XX
} },
4192 { "(bad)", { XX
} },
4196 { "faddp", { STi
, ST
} },
4197 { "fmulp", { STi
, ST
} },
4198 { "(bad)", { XX
} },
4201 { "fsubp", { STi
, ST
} },
4202 { "fsubrp", { STi
, ST
} },
4203 { "fdivp", { STi
, ST
} },
4204 { "fdivrp", { STi
, ST
} },
4206 { "fsubrp", { STi
, ST
} },
4207 { "fsubp", { STi
, ST
} },
4208 { "fdivrp", { STi
, ST
} },
4209 { "fdivp", { STi
, ST
} },
4214 { "ffreep", { STi
} },
4215 { "(bad)", { XX
} },
4216 { "(bad)", { XX
} },
4217 { "(bad)", { XX
} },
4219 { "fucomip", { ST
, STi
} },
4220 { "fcomip", { ST
, STi
} },
4221 { "(bad)", { XX
} },
4225 static const char *fgrps
[][8] = {
4228 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4233 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4238 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4243 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4248 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4253 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4258 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4259 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4264 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4269 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4274 dofloat (int sizeflag
)
4276 const struct dis386
*dp
;
4277 unsigned char floatop
;
4279 floatop
= codep
[-1];
4283 int fp_indx
= (floatop
- 0xd8) * 8 + modrm
.reg
;
4285 putop (float_mem
[fp_indx
], sizeflag
);
4288 OP_E (float_mem_mode
[fp_indx
], sizeflag
);
4291 /* Skip mod/rm byte. */
4295 dp
= &float_reg
[floatop
- 0xd8][modrm
.reg
];
4296 if (dp
->name
== NULL
)
4298 putop (fgrps
[dp
->op
[0].bytemode
][modrm
.rm
], sizeflag
);
4300 /* Instruction fnstsw is only one with strange arg. */
4301 if (floatop
== 0xdf && codep
[-1] == 0xe0)
4302 pstrcpy (op_out
[0], sizeof(op_out
[0]), names16
[0]);
4306 putop (dp
->name
, sizeflag
);
4311 (*dp
->op
[0].rtn
) (dp
->op
[0].bytemode
, sizeflag
);
4316 (*dp
->op
[1].rtn
) (dp
->op
[1].bytemode
, sizeflag
);
4321 OP_ST (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4323 oappend ("%st" + intel_syntax
);
4327 OP_STi (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
4329 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%st(%d)", modrm
.rm
);
4330 oappend (scratchbuf
+ intel_syntax
);
4333 /* Capital letters in template are macros. */
4335 putop (const char *template, int sizeflag
)
4340 for (p
= template; *p
; p
++)
4351 if (address_mode
== mode_64bit
)
4359 /* Alternative not valid. */
4360 pstrcpy (obuf
, sizeof(obuf
), "(bad)");
4364 else if (*p
== '\0')
4385 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4391 if (sizeflag
& SUFFIX_ALWAYS
)
4395 if (intel_syntax
&& !alt
)
4397 if ((prefixes
& PREFIX_DATA
) || (sizeflag
& SUFFIX_ALWAYS
))
4399 if (sizeflag
& DFLAG
)
4400 *obufp
++ = intel_syntax
? 'd' : 'l';
4402 *obufp
++ = intel_syntax
? 'w' : 's';
4403 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4407 if (intel_syntax
|| !(sizeflag
& SUFFIX_ALWAYS
))
4414 else if (sizeflag
& DFLAG
)
4415 *obufp
++ = intel_syntax
? 'd' : 'l';
4418 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4423 case 'E': /* For jcxz/jecxz */
4424 if (address_mode
== mode_64bit
)
4426 if (sizeflag
& AFLAG
)
4432 if (sizeflag
& AFLAG
)
4434 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4439 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
4441 if (sizeflag
& AFLAG
)
4442 *obufp
++ = address_mode
== mode_64bit
? 'q' : 'l';
4444 *obufp
++ = address_mode
== mode_64bit
? 'l' : 'w';
4445 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
4449 if (intel_syntax
|| (obufp
[-1] != 's' && !(sizeflag
& SUFFIX_ALWAYS
)))
4451 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4456 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4461 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
4462 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
4464 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
4467 if (prefixes
& PREFIX_DS
)
4488 if (address_mode
== mode_64bit
&& (sizeflag
& SUFFIX_ALWAYS
))
4497 if (sizeflag
& SUFFIX_ALWAYS
)
4501 if ((prefixes
& PREFIX_FWAIT
) == 0)
4504 used_prefixes
|= PREFIX_FWAIT
;
4510 else if (intel_syntax
&& (sizeflag
& DFLAG
))
4515 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4520 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4529 if ((prefixes
& PREFIX_DATA
)
4531 || (sizeflag
& SUFFIX_ALWAYS
))
4538 if (sizeflag
& DFLAG
)
4543 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4549 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4551 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4557 if (intel_syntax
&& !alt
)
4560 if (modrm
.mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
4566 if (sizeflag
& DFLAG
)
4567 *obufp
++ = intel_syntax
? 'd' : 'l';
4571 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4578 else if (sizeflag
& DFLAG
)
4587 if (intel_syntax
&& !p
[1]
4588 && ((rex
& REX_W
) || (sizeflag
& DFLAG
)))
4591 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4596 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4598 if (sizeflag
& SUFFIX_ALWAYS
)
4606 if (sizeflag
& SUFFIX_ALWAYS
)
4612 if (sizeflag
& DFLAG
)
4616 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4621 if (prefixes
& PREFIX_DATA
)
4625 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4636 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
4638 /* operand size flag for cwtl, cbtw */
4647 else if (sizeflag
& DFLAG
)
4652 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4662 oappend (const char *s
)
4665 obufp
+= strlen (s
);
4671 if (prefixes
& PREFIX_CS
)
4673 used_prefixes
|= PREFIX_CS
;
4674 oappend ("%cs:" + intel_syntax
);
4676 if (prefixes
& PREFIX_DS
)
4678 used_prefixes
|= PREFIX_DS
;
4679 oappend ("%ds:" + intel_syntax
);
4681 if (prefixes
& PREFIX_SS
)
4683 used_prefixes
|= PREFIX_SS
;
4684 oappend ("%ss:" + intel_syntax
);
4686 if (prefixes
& PREFIX_ES
)
4688 used_prefixes
|= PREFIX_ES
;
4689 oappend ("%es:" + intel_syntax
);
4691 if (prefixes
& PREFIX_FS
)
4693 used_prefixes
|= PREFIX_FS
;
4694 oappend ("%fs:" + intel_syntax
);
4696 if (prefixes
& PREFIX_GS
)
4698 used_prefixes
|= PREFIX_GS
;
4699 oappend ("%gs:" + intel_syntax
);
4704 OP_indirE (int bytemode
, int sizeflag
)
4708 OP_E (bytemode
, sizeflag
);
4712 print_operand_value (char *buf
, size_t bufsize
, int hex
, bfd_vma disp
)
4714 if (address_mode
== mode_64bit
)
4722 snprintf_vma (tmp
, sizeof(tmp
), disp
);
4723 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
4724 pstrcpy (buf
+ 2, bufsize
- 2, tmp
+ i
);
4728 bfd_signed_vma v
= disp
;
4735 /* Check for possible overflow on 0x8000000000000000. */
4738 pstrcpy (buf
, bufsize
, "9223372036854775808");
4744 pstrcpy (buf
, bufsize
, "0");
4752 tmp
[28 - i
] = (v
% 10) + '0';
4756 pstrcpy (buf
, bufsize
, tmp
+ 29 - i
);
4762 snprintf (buf
, bufsize
, "0x%x", (unsigned int) disp
);
4764 snprintf (buf
, bufsize
, "%d", (int) disp
);
4768 /* Put DISP in BUF as signed hex number. */
4771 print_displacement (char *buf
, bfd_vma disp
)
4773 bfd_signed_vma val
= disp
;
4782 /* Check for possible overflow. */
4785 switch (address_mode
)
4788 strcpy (buf
+ j
, "0x8000000000000000");
4791 strcpy (buf
+ j
, "0x80000000");
4794 strcpy (buf
+ j
, "0x8000");
4804 snprintf_vma (tmp
, sizeof(tmp
), val
);
4805 for (i
= 0; tmp
[i
] == '0'; i
++)
4809 strcpy (buf
+ j
, tmp
+ i
);
4813 intel_operand_size (int bytemode
, int sizeflag
)
4819 oappend ("BYTE PTR ");
4823 oappend ("WORD PTR ");
4826 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4828 oappend ("QWORD PTR ");
4829 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4837 oappend ("QWORD PTR ");
4838 else if ((sizeflag
& DFLAG
) || bytemode
== dq_mode
)
4839 oappend ("DWORD PTR ");
4841 oappend ("WORD PTR ");
4842 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4845 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
4847 oappend ("WORD PTR ");
4849 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4853 oappend ("DWORD PTR ");
4856 oappend ("QWORD PTR ");
4859 if (address_mode
== mode_64bit
)
4860 oappend ("QWORD PTR ");
4862 oappend ("DWORD PTR ");
4865 if (sizeflag
& DFLAG
)
4866 oappend ("FWORD PTR ");
4868 oappend ("DWORD PTR ");
4869 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4872 oappend ("TBYTE PTR ");
4875 oappend ("XMMWORD PTR ");
4878 oappend ("OWORD PTR ");
4886 OP_E (int bytemode
, int sizeflag
)
4895 /* Skip mod/rm byte. */
4906 oappend (names8rex
[modrm
.rm
+ add
]);
4908 oappend (names8
[modrm
.rm
+ add
]);
4911 oappend (names16
[modrm
.rm
+ add
]);
4914 oappend (names32
[modrm
.rm
+ add
]);
4917 oappend (names64
[modrm
.rm
+ add
]);
4920 if (address_mode
== mode_64bit
)
4921 oappend (names64
[modrm
.rm
+ add
]);
4923 oappend (names32
[modrm
.rm
+ add
]);
4926 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
4928 oappend (names64
[modrm
.rm
+ add
]);
4929 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4941 oappend (names64
[modrm
.rm
+ add
]);
4942 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
4943 oappend (names32
[modrm
.rm
+ add
]);
4945 oappend (names16
[modrm
.rm
+ add
]);
4946 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4951 oappend (INTERNAL_DISASSEMBLER_ERROR
);
4959 intel_operand_size (bytemode
, sizeflag
);
4962 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
4964 /* 32/64 bit address mode */
4979 fetch_data(the_info
, codep
+ 1);
4980 index
= (*codep
>> 3) & 7;
4981 if (address_mode
== mode_64bit
|| index
!= 0x4)
4982 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4983 scale
= (*codep
>> 6) & 3;
4995 if ((base
& 7) == 5)
4998 if (address_mode
== mode_64bit
&& !havesib
)
5004 fetch_data (the_info
, codep
+ 1);
5006 if ((disp
& 0x80) != 0)
5014 havedisp
= havebase
|| (havesib
&& (index
!= 4 || scale
!= 0));
5017 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5019 if (havedisp
|| riprel
)
5020 print_displacement (scratchbuf
, disp
);
5022 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5023 oappend (scratchbuf
);
5031 if (havedisp
|| (intel_syntax
&& riprel
))
5033 *obufp
++ = open_char
;
5034 if (intel_syntax
&& riprel
)
5041 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5042 ? names64
[base
] : names32
[base
]);
5047 if (!intel_syntax
|| havebase
)
5049 *obufp
++ = separator_char
;
5052 oappend (address_mode
== mode_64bit
&& (sizeflag
& AFLAG
)
5053 ? names64
[index
] : names32
[index
]);
5055 if (scale
!= 0 || (!intel_syntax
&& index
!= 4))
5057 *obufp
++ = scale_char
;
5059 snprintf (scratchbuf
, sizeof(scratchbuf
), "%d", 1 << scale
);
5060 oappend (scratchbuf
);
5064 && (disp
|| modrm
.mod
!= 0 || (base
& 7) == 5))
5066 if ((bfd_signed_vma
) disp
>= 0)
5071 else if (modrm
.mod
!= 1)
5075 disp
= - (bfd_signed_vma
) disp
;
5078 print_displacement (scratchbuf
, disp
);
5079 oappend (scratchbuf
);
5082 *obufp
++ = close_char
;
5085 else if (intel_syntax
)
5087 if (modrm
.mod
!= 0 || (base
& 7) == 5)
5089 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5090 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5094 oappend (names_seg
[ds_reg
- es_reg
]);
5097 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5098 oappend (scratchbuf
);
5103 { /* 16 bit address mode */
5110 if ((disp
& 0x8000) != 0)
5115 fetch_data(the_info
, codep
+ 1);
5117 if ((disp
& 0x80) != 0)
5122 if ((disp
& 0x8000) != 0)
5128 if (modrm
.mod
!= 0 || modrm
.rm
== 6)
5130 print_displacement (scratchbuf
, disp
);
5131 oappend (scratchbuf
);
5134 if (modrm
.mod
!= 0 || modrm
.rm
!= 6)
5136 *obufp
++ = open_char
;
5138 oappend (index16
[modrm
.rm
]);
5140 && (disp
|| modrm
.mod
!= 0 || modrm
.rm
== 6))
5142 if ((bfd_signed_vma
) disp
>= 0)
5147 else if (modrm
.mod
!= 1)
5151 disp
= - (bfd_signed_vma
) disp
;
5154 print_displacement (scratchbuf
, disp
);
5155 oappend (scratchbuf
);
5158 *obufp
++ = close_char
;
5161 else if (intel_syntax
)
5163 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5164 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
5168 oappend (names_seg
[ds_reg
- es_reg
]);
5171 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1,
5173 oappend (scratchbuf
);
5179 OP_G (int bytemode
, int sizeflag
)
5190 oappend (names8rex
[modrm
.reg
+ add
]);
5192 oappend (names8
[modrm
.reg
+ add
]);
5195 oappend (names16
[modrm
.reg
+ add
]);
5198 oappend (names32
[modrm
.reg
+ add
]);
5201 oappend (names64
[modrm
.reg
+ add
]);
5210 oappend (names64
[modrm
.reg
+ add
]);
5211 else if ((sizeflag
& DFLAG
) || bytemode
!= v_mode
)
5212 oappend (names32
[modrm
.reg
+ add
]);
5214 oappend (names16
[modrm
.reg
+ add
]);
5215 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5218 if (address_mode
== mode_64bit
)
5219 oappend (names64
[modrm
.reg
+ add
]);
5221 oappend (names32
[modrm
.reg
+ add
]);
5224 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5237 fetch_data(the_info
, codep
+ 8);
5238 a
= *codep
++ & 0xff;
5239 a
|= (*codep
++ & 0xff) << 8;
5240 a
|= (*codep
++ & 0xff) << 16;
5241 a
|= (*codep
++ & 0xff) << 24;
5242 b
= *codep
++ & 0xff;
5243 b
|= (*codep
++ & 0xff) << 8;
5244 b
|= (*codep
++ & 0xff) << 16;
5245 b
|= (*codep
++ & 0xff) << 24;
5246 x
= a
+ ((bfd_vma
) b
<< 32);
5254 static bfd_signed_vma
5257 bfd_signed_vma x
= 0;
5259 fetch_data(the_info
, codep
+ 4);
5260 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5261 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5262 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5263 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5267 static bfd_signed_vma
5270 bfd_signed_vma x
= 0;
5272 fetch_data(the_info
, codep
+ 4);
5273 x
= *codep
++ & (bfd_signed_vma
) 0xff;
5274 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
5275 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
5276 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
5278 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
5288 fetch_data(the_info
, codep
+ 2);
5289 x
= *codep
++ & 0xff;
5290 x
|= (*codep
++ & 0xff) << 8;
5295 set_op (bfd_vma op
, int riprel
)
5297 op_index
[op_ad
] = op_ad
;
5298 if (address_mode
== mode_64bit
)
5300 op_address
[op_ad
] = op
;
5301 op_riprel
[op_ad
] = riprel
;
5305 /* Mask to get a 32-bit address. */
5306 op_address
[op_ad
] = op
& 0xffffffff;
5307 op_riprel
[op_ad
] = riprel
& 0xffffffff;
5312 OP_REG (int code
, int sizeflag
)
5322 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5323 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5324 s
= names16
[code
- ax_reg
+ add
];
5326 case es_reg
: case ss_reg
: case cs_reg
:
5327 case ds_reg
: case fs_reg
: case gs_reg
:
5328 s
= names_seg
[code
- es_reg
+ add
];
5330 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5331 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5334 s
= names8rex
[code
- al_reg
+ add
];
5336 s
= names8
[code
- al_reg
];
5338 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
5339 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
5340 if (address_mode
== mode_64bit
&& (sizeflag
& DFLAG
))
5342 s
= names64
[code
- rAX_reg
+ add
];
5345 code
+= eAX_reg
- rAX_reg
;
5347 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5348 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5351 s
= names64
[code
- eAX_reg
+ add
];
5352 else if (sizeflag
& DFLAG
)
5353 s
= names32
[code
- eAX_reg
+ add
];
5355 s
= names16
[code
- eAX_reg
+ add
];
5356 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5359 s
= INTERNAL_DISASSEMBLER_ERROR
;
5366 OP_IMREG (int code
, int sizeflag
)
5378 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
5379 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
5380 s
= names16
[code
- ax_reg
];
5382 case es_reg
: case ss_reg
: case cs_reg
:
5383 case ds_reg
: case fs_reg
: case gs_reg
:
5384 s
= names_seg
[code
- es_reg
];
5386 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
5387 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
5390 s
= names8rex
[code
- al_reg
];
5392 s
= names8
[code
- al_reg
];
5394 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
5395 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
5398 s
= names64
[code
- eAX_reg
];
5399 else if (sizeflag
& DFLAG
)
5400 s
= names32
[code
- eAX_reg
];
5402 s
= names16
[code
- eAX_reg
];
5403 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5406 if ((rex
& REX_W
) || (sizeflag
& DFLAG
))
5411 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5414 s
= INTERNAL_DISASSEMBLER_ERROR
;
5421 OP_I (int bytemode
, int sizeflag
)
5424 bfd_signed_vma mask
= -1;
5429 fetch_data(the_info
, codep
+ 1);
5434 if (address_mode
== mode_64bit
)
5444 else if (sizeflag
& DFLAG
)
5454 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5465 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5470 scratchbuf
[0] = '$';
5471 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5472 oappend (scratchbuf
+ intel_syntax
);
5473 scratchbuf
[0] = '\0';
5477 OP_I64 (int bytemode
, int sizeflag
)
5480 bfd_signed_vma mask
= -1;
5482 if (address_mode
!= mode_64bit
)
5484 OP_I (bytemode
, sizeflag
);
5491 fetch_data(the_info
, codep
+ 1);
5499 else if (sizeflag
& DFLAG
)
5509 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5516 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5521 scratchbuf
[0] = '$';
5522 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5523 oappend (scratchbuf
+ intel_syntax
);
5524 scratchbuf
[0] = '\0';
5528 OP_sI (int bytemode
, int sizeflag
)
5535 fetch_data(the_info
, codep
+ 1);
5537 if ((op
& 0x80) != 0)
5544 else if (sizeflag
& DFLAG
)
5551 if ((op
& 0x8000) != 0)
5554 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5558 if ((op
& 0x8000) != 0)
5562 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5566 scratchbuf
[0] = '$';
5567 print_operand_value (scratchbuf
+ 1, sizeof(scratchbuf
) - 1, 1, op
);
5568 oappend (scratchbuf
+ intel_syntax
);
5572 OP_J (int bytemode
, int sizeflag
)
5576 bfd_vma segment
= 0;
5581 fetch_data(the_info
, codep
+ 1);
5583 if ((disp
& 0x80) != 0)
5587 if ((sizeflag
& DFLAG
) || (rex
& REX_W
))
5592 if ((disp
& 0x8000) != 0)
5594 /* In 16bit mode, address is wrapped around at 64k within
5595 the same segment. Otherwise, a data16 prefix on a jump
5596 instruction means that the pc is masked to 16 bits after
5597 the displacement is added! */
5599 if ((prefixes
& PREFIX_DATA
) == 0)
5600 segment
= ((start_pc
+ codep
- start_codep
)
5601 & ~((bfd_vma
) 0xffff));
5603 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5606 oappend (INTERNAL_DISASSEMBLER_ERROR
);
5609 disp
= ((start_pc
+ codep
- start_codep
+ disp
) & mask
) | segment
;
5611 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, disp
);
5612 oappend (scratchbuf
);
5616 OP_SEG (int bytemode
, int sizeflag
)
5618 if (bytemode
== w_mode
)
5619 oappend (names_seg
[modrm
.reg
]);
5621 OP_E (modrm
.mod
== 3 ? bytemode
: w_mode
, sizeflag
);
5625 OP_DIR (int dummy ATTRIBUTE_UNUSED
, int sizeflag
)
5629 if (sizeflag
& DFLAG
)
5639 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5641 snprintf (scratchbuf
, sizeof(scratchbuf
), "0x%x:0x%x", seg
, offset
);
5643 snprintf (scratchbuf
, sizeof(scratchbuf
), "$0x%x,$0x%x", seg
, offset
);
5644 oappend (scratchbuf
);
5648 OP_OFF (int bytemode
, int sizeflag
)
5652 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5653 intel_operand_size (bytemode
, sizeflag
);
5656 if ((sizeflag
& AFLAG
) || address_mode
== mode_64bit
)
5663 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5664 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5666 oappend (names_seg
[ds_reg
- es_reg
]);
5670 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, off
);
5671 oappend (scratchbuf
);
5675 OP_OFF64 (int bytemode
, int sizeflag
)
5679 if (address_mode
!= mode_64bit
5680 || (prefixes
& PREFIX_ADDR
))
5682 OP_OFF (bytemode
, sizeflag
);
5686 if (intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
5687 intel_operand_size (bytemode
, sizeflag
);
5694 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
5695 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
5697 oappend (names_seg
[ds_reg
- es_reg
]);
5701 print_operand_value (scratchbuf
, sizeof(scratchbuf
), 1, off
);
5702 oappend (scratchbuf
);
5706 ptr_reg (int code
, int sizeflag
)
5710 *obufp
++ = open_char
;
5711 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
5712 if (address_mode
== mode_64bit
)
5714 if (!(sizeflag
& AFLAG
))
5715 s
= names32
[code
- eAX_reg
];
5717 s
= names64
[code
- eAX_reg
];
5719 else if (sizeflag
& AFLAG
)
5720 s
= names32
[code
- eAX_reg
];
5722 s
= names16
[code
- eAX_reg
];
5724 *obufp
++ = close_char
;
5729 OP_ESreg (int code
, int sizeflag
)
5735 case 0x6d: /* insw/insl */
5736 intel_operand_size (z_mode
, sizeflag
);
5738 case 0xa5: /* movsw/movsl/movsq */
5739 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5740 case 0xab: /* stosw/stosl */
5741 case 0xaf: /* scasw/scasl */
5742 intel_operand_size (v_mode
, sizeflag
);
5745 intel_operand_size (b_mode
, sizeflag
);
5748 oappend ("%es:" + intel_syntax
);
5749 ptr_reg (code
, sizeflag
);
5753 OP_DSreg (int code
, int sizeflag
)
5759 case 0x6f: /* outsw/outsl */
5760 intel_operand_size (z_mode
, sizeflag
);
5762 case 0xa5: /* movsw/movsl/movsq */
5763 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5764 case 0xad: /* lodsw/lodsl/lodsq */
5765 intel_operand_size (v_mode
, sizeflag
);
5768 intel_operand_size (b_mode
, sizeflag
);
5778 prefixes
|= PREFIX_DS
;
5780 ptr_reg (code
, sizeflag
);
5784 OP_C (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5792 else if (address_mode
!= mode_64bit
&& (prefixes
& PREFIX_LOCK
))
5794 used_prefixes
|= PREFIX_LOCK
;
5797 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%cr%d", modrm
.reg
+ add
);
5798 oappend (scratchbuf
+ intel_syntax
);
5802 OP_D (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5809 snprintf (scratchbuf
, sizeof(scratchbuf
), "db%d", modrm
.reg
+ add
);
5811 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%db%d", modrm
.reg
+ add
);
5812 oappend (scratchbuf
);
5816 OP_T (int dummy ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5818 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%tr%d", modrm
.reg
);
5819 oappend (scratchbuf
+ intel_syntax
);
5823 OP_R (int bytemode
, int sizeflag
)
5826 OP_E (bytemode
, sizeflag
);
5832 OP_MMX (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5834 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5835 if (prefixes
& PREFIX_DATA
)
5841 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.reg
+ add
);
5844 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.reg
);
5845 oappend (scratchbuf
+ intel_syntax
);
5849 OP_XMM (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5855 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.reg
+ add
);
5856 oappend (scratchbuf
+ intel_syntax
);
5860 OP_EM (int bytemode
, int sizeflag
)
5864 if (intel_syntax
&& bytemode
== v_mode
)
5866 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5867 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5869 OP_E (bytemode
, sizeflag
);
5873 /* Skip mod/rm byte. */
5876 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5877 if (prefixes
& PREFIX_DATA
)
5884 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.rm
+ add
);
5887 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.rm
);
5888 oappend (scratchbuf
+ intel_syntax
);
5891 /* cvt* are the only instructions in sse2 which have
5892 both SSE and MMX operands and also have 0x66 prefix
5893 in their opcode. 0x66 was originally used to differentiate
5894 between SSE and MMX instruction(operands). So we have to handle the
5895 cvt* separately using OP_EMC and OP_MXC */
5897 OP_EMC (int bytemode
, int sizeflag
)
5901 if (intel_syntax
&& bytemode
== v_mode
)
5903 bytemode
= (prefixes
& PREFIX_DATA
) ? x_mode
: q_mode
;
5904 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5906 OP_E (bytemode
, sizeflag
);
5910 /* Skip mod/rm byte. */
5913 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5914 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.rm
);
5915 oappend (scratchbuf
+ intel_syntax
);
5919 OP_MXC (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
5921 used_prefixes
|= (prefixes
& PREFIX_DATA
);
5922 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%mm%d", modrm
.reg
);
5923 oappend (scratchbuf
+ intel_syntax
);
5927 OP_EX (int bytemode
, int sizeflag
)
5932 OP_E (bytemode
, sizeflag
);
5939 /* Skip mod/rm byte. */
5942 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", modrm
.rm
+ add
);
5943 oappend (scratchbuf
+ intel_syntax
);
5947 OP_MS (int bytemode
, int sizeflag
)
5950 OP_EM (bytemode
, sizeflag
);
5956 OP_XS (int bytemode
, int sizeflag
)
5959 OP_EX (bytemode
, sizeflag
);
5965 OP_M (int bytemode
, int sizeflag
)
5968 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5971 OP_E (bytemode
, sizeflag
);
5975 OP_0f07 (int bytemode
, int sizeflag
)
5977 if (modrm
.mod
!= 3 || modrm
.rm
!= 0)
5980 OP_E (bytemode
, sizeflag
);
5984 OP_0fae (int bytemode
, int sizeflag
)
5989 strcpy (obuf
+ strlen (obuf
) - sizeof ("clflush") + 1, "sfence");
5991 if (modrm
.reg
< 5 || modrm
.rm
!= 0)
5993 BadOp (); /* bad sfence, mfence, or lfence */
5997 else if (modrm
.reg
!= 7)
5999 BadOp (); /* bad clflush */
6003 OP_E (bytemode
, sizeflag
);
6006 /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6007 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6010 NOP_Fixup1 (int bytemode
, int sizeflag
)
6012 if ((prefixes
& PREFIX_DATA
) != 0
6015 && address_mode
== mode_64bit
))
6016 OP_REG (bytemode
, sizeflag
);
6018 strcpy (obuf
, "nop");
6022 NOP_Fixup2 (int bytemode
, int sizeflag
)
6024 if ((prefixes
& PREFIX_DATA
) != 0
6027 && address_mode
== mode_64bit
))
6028 OP_IMREG (bytemode
, sizeflag
);
6031 static const char *Suffix3DNow
[] = {
6032 /* 00 */ NULL
, NULL
, NULL
, NULL
,
6033 /* 04 */ NULL
, NULL
, NULL
, NULL
,
6034 /* 08 */ NULL
, NULL
, NULL
, NULL
,
6035 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
6036 /* 10 */ NULL
, NULL
, NULL
, NULL
,
6037 /* 14 */ NULL
, NULL
, NULL
, NULL
,
6038 /* 18 */ NULL
, NULL
, NULL
, NULL
,
6039 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
6040 /* 20 */ NULL
, NULL
, NULL
, NULL
,
6041 /* 24 */ NULL
, NULL
, NULL
, NULL
,
6042 /* 28 */ NULL
, NULL
, NULL
, NULL
,
6043 /* 2C */ NULL
, NULL
, NULL
, NULL
,
6044 /* 30 */ NULL
, NULL
, NULL
, NULL
,
6045 /* 34 */ NULL
, NULL
, NULL
, NULL
,
6046 /* 38 */ NULL
, NULL
, NULL
, NULL
,
6047 /* 3C */ NULL
, NULL
, NULL
, NULL
,
6048 /* 40 */ NULL
, NULL
, NULL
, NULL
,
6049 /* 44 */ NULL
, NULL
, NULL
, NULL
,
6050 /* 48 */ NULL
, NULL
, NULL
, NULL
,
6051 /* 4C */ NULL
, NULL
, NULL
, NULL
,
6052 /* 50 */ NULL
, NULL
, NULL
, NULL
,
6053 /* 54 */ NULL
, NULL
, NULL
, NULL
,
6054 /* 58 */ NULL
, NULL
, NULL
, NULL
,
6055 /* 5C */ NULL
, NULL
, NULL
, NULL
,
6056 /* 60 */ NULL
, NULL
, NULL
, NULL
,
6057 /* 64 */ NULL
, NULL
, NULL
, NULL
,
6058 /* 68 */ NULL
, NULL
, NULL
, NULL
,
6059 /* 6C */ NULL
, NULL
, NULL
, NULL
,
6060 /* 70 */ NULL
, NULL
, NULL
, NULL
,
6061 /* 74 */ NULL
, NULL
, NULL
, NULL
,
6062 /* 78 */ NULL
, NULL
, NULL
, NULL
,
6063 /* 7C */ NULL
, NULL
, NULL
, NULL
,
6064 /* 80 */ NULL
, NULL
, NULL
, NULL
,
6065 /* 84 */ NULL
, NULL
, NULL
, NULL
,
6066 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
6067 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
6068 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
6069 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
6070 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
6071 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
6072 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
6073 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
6074 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
6075 /* AC */ NULL
, NULL
, "pfacc", NULL
,
6076 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
6077 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pmulhrw",
6078 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
6079 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
6080 /* C0 */ NULL
, NULL
, NULL
, NULL
,
6081 /* C4 */ NULL
, NULL
, NULL
, NULL
,
6082 /* C8 */ NULL
, NULL
, NULL
, NULL
,
6083 /* CC */ NULL
, NULL
, NULL
, NULL
,
6084 /* D0 */ NULL
, NULL
, NULL
, NULL
,
6085 /* D4 */ NULL
, NULL
, NULL
, NULL
,
6086 /* D8 */ NULL
, NULL
, NULL
, NULL
,
6087 /* DC */ NULL
, NULL
, NULL
, NULL
,
6088 /* E0 */ NULL
, NULL
, NULL
, NULL
,
6089 /* E4 */ NULL
, NULL
, NULL
, NULL
,
6090 /* E8 */ NULL
, NULL
, NULL
, NULL
,
6091 /* EC */ NULL
, NULL
, NULL
, NULL
,
6092 /* F0 */ NULL
, NULL
, NULL
, NULL
,
6093 /* F4 */ NULL
, NULL
, NULL
, NULL
,
6094 /* F8 */ NULL
, NULL
, NULL
, NULL
,
6095 /* FC */ NULL
, NULL
, NULL
, NULL
,
6099 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6101 const char *mnemonic
;
6103 fetch_data(the_info
, codep
+ 1);
6104 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6105 place where an 8-bit immediate would normally go. ie. the last
6106 byte of the instruction. */
6107 obufp
= obuf
+ strlen (obuf
);
6108 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
6113 /* Since a variable sized modrm/sib chunk is between the start
6114 of the opcode (0x0f0f) and the opcode suffix, we need to do
6115 all the modrm processing first, and don't know until now that
6116 we have a bad opcode. This necessitates some cleaning up. */
6117 op_out
[0][0] = '\0';
6118 op_out
[1][0] = '\0';
6123 static const char *simd_cmp_op
[] = {
6135 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED
, int sizeflag ATTRIBUTE_UNUSED
)
6137 unsigned int cmp_type
;
6139 fetch_data(the_info
, codep
+ 1);
6140 obufp
= obuf
+ strlen (obuf
);
6141 cmp_type
= *codep
++ & 0xff;
6144 char suffix1
= 'p', suffix2
= 's';
6145 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6146 if (prefixes
& PREFIX_REPZ
)
6150 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6151 if (prefixes
& PREFIX_DATA
)
6155 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
6156 if (prefixes
& PREFIX_REPNZ
)
6157 suffix1
= 's', suffix2
= 'd';
6160 snprintf (scratchbuf
, sizeof(scratchbuf
), "cmp%s%c%c",
6161 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
6162 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
6163 oappend (scratchbuf
);
6167 /* We have a bad extension byte. Clean up. */
6168 op_out
[0][0] = '\0';
6169 op_out
[1][0] = '\0';
6175 SIMD_Fixup (int extrachar
, int sizeflag ATTRIBUTE_UNUSED
)
6177 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6178 forms of these instructions. */
6181 char *p
= obuf
+ strlen (obuf
);
6184 *(p
- 1) = *(p
- 2);
6185 *(p
- 2) = *(p
- 3);
6186 *(p
- 3) = extrachar
;
6191 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6193 if (modrm
.mod
== 3 && modrm
.reg
== 1 && modrm
.rm
<= 1)
6195 /* Override "sidt". */
6196 size_t olen
= strlen (obuf
);
6197 char *p
= obuf
+ olen
- 4;
6198 const char * const *names
= (address_mode
== mode_64bit
6199 ? names64
: names32
);
6201 /* We might have a suffix when disassembling with -Msuffix. */
6205 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6207 && (prefixes
& PREFIX_ADDR
)
6210 && strncmp (p
- 7, "addr", 4) == 0
6211 && (strncmp (p
- 3, "16", 2) == 0
6212 || strncmp (p
- 3, "32", 2) == 0))
6217 /* mwait %eax,%ecx */
6218 strcpy (p
, "mwait");
6220 strcpy (op_out
[0], names
[0]);
6224 /* monitor %eax,%ecx,%edx" */
6225 strcpy (p
, "monitor");
6228 const char * const *op1_names
;
6229 if (!(prefixes
& PREFIX_ADDR
))
6230 op1_names
= (address_mode
== mode_16bit
6234 op1_names
= (address_mode
!= mode_32bit
6235 ? names32
: names16
);
6236 used_prefixes
|= PREFIX_ADDR
;
6238 strcpy (op_out
[0], op1_names
[0]);
6239 strcpy (op_out
[2], names
[2]);
6244 strcpy (op_out
[1], names
[1]);
6255 SVME_Fixup (int bytemode
, int sizeflag
)
6287 OP_M (bytemode
, sizeflag
);
6290 /* Override "lidt". */
6291 p
= obuf
+ strlen (obuf
) - 4;
6292 /* We might have a suffix. */
6296 if (!(prefixes
& PREFIX_ADDR
))
6301 used_prefixes
|= PREFIX_ADDR
;
6305 strcpy (op_out
[1], names32
[1]);
6311 *obufp
++ = open_char
;
6312 if (address_mode
== mode_64bit
|| (sizeflag
& AFLAG
))
6316 strcpy (obufp
, alt
);
6317 obufp
+= strlen (alt
);
6318 *obufp
++ = close_char
;
6325 INVLPG_Fixup (int bytemode
, int sizeflag
)
6338 OP_M (bytemode
, sizeflag
);
6341 /* Override "invlpg". */
6342 strcpy (obuf
+ strlen (obuf
) - 6, alt
);
6349 /* Throw away prefixes and 1st. opcode byte. */
6350 codep
= insn_codep
+ 1;
6355 VMX_Fixup (int extrachar ATTRIBUTE_UNUSED
, int sizeflag
)
6362 /* Override "sgdt". */
6363 char *p
= obuf
+ strlen (obuf
) - 4;
6365 /* We might have a suffix when disassembling with -Msuffix. */
6372 strcpy (p
, "vmcall");
6375 strcpy (p
, "vmlaunch");
6378 strcpy (p
, "vmresume");
6381 strcpy (p
, "vmxoff");
6392 OP_VMX (int bytemode
, int sizeflag
)
6394 used_prefixes
|= (prefixes
& (PREFIX_DATA
| PREFIX_REPZ
));
6395 if (prefixes
& PREFIX_DATA
)
6396 strcpy (obuf
, "vmclear");
6397 else if (prefixes
& PREFIX_REPZ
)
6398 strcpy (obuf
, "vmxon");
6400 strcpy (obuf
, "vmptrld");
6401 OP_E (bytemode
, sizeflag
);
6405 REP_Fixup (int bytemode
, int sizeflag
)
6407 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6411 if (prefixes
& PREFIX_REPZ
)
6412 switch (*insn_codep
)
6414 case 0x6e: /* outsb */
6415 case 0x6f: /* outsw/outsl */
6416 case 0xa4: /* movsb */
6417 case 0xa5: /* movsw/movsl/movsq */
6423 case 0xaa: /* stosb */
6424 case 0xab: /* stosw/stosl/stosq */
6425 case 0xac: /* lodsb */
6426 case 0xad: /* lodsw/lodsl/lodsq */
6427 if (!intel_syntax
&& (sizeflag
& SUFFIX_ALWAYS
))
6432 case 0x6c: /* insb */
6433 case 0x6d: /* insl/insw */
6449 olen
= strlen (obuf
);
6450 p
= obuf
+ olen
- ilen
- 1 - 4;
6451 /* Handle "repz [addr16|addr32]". */
6452 if ((prefixes
& PREFIX_ADDR
))
6455 memmove (p
+ 3, p
+ 4, olen
- (p
+ 3 - obuf
));
6463 OP_IMREG (bytemode
, sizeflag
);
6466 OP_ESreg (bytemode
, sizeflag
);
6469 OP_DSreg (bytemode
, sizeflag
);
6478 CMPXCHG8B_Fixup (int bytemode
, int sizeflag
)
6483 /* Change cmpxchg8b to cmpxchg16b. */
6484 char *p
= obuf
+ strlen (obuf
) - 2;
6488 OP_M (bytemode
, sizeflag
);
6492 XMM_Fixup (int reg
, int sizeflag ATTRIBUTE_UNUSED
)
6494 snprintf (scratchbuf
, sizeof(scratchbuf
), "%%xmm%d", reg
);
6495 oappend (scratchbuf
+ intel_syntax
);
6499 CRC32_Fixup (int bytemode
, int sizeflag
)
6501 /* Add proper suffix to "crc32". */
6502 char *p
= obuf
+ strlen (obuf
);
6519 else if (sizeflag
& DFLAG
)
6523 used_prefixes
|= (prefixes
& PREFIX_DATA
);
6526 oappend (INTERNAL_DISASSEMBLER_ERROR
);
6535 /* Skip mod/rm byte. */
6540 add
= (rex
& REX_B
) ? 8 : 0;
6541 if (bytemode
== b_mode
)
6545 oappend (names8rex
[modrm
.rm
+ add
]);
6547 oappend (names8
[modrm
.rm
+ add
]);
6553 oappend (names64
[modrm
.rm
+ add
]);
6554 else if ((prefixes
& PREFIX_DATA
))
6555 oappend (names16
[modrm
.rm
+ add
]);
6557 oappend (names32
[modrm
.rm
+ add
]);
6561 OP_E (bytemode
, sizeflag
);