4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qemu/accel.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/qapi-visit-machine.h"
23 #include "qapi/visitor.h"
24 #include "qom/object_interfaces.h"
25 #include "hw/sysbus.h"
26 #include "sysemu/cpus.h"
27 #include "sysemu/sysemu.h"
28 #include "sysemu/reset.h"
29 #include "sysemu/runstate.h"
30 #include "sysemu/numa.h"
31 #include "sysemu/xen.h"
32 #include "qemu/error-report.h"
33 #include "sysemu/qtest.h"
34 #include "hw/pci/pci.h"
35 #include "hw/mem/nvdimm.h"
36 #include "migration/global_state.h"
37 #include "migration/vmstate.h"
38 #include "exec/confidential-guest-support.h"
39 #include "hw/virtio/virtio.h"
40 #include "hw/virtio/virtio-pci.h"
42 GlobalProperty hw_compat_8_0
[] = {
43 { "migration", "multifd-flush-after-each-section", "on"},
45 const size_t hw_compat_8_0_len
= G_N_ELEMENTS(hw_compat_8_0
);
47 GlobalProperty hw_compat_7_2
[] = {
48 { "e1000e", "migrate-timadj", "off" },
49 { "virtio-mem", "x-early-migration", "false" },
50 { "migration", "x-preempt-pre-7-2", "true" },
52 const size_t hw_compat_7_2_len
= G_N_ELEMENTS(hw_compat_7_2
);
54 GlobalProperty hw_compat_7_1
[] = {
55 { "virtio-device", "queue_reset", "false" },
56 { "virtio-rng-pci", "vectors", "0" },
57 { "virtio-rng-pci-transitional", "vectors", "0" },
58 { "virtio-rng-pci-non-transitional", "vectors", "0" },
60 const size_t hw_compat_7_1_len
= G_N_ELEMENTS(hw_compat_7_1
);
62 GlobalProperty hw_compat_7_0
[] = {
63 { "arm-gicv3-common", "force-8-bit-prio", "on" },
64 { "nvme-ns", "eui64-default", "on"},
66 const size_t hw_compat_7_0_len
= G_N_ELEMENTS(hw_compat_7_0
);
68 GlobalProperty hw_compat_6_2
[] = {
69 { "PIIX4_PM", "x-not-migrate-acpi-index", "on"},
71 const size_t hw_compat_6_2_len
= G_N_ELEMENTS(hw_compat_6_2
);
73 GlobalProperty hw_compat_6_1
[] = {
74 { "vhost-user-vsock-device", "seqpacket", "off" },
75 { "nvme-ns", "shared", "off" },
77 const size_t hw_compat_6_1_len
= G_N_ELEMENTS(hw_compat_6_1
);
79 GlobalProperty hw_compat_6_0
[] = {
80 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
81 { "i8042", "extended-state", "false"},
82 { "nvme-ns", "eui64-default", "off"},
83 { "e1000", "init-vet", "off" },
84 { "e1000e", "init-vet", "off" },
85 { "vhost-vsock-device", "seqpacket", "off" },
87 const size_t hw_compat_6_0_len
= G_N_ELEMENTS(hw_compat_6_0
);
89 GlobalProperty hw_compat_5_2
[] = {
90 { "ICH9-LPC", "smm-compat", "on"},
91 { "PIIX4_PM", "smm-compat", "on"},
92 { "virtio-blk-device", "report-discard-granularity", "off" },
93 { "virtio-net-pci-base", "vectors", "3"},
95 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
97 GlobalProperty hw_compat_5_1
[] = {
98 { "vhost-scsi", "num_queues", "1"},
99 { "vhost-user-blk", "num-queues", "1"},
100 { "vhost-user-scsi", "num_queues", "1"},
101 { "virtio-blk-device", "num-queues", "1"},
102 { "virtio-scsi-device", "num_queues", "1"},
103 { "nvme", "use-intel-id", "on"},
104 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
105 { "pl011", "migrate-clk", "off" },
106 { "virtio-pci", "x-ats-page-aligned", "off"},
108 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
110 GlobalProperty hw_compat_5_0
[] = {
111 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
112 { "virtio-balloon-device", "page-poison", "false" },
113 { "vmport", "x-read-set-eax", "off" },
114 { "vmport", "x-signal-unsupported-cmd", "off" },
115 { "vmport", "x-report-vmx-type", "off" },
116 { "vmport", "x-cmds-v2", "off" },
117 { "virtio-device", "x-disable-legacy-check", "true" },
119 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
121 GlobalProperty hw_compat_4_2
[] = {
122 { "virtio-blk-device", "queue-size", "128"},
123 { "virtio-scsi-device", "virtqueue_size", "128"},
124 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
125 { "virtio-blk-device", "seg-max-adjust", "off"},
126 { "virtio-scsi-device", "seg_max_adjust", "off"},
127 { "vhost-blk-device", "seg_max_adjust", "off"},
128 { "usb-host", "suppress-remote-wake", "off" },
129 { "usb-redir", "suppress-remote-wake", "off" },
130 { "qxl", "revision", "4" },
131 { "qxl-vga", "revision", "4" },
132 { "fw_cfg", "acpi-mr-restore", "false" },
133 { "virtio-device", "use-disabled-flag", "false" },
135 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
137 GlobalProperty hw_compat_4_1
[] = {
138 { "virtio-pci", "x-pcie-flr-init", "off" },
140 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
142 GlobalProperty hw_compat_4_0
[] = {
143 { "VGA", "edid", "false" },
144 { "secondary-vga", "edid", "false" },
145 { "bochs-display", "edid", "false" },
146 { "virtio-vga", "edid", "false" },
147 { "virtio-gpu-device", "edid", "false" },
148 { "virtio-device", "use-started", "false" },
149 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
150 { "pl031", "migrate-tick-offset", "false" },
152 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
154 GlobalProperty hw_compat_3_1
[] = {
155 { "pcie-root-port", "x-speed", "2_5" },
156 { "pcie-root-port", "x-width", "1" },
157 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
158 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
159 { "tpm-crb", "ppi", "false" },
160 { "tpm-tis", "ppi", "false" },
161 { "usb-kbd", "serial", "42" },
162 { "usb-mouse", "serial", "42" },
163 { "usb-tablet", "serial", "42" },
164 { "virtio-blk-device", "discard", "false" },
165 { "virtio-blk-device", "write-zeroes", "false" },
166 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
167 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
169 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
171 GlobalProperty hw_compat_3_0
[] = {};
172 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
174 GlobalProperty hw_compat_2_12
[] = {
175 { "migration", "decompress-error-check", "off" },
176 { "hda-audio", "use-timer", "false" },
177 { "cirrus-vga", "global-vmstate", "true" },
178 { "VGA", "global-vmstate", "true" },
179 { "vmware-svga", "global-vmstate", "true" },
180 { "qxl-vga", "global-vmstate", "true" },
182 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
184 GlobalProperty hw_compat_2_11
[] = {
185 { "hpet", "hpet-offset-saved", "false" },
186 { "virtio-blk-pci", "vectors", "2" },
187 { "vhost-user-blk-pci", "vectors", "2" },
188 { "e1000", "migrate_tso_props", "off" },
190 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
192 GlobalProperty hw_compat_2_10
[] = {
193 { "virtio-mouse-device", "wheel-axis", "false" },
194 { "virtio-tablet-device", "wheel-axis", "false" },
196 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
198 GlobalProperty hw_compat_2_9
[] = {
199 { "pci-bridge", "shpc", "off" },
200 { "intel-iommu", "pt", "off" },
201 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
202 { "pcie-root-port", "x-migrate-msix", "false" },
204 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
206 GlobalProperty hw_compat_2_8
[] = {
207 { "fw_cfg_mem", "x-file-slots", "0x10" },
208 { "fw_cfg_io", "x-file-slots", "0x10" },
209 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
210 { "pci-bridge", "shpc", "on" },
211 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
212 { "virtio-pci", "x-pcie-deverr-init", "off" },
213 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
214 { "virtio-pci", "x-pcie-pm-init", "off" },
215 { "cirrus-vga", "vgamem_mb", "8" },
216 { "isa-cirrus-vga", "vgamem_mb", "8" },
218 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
220 GlobalProperty hw_compat_2_7
[] = {
221 { "virtio-pci", "page-per-vq", "on" },
222 { "virtio-serial-device", "emergency-write", "off" },
223 { "ioapic", "version", "0x11" },
224 { "intel-iommu", "x-buggy-eim", "true" },
225 { "virtio-pci", "x-ignore-backend-features", "on" },
227 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
229 GlobalProperty hw_compat_2_6
[] = {
230 { "virtio-mmio", "format_transport_address", "off" },
231 /* Optional because not all virtio-pci devices support legacy mode */
232 { "virtio-pci", "disable-modern", "on", .optional
= true },
233 { "virtio-pci", "disable-legacy", "off", .optional
= true },
235 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
237 GlobalProperty hw_compat_2_5
[] = {
238 { "isa-fdc", "fallback", "144" },
239 { "pvscsi", "x-old-pci-configuration", "on" },
240 { "pvscsi", "x-disable-pcie", "on" },
241 { "vmxnet3", "x-old-msi-offsets", "on" },
242 { "vmxnet3", "x-disable-pcie", "on" },
244 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
246 GlobalProperty hw_compat_2_4
[] = {
247 /* Optional because the 'scsi' property is Linux-only */
248 { "virtio-blk-device", "scsi", "true", .optional
= true },
249 { "e1000", "extra_mac_registers", "off" },
250 { "virtio-pci", "x-disable-pcie", "on" },
251 { "virtio-pci", "migrate-extra", "off" },
252 { "fw_cfg_mem", "dma_enabled", "off" },
253 { "fw_cfg_io", "dma_enabled", "off" }
255 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
257 GlobalProperty hw_compat_2_3
[] = {
258 { "virtio-blk-pci", "any_layout", "off" },
259 { "virtio-balloon-pci", "any_layout", "off" },
260 { "virtio-serial-pci", "any_layout", "off" },
261 { "virtio-9p-pci", "any_layout", "off" },
262 { "virtio-rng-pci", "any_layout", "off" },
263 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
264 { "migration", "send-configuration", "off" },
265 { "migration", "send-section-footer", "off" },
266 { "migration", "store-global-state", "off" },
268 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
270 GlobalProperty hw_compat_2_2
[] = {};
271 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
273 GlobalProperty hw_compat_2_1
[] = {
274 { "intel-hda", "old_msi_addr", "on" },
275 { "VGA", "qemu-extended-regs", "off" },
276 { "secondary-vga", "qemu-extended-regs", "off" },
277 { "virtio-scsi-pci", "any_layout", "off" },
278 { "usb-mouse", "usb_version", "1" },
279 { "usb-kbd", "usb_version", "1" },
280 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
282 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
284 MachineState
*current_machine
;
286 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
288 MachineState
*ms
= MACHINE(obj
);
290 return g_strdup(ms
->kernel_filename
);
293 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
295 MachineState
*ms
= MACHINE(obj
);
297 g_free(ms
->kernel_filename
);
298 ms
->kernel_filename
= g_strdup(value
);
301 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
303 MachineState
*ms
= MACHINE(obj
);
305 return g_strdup(ms
->initrd_filename
);
308 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
310 MachineState
*ms
= MACHINE(obj
);
312 g_free(ms
->initrd_filename
);
313 ms
->initrd_filename
= g_strdup(value
);
316 static char *machine_get_append(Object
*obj
, Error
**errp
)
318 MachineState
*ms
= MACHINE(obj
);
320 return g_strdup(ms
->kernel_cmdline
);
323 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
325 MachineState
*ms
= MACHINE(obj
);
327 g_free(ms
->kernel_cmdline
);
328 ms
->kernel_cmdline
= g_strdup(value
);
331 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
333 MachineState
*ms
= MACHINE(obj
);
335 return g_strdup(ms
->dtb
);
338 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
340 MachineState
*ms
= MACHINE(obj
);
343 ms
->dtb
= g_strdup(value
);
346 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
348 MachineState
*ms
= MACHINE(obj
);
350 return g_strdup(ms
->dumpdtb
);
353 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
355 MachineState
*ms
= MACHINE(obj
);
358 ms
->dumpdtb
= g_strdup(value
);
361 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
362 const char *name
, void *opaque
,
365 MachineState
*ms
= MACHINE(obj
);
366 int64_t value
= ms
->phandle_start
;
368 visit_type_int(v
, name
, &value
, errp
);
371 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
372 const char *name
, void *opaque
,
375 MachineState
*ms
= MACHINE(obj
);
378 if (!visit_type_int(v
, name
, &value
, errp
)) {
382 ms
->phandle_start
= value
;
385 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
387 MachineState
*ms
= MACHINE(obj
);
389 return g_strdup(ms
->dt_compatible
);
392 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
394 MachineState
*ms
= MACHINE(obj
);
396 g_free(ms
->dt_compatible
);
397 ms
->dt_compatible
= g_strdup(value
);
400 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
402 MachineState
*ms
= MACHINE(obj
);
404 return ms
->dump_guest_core
;
407 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
409 MachineState
*ms
= MACHINE(obj
);
411 ms
->dump_guest_core
= value
;
414 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
416 MachineState
*ms
= MACHINE(obj
);
418 return ms
->mem_merge
;
421 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
423 MachineState
*ms
= MACHINE(obj
);
425 ms
->mem_merge
= value
;
428 static bool machine_get_usb(Object
*obj
, Error
**errp
)
430 MachineState
*ms
= MACHINE(obj
);
435 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
437 MachineState
*ms
= MACHINE(obj
);
440 ms
->usb_disabled
= !value
;
443 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
445 MachineState
*ms
= MACHINE(obj
);
447 return ms
->enable_graphics
;
450 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
452 MachineState
*ms
= MACHINE(obj
);
454 ms
->enable_graphics
= value
;
457 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
459 MachineState
*ms
= MACHINE(obj
);
461 return g_strdup(ms
->firmware
);
464 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
466 MachineState
*ms
= MACHINE(obj
);
468 g_free(ms
->firmware
);
469 ms
->firmware
= g_strdup(value
);
472 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
474 MachineState
*ms
= MACHINE(obj
);
476 ms
->suppress_vmdesc
= value
;
479 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
481 MachineState
*ms
= MACHINE(obj
);
483 return ms
->suppress_vmdesc
;
486 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
488 MachineState
*ms
= MACHINE(obj
);
491 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
497 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
501 object_resolve_path_component(object_get_objects_root(), value
);
504 error_setg(errp
, "No such memory encryption object '%s'", value
);
508 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
511 static void machine_check_confidential_guest_support(const Object
*obj
,
517 * So far the only constraint is that the target has the
518 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
523 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
525 MachineState
*ms
= MACHINE(obj
);
527 return ms
->nvdimms_state
->is_enabled
;
530 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
532 MachineState
*ms
= MACHINE(obj
);
534 ms
->nvdimms_state
->is_enabled
= value
;
537 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
539 MachineState
*ms
= MACHINE(obj
);
541 return ms
->numa_state
->hmat_enabled
;
544 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
546 MachineState
*ms
= MACHINE(obj
);
548 ms
->numa_state
->hmat_enabled
= value
;
551 static void machine_get_mem(Object
*obj
, Visitor
*v
, const char *name
,
552 void *opaque
, Error
**errp
)
554 MachineState
*ms
= MACHINE(obj
);
555 MemorySizeConfiguration mem
= {
557 .size
= ms
->ram_size
,
558 .has_max_size
= !!ms
->ram_slots
,
559 .max_size
= ms
->maxram_size
,
560 .has_slots
= !!ms
->ram_slots
,
561 .slots
= ms
->ram_slots
,
563 MemorySizeConfiguration
*p_mem
= &mem
;
565 visit_type_MemorySizeConfiguration(v
, name
, &p_mem
, &error_abort
);
568 static void machine_set_mem(Object
*obj
, Visitor
*v
, const char *name
,
569 void *opaque
, Error
**errp
)
572 MachineState
*ms
= MACHINE(obj
);
573 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
574 MemorySizeConfiguration
*mem
;
576 if (!visit_type_MemorySizeConfiguration(v
, name
, &mem
, errp
)) {
580 if (!mem
->has_size
) {
581 mem
->has_size
= true;
582 mem
->size
= mc
->default_ram_size
;
584 mem
->size
= QEMU_ALIGN_UP(mem
->size
, 8192);
585 if (mc
->fixup_ram_size
) {
586 mem
->size
= mc
->fixup_ram_size(mem
->size
);
588 if ((ram_addr_t
)mem
->size
!= mem
->size
) {
589 error_setg(errp
, "ram size too large");
593 if (mem
->has_max_size
) {
594 if (mem
->max_size
< mem
->size
) {
595 error_setg(errp
, "invalid value of maxmem: "
596 "maximum memory size (0x%" PRIx64
") must be at least "
597 "the initial memory size (0x%" PRIx64
")",
598 mem
->max_size
, mem
->size
);
601 if (mem
->has_slots
&& mem
->slots
&& mem
->max_size
== mem
->size
) {
602 error_setg(errp
, "invalid value of maxmem: "
603 "memory slots were specified but maximum memory size "
604 "(0x%" PRIx64
") is equal to the initial memory size "
605 "(0x%" PRIx64
")", mem
->max_size
, mem
->size
);
608 ms
->maxram_size
= mem
->max_size
;
610 if (mem
->has_slots
) {
611 error_setg(errp
, "slots specified but no max-size");
614 ms
->maxram_size
= mem
->size
;
616 ms
->ram_size
= mem
->size
;
617 ms
->ram_slots
= mem
->has_slots
? mem
->slots
: 0;
619 qapi_free_MemorySizeConfiguration(mem
);
622 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
624 MachineState
*ms
= MACHINE(obj
);
626 return g_strdup(ms
->nvdimms_state
->persistence_string
);
629 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
632 MachineState
*ms
= MACHINE(obj
);
633 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
635 if (strcmp(value
, "cpu") == 0) {
636 nvdimms_state
->persistence
= 3;
637 } else if (strcmp(value
, "mem-ctrl") == 0) {
638 nvdimms_state
->persistence
= 2;
640 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
645 g_free(nvdimms_state
->persistence_string
);
646 nvdimms_state
->persistence_string
= g_strdup(value
);
649 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
651 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
654 bool device_is_dynamic_sysbus(MachineClass
*mc
, DeviceState
*dev
)
656 Object
*obj
= OBJECT(dev
);
658 if (!object_dynamic_cast(obj
, TYPE_SYS_BUS_DEVICE
)) {
662 return device_type_is_dynamic_sysbus(mc
, object_get_typename(obj
));
665 bool device_type_is_dynamic_sysbus(MachineClass
*mc
, const char *type
)
667 bool allowed
= false;
669 ObjectClass
*klass
= object_class_by_name(type
);
671 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
674 allowed
|= !!object_class_dynamic_cast(klass
, wl
->value
);
680 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
683 HotpluggableCPUList
*head
= NULL
;
684 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
686 /* force board to initialize possible_cpus if it hasn't been done yet */
687 mc
->possible_cpu_arch_ids(machine
);
689 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
691 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
693 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
694 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
695 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
696 sizeof(*cpu_item
->props
));
698 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
700 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
702 QAPI_LIST_PREPEND(head
, cpu_item
);
708 * machine_set_cpu_numa_node:
709 * @machine: machine object to modify
710 * @props: specifies which cpu objects to assign to
711 * numa node specified by @props.node_id
712 * @errp: if an error occurs, a pointer to an area to store the error
714 * Associate NUMA node specified by @props.node_id with cpu slots that
715 * match socket/core/thread-ids specified by @props. It's recommended to use
716 * query-hotpluggable-cpus.props values to specify affected cpu slots,
717 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
719 * However for CLI convenience it's possible to pass in subset of properties,
720 * which would affect all cpu slots that match it.
722 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
723 * -numa cpu,node-id=0,socket_id=0 \
724 * -numa cpu,node-id=1,socket_id=1
725 * will assign all child cores of socket 0 to node 0 and
726 * of socket 1 to node 1.
728 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
730 * Empty subset is disallowed and function will return with error in this case.
732 void machine_set_cpu_numa_node(MachineState
*machine
,
733 const CpuInstanceProperties
*props
, Error
**errp
)
735 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
736 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
740 if (!mc
->possible_cpu_arch_ids
) {
741 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
745 /* disabling node mapping is not supported, forbid it */
746 assert(props
->has_node_id
);
748 /* force board to initialize possible_cpus if it hasn't been done yet */
749 mc
->possible_cpu_arch_ids(machine
);
751 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
752 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
754 /* reject unsupported by board properties */
755 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
756 error_setg(errp
, "thread-id is not supported");
760 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
761 error_setg(errp
, "core-id is not supported");
765 if (props
->has_cluster_id
&& !slot
->props
.has_cluster_id
) {
766 error_setg(errp
, "cluster-id is not supported");
770 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
771 error_setg(errp
, "socket-id is not supported");
775 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
776 error_setg(errp
, "die-id is not supported");
780 /* skip slots with explicit mismatch */
781 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
785 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
789 if (props
->has_cluster_id
&&
790 props
->cluster_id
!= slot
->props
.cluster_id
) {
794 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
798 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
802 /* reject assignment if slot is already assigned, for compatibility
803 * of legacy cpu_index mapping with SPAPR core based mapping do not
804 * error out if cpu thread and matched core have the same node-id */
805 if (slot
->props
.has_node_id
&&
806 slot
->props
.node_id
!= props
->node_id
) {
807 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
808 slot
->props
.node_id
);
812 /* assign slot to node as it's matched '-numa cpu' key */
814 slot
->props
.node_id
= props
->node_id
;
815 slot
->props
.has_node_id
= props
->has_node_id
;
817 if (machine
->numa_state
->hmat_enabled
) {
818 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
819 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
820 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
821 " should be itself (got %" PRIu16
")",
822 props
->node_id
, numa_info
[props
->node_id
].initiator
);
825 numa_info
[props
->node_id
].has_cpu
= true;
826 numa_info
[props
->node_id
].initiator
= props
->node_id
;
831 error_setg(errp
, "no match found");
835 static void machine_get_smp(Object
*obj
, Visitor
*v
, const char *name
,
836 void *opaque
, Error
**errp
)
838 MachineState
*ms
= MACHINE(obj
);
839 SMPConfiguration
*config
= &(SMPConfiguration
){
840 .has_cpus
= true, .cpus
= ms
->smp
.cpus
,
841 .has_sockets
= true, .sockets
= ms
->smp
.sockets
,
842 .has_dies
= true, .dies
= ms
->smp
.dies
,
843 .has_clusters
= true, .clusters
= ms
->smp
.clusters
,
844 .has_cores
= true, .cores
= ms
->smp
.cores
,
845 .has_threads
= true, .threads
= ms
->smp
.threads
,
846 .has_maxcpus
= true, .maxcpus
= ms
->smp
.max_cpus
,
849 if (!visit_type_SMPConfiguration(v
, name
, &config
, &error_abort
)) {
854 static void machine_set_smp(Object
*obj
, Visitor
*v
, const char *name
,
855 void *opaque
, Error
**errp
)
857 MachineState
*ms
= MACHINE(obj
);
858 g_autoptr(SMPConfiguration
) config
= NULL
;
860 if (!visit_type_SMPConfiguration(v
, name
, &config
, errp
)) {
864 machine_parse_smp_config(ms
, config
, errp
);
867 static void machine_get_boot(Object
*obj
, Visitor
*v
, const char *name
,
868 void *opaque
, Error
**errp
)
870 MachineState
*ms
= MACHINE(obj
);
871 BootConfiguration
*config
= &ms
->boot_config
;
872 visit_type_BootConfiguration(v
, name
, &config
, &error_abort
);
875 static void machine_free_boot_config(MachineState
*ms
)
877 g_free(ms
->boot_config
.order
);
878 g_free(ms
->boot_config
.once
);
879 g_free(ms
->boot_config
.splash
);
882 static void machine_copy_boot_config(MachineState
*ms
, BootConfiguration
*config
)
884 MachineClass
*machine_class
= MACHINE_GET_CLASS(ms
);
886 machine_free_boot_config(ms
);
887 ms
->boot_config
= *config
;
888 if (!config
->order
) {
889 ms
->boot_config
.order
= g_strdup(machine_class
->default_boot_order
);
893 static void machine_set_boot(Object
*obj
, Visitor
*v
, const char *name
,
894 void *opaque
, Error
**errp
)
897 MachineState
*ms
= MACHINE(obj
);
898 BootConfiguration
*config
= NULL
;
900 if (!visit_type_BootConfiguration(v
, name
, &config
, errp
)) {
904 validate_bootdevices(config
->order
, errp
);
910 validate_bootdevices(config
->once
, errp
);
916 machine_copy_boot_config(ms
, config
);
917 /* Strings live in ms->boot_config. */
922 qapi_free_BootConfiguration(config
);
925 static void machine_class_init(ObjectClass
*oc
, void *data
)
927 MachineClass
*mc
= MACHINE_CLASS(oc
);
929 /* Default 128 MB as guest ram size */
930 mc
->default_ram_size
= 128 * MiB
;
931 mc
->rom_file_has_mr
= true;
933 /* numa node memory size aligned on 8MB by default.
934 * On Linux, each node's border has to be 8MB aligned
936 mc
->numa_mem_align_shift
= 23;
938 object_class_property_add_str(oc
, "kernel",
939 machine_get_kernel
, machine_set_kernel
);
940 object_class_property_set_description(oc
, "kernel",
941 "Linux kernel image file");
943 object_class_property_add_str(oc
, "initrd",
944 machine_get_initrd
, machine_set_initrd
);
945 object_class_property_set_description(oc
, "initrd",
946 "Linux initial ramdisk file");
948 object_class_property_add_str(oc
, "append",
949 machine_get_append
, machine_set_append
);
950 object_class_property_set_description(oc
, "append",
951 "Linux kernel command line");
953 object_class_property_add_str(oc
, "dtb",
954 machine_get_dtb
, machine_set_dtb
);
955 object_class_property_set_description(oc
, "dtb",
956 "Linux kernel device tree file");
958 object_class_property_add_str(oc
, "dumpdtb",
959 machine_get_dumpdtb
, machine_set_dumpdtb
);
960 object_class_property_set_description(oc
, "dumpdtb",
961 "Dump current dtb to a file and quit");
963 object_class_property_add(oc
, "boot", "BootConfiguration",
964 machine_get_boot
, machine_set_boot
,
966 object_class_property_set_description(oc
, "boot",
967 "Boot configuration");
969 object_class_property_add(oc
, "smp", "SMPConfiguration",
970 machine_get_smp
, machine_set_smp
,
972 object_class_property_set_description(oc
, "smp",
975 object_class_property_add(oc
, "phandle-start", "int",
976 machine_get_phandle_start
, machine_set_phandle_start
,
978 object_class_property_set_description(oc
, "phandle-start",
979 "The first phandle ID we may generate dynamically");
981 object_class_property_add_str(oc
, "dt-compatible",
982 machine_get_dt_compatible
, machine_set_dt_compatible
);
983 object_class_property_set_description(oc
, "dt-compatible",
984 "Overrides the \"compatible\" property of the dt root node");
986 object_class_property_add_bool(oc
, "dump-guest-core",
987 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
988 object_class_property_set_description(oc
, "dump-guest-core",
989 "Include guest memory in a core dump");
991 object_class_property_add_bool(oc
, "mem-merge",
992 machine_get_mem_merge
, machine_set_mem_merge
);
993 object_class_property_set_description(oc
, "mem-merge",
994 "Enable/disable memory merge support");
996 object_class_property_add_bool(oc
, "usb",
997 machine_get_usb
, machine_set_usb
);
998 object_class_property_set_description(oc
, "usb",
999 "Set on/off to enable/disable usb");
1001 object_class_property_add_bool(oc
, "graphics",
1002 machine_get_graphics
, machine_set_graphics
);
1003 object_class_property_set_description(oc
, "graphics",
1004 "Set on/off to enable/disable graphics emulation");
1006 object_class_property_add_str(oc
, "firmware",
1007 machine_get_firmware
, machine_set_firmware
);
1008 object_class_property_set_description(oc
, "firmware",
1011 object_class_property_add_bool(oc
, "suppress-vmdesc",
1012 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
1013 object_class_property_set_description(oc
, "suppress-vmdesc",
1014 "Set on to disable self-describing migration");
1016 object_class_property_add_link(oc
, "confidential-guest-support",
1017 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
1018 offsetof(MachineState
, cgs
),
1019 machine_check_confidential_guest_support
,
1020 OBJ_PROP_LINK_STRONG
);
1021 object_class_property_set_description(oc
, "confidential-guest-support",
1022 "Set confidential guest scheme to support");
1024 /* For compatibility */
1025 object_class_property_add_str(oc
, "memory-encryption",
1026 machine_get_memory_encryption
, machine_set_memory_encryption
);
1027 object_class_property_set_description(oc
, "memory-encryption",
1028 "Set memory encryption object to use");
1030 object_class_property_add_link(oc
, "memory-backend", TYPE_MEMORY_BACKEND
,
1031 offsetof(MachineState
, memdev
), object_property_allow_set_link
,
1032 OBJ_PROP_LINK_STRONG
);
1033 object_class_property_set_description(oc
, "memory-backend",
1035 "Valid value is ID of hostmem based backend");
1037 object_class_property_add(oc
, "memory", "MemorySizeConfiguration",
1038 machine_get_mem
, machine_set_mem
,
1040 object_class_property_set_description(oc
, "memory",
1041 "Memory size configuration");
1044 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
1046 MachineClass
*mc
= MACHINE_CLASS(oc
);
1047 mc
->max_cpus
= mc
->max_cpus
?: 1;
1048 mc
->min_cpus
= mc
->min_cpus
?: 1;
1049 mc
->default_cpus
= mc
->default_cpus
?: 1;
1051 if (!object_class_is_abstract(oc
)) {
1052 const char *cname
= object_class_get_name(oc
);
1053 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
1054 mc
->name
= g_strndup(cname
,
1055 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
1056 mc
->compat_props
= g_ptr_array_new();
1060 static void machine_initfn(Object
*obj
)
1062 MachineState
*ms
= MACHINE(obj
);
1063 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
1065 container_get(obj
, "/peripheral");
1066 container_get(obj
, "/peripheral-anon");
1068 ms
->dump_guest_core
= true;
1069 ms
->mem_merge
= true;
1070 ms
->enable_graphics
= true;
1071 ms
->kernel_cmdline
= g_strdup("");
1072 ms
->ram_size
= mc
->default_ram_size
;
1073 ms
->maxram_size
= mc
->default_ram_size
;
1075 if (mc
->nvdimm_supported
) {
1076 Object
*obj
= OBJECT(ms
);
1078 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
1079 object_property_add_bool(obj
, "nvdimm",
1080 machine_get_nvdimm
, machine_set_nvdimm
);
1081 object_property_set_description(obj
, "nvdimm",
1082 "Set on/off to enable/disable "
1083 "NVDIMM instantiation");
1085 object_property_add_str(obj
, "nvdimm-persistence",
1086 machine_get_nvdimm_persistence
,
1087 machine_set_nvdimm_persistence
);
1088 object_property_set_description(obj
, "nvdimm-persistence",
1089 "Set NVDIMM persistence"
1090 "Valid values are cpu, mem-ctrl");
1093 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
1094 ms
->numa_state
= g_new0(NumaState
, 1);
1095 object_property_add_bool(obj
, "hmat",
1096 machine_get_hmat
, machine_set_hmat
);
1097 object_property_set_description(obj
, "hmat",
1098 "Set on/off to enable/disable "
1099 "ACPI Heterogeneous Memory Attribute "
1103 /* default to mc->default_cpus */
1104 ms
->smp
.cpus
= mc
->default_cpus
;
1105 ms
->smp
.max_cpus
= mc
->default_cpus
;
1106 ms
->smp
.sockets
= 1;
1108 ms
->smp
.clusters
= 1;
1110 ms
->smp
.threads
= 1;
1112 machine_copy_boot_config(ms
, &(BootConfiguration
){ 0 });
1115 static void machine_finalize(Object
*obj
)
1117 MachineState
*ms
= MACHINE(obj
);
1119 machine_free_boot_config(ms
);
1120 g_free(ms
->kernel_filename
);
1121 g_free(ms
->initrd_filename
);
1122 g_free(ms
->kernel_cmdline
);
1124 g_free(ms
->dumpdtb
);
1125 g_free(ms
->dt_compatible
);
1126 g_free(ms
->firmware
);
1127 g_free(ms
->device_memory
);
1128 g_free(ms
->nvdimms_state
);
1129 g_free(ms
->numa_state
);
1132 bool machine_usb(MachineState
*machine
)
1134 return machine
->usb
;
1137 int machine_phandle_start(MachineState
*machine
)
1139 return machine
->phandle_start
;
1142 bool machine_dump_guest_core(MachineState
*machine
)
1144 return machine
->dump_guest_core
;
1147 bool machine_mem_merge(MachineState
*machine
)
1149 return machine
->mem_merge
;
1152 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
1154 GString
*s
= g_string_new(NULL
);
1155 if (cpu
->props
.has_socket_id
) {
1156 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1158 if (cpu
->props
.has_die_id
) {
1160 g_string_append_printf(s
, ", ");
1162 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1164 if (cpu
->props
.has_cluster_id
) {
1166 g_string_append_printf(s
, ", ");
1168 g_string_append_printf(s
, "cluster-id: %"PRId64
, cpu
->props
.cluster_id
);
1170 if (cpu
->props
.has_core_id
) {
1172 g_string_append_printf(s
, ", ");
1174 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1176 if (cpu
->props
.has_thread_id
) {
1178 g_string_append_printf(s
, ", ");
1180 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1182 return g_string_free(s
, false);
1185 static void numa_validate_initiator(NumaState
*numa_state
)
1188 NodeInfo
*numa_info
= numa_state
->nodes
;
1190 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1191 if (numa_info
[i
].initiator
== MAX_NODES
) {
1195 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1196 error_report("NUMA node %" PRIu16
" is missing, use "
1197 "'-numa node' option to declare it first",
1198 numa_info
[i
].initiator
);
1202 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1203 error_report("The initiator of NUMA node %d is invalid", i
);
1209 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1212 bool default_mapping
;
1213 GString
*s
= g_string_new(NULL
);
1214 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1215 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1217 assert(machine
->numa_state
->num_nodes
);
1218 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1219 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1223 default_mapping
= (i
== possible_cpus
->len
);
1225 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1226 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1228 if (!cpu_slot
->props
.has_node_id
) {
1229 /* fetch default mapping from board and enable it */
1230 CpuInstanceProperties props
= cpu_slot
->props
;
1232 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1233 if (!default_mapping
) {
1234 /* record slots with not set mapping,
1235 * TODO: make it hard error in future */
1236 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1237 g_string_append_printf(s
, "%sCPU %d [%s]",
1238 s
->len
? ", " : "", i
, cpu_str
);
1241 /* non mapped cpus used to fallback to node 0 */
1245 props
.has_node_id
= true;
1246 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1250 if (machine
->numa_state
->hmat_enabled
) {
1251 numa_validate_initiator(machine
->numa_state
);
1254 if (s
->len
&& !qtest_enabled()) {
1255 warn_report("CPU(s) not present in any NUMA nodes: %s",
1257 warn_report("All CPU(s) up to maxcpus should be described "
1258 "in NUMA config, ability to start up with partial NUMA "
1259 "mappings is obsoleted and will be removed in future");
1261 g_string_free(s
, true);
1264 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1265 HostMemoryBackend
*backend
)
1267 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1269 if (host_memory_backend_is_mapped(backend
)) {
1270 error_report("memory backend %s can't be used multiple times.",
1271 object_get_canonical_path_component(OBJECT(backend
)));
1274 host_memory_backend_set_mapped(backend
, true);
1275 vmstate_register_ram_global(ret
);
1279 static bool create_default_memdev(MachineState
*ms
, const char *path
, Error
**errp
)
1282 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1285 obj
= object_new(path
? TYPE_MEMORY_BACKEND_FILE
: TYPE_MEMORY_BACKEND_RAM
);
1287 if (!object_property_set_str(obj
, "mem-path", path
, errp
)) {
1291 if (!object_property_set_int(obj
, "size", ms
->ram_size
, errp
)) {
1294 object_property_add_child(object_get_objects_root(), mc
->default_ram_id
,
1296 /* Ensure backend's memory region name is equal to mc->default_ram_id */
1297 if (!object_property_set_bool(obj
, "x-use-canonical-path-for-ramblock-id",
1301 if (!user_creatable_complete(USER_CREATABLE(obj
), errp
)) {
1304 r
= object_property_set_link(OBJECT(ms
), "memory-backend", obj
, errp
);
1312 void machine_run_board_init(MachineState
*machine
, const char *mem_path
, Error
**errp
)
1314 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1315 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1318 /* This checkpoint is required by replay to separate prior clock
1319 reading from the other reads, because timer polling functions query
1320 clock values from the log. */
1321 replay_checkpoint(CHECKPOINT_INIT
);
1323 if (!xen_enabled()) {
1324 /* On 32-bit hosts, QEMU is limited by virtual address space */
1325 if (machine
->ram_size
> (2047 << 20) && HOST_LONG_BITS
== 32) {
1326 error_setg(errp
, "at most 2047 MB RAM can be simulated");
1331 if (machine
->memdev
) {
1332 ram_addr_t backend_size
= object_property_get_uint(OBJECT(machine
->memdev
),
1333 "size", &error_abort
);
1334 if (backend_size
!= machine
->ram_size
) {
1335 error_setg(errp
, "Machine memory size does not match the size of the memory backend");
1338 } else if (machine_class
->default_ram_id
&& machine
->ram_size
&&
1339 numa_uses_legacy_mem()) {
1340 if (!create_default_memdev(current_machine
, mem_path
, errp
)) {
1345 if (machine
->numa_state
) {
1346 numa_complete_configuration(machine
);
1347 if (machine
->numa_state
->num_nodes
) {
1348 machine_numa_finish_cpu_init(machine
);
1352 if (!machine
->ram
&& machine
->memdev
) {
1353 machine
->ram
= machine_consume_memdev(machine
, machine
->memdev
);
1356 /* If the machine supports the valid_cpu_types check and the user
1357 * specified a CPU with -cpu check here that the user CPU is supported.
1359 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1362 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1363 if (object_class_dynamic_cast(oc
,
1364 machine_class
->valid_cpu_types
[i
])) {
1365 /* The user specificed CPU is in the valid field, we are
1372 if (!machine_class
->valid_cpu_types
[i
]) {
1373 /* The user specified CPU is not valid */
1374 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1375 error_printf("The valid types are: %s",
1376 machine_class
->valid_cpu_types
[0]);
1377 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1378 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1386 /* Check if CPU type is deprecated and warn if so */
1388 if (cc
&& cc
->deprecation_note
) {
1389 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1390 cc
->deprecation_note
);
1395 * With confidential guests, the host can't see the real
1396 * contents of RAM, so there's no point in it trying to merge
1399 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1402 * Virtio devices can't count on directly accessing guest
1403 * memory, so they need iommu_platform=on to use normal DMA
1404 * mechanisms. That requires also disabling legacy virtio
1405 * support for those virtio pci devices which allow it.
1407 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1409 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1413 accel_init_interfaces(ACCEL_GET_CLASS(machine
->accelerator
));
1414 machine_class
->init(machine
);
1415 phase_advance(PHASE_MACHINE_INITIALIZED
);
1418 static NotifierList machine_init_done_notifiers
=
1419 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1421 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1423 notifier_list_add(&machine_init_done_notifiers
, notify
);
1424 if (phase_check(PHASE_MACHINE_READY
)) {
1425 notify
->notify(notify
, NULL
);
1429 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1431 notifier_remove(notify
);
1434 void qdev_machine_creation_done(void)
1436 cpu_synchronize_all_post_init();
1438 if (current_machine
->boot_config
.once
) {
1439 qemu_boot_set(current_machine
->boot_config
.once
, &error_fatal
);
1440 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_config
.order
));
1444 * ok, initial machine setup is done, starting from now we can
1445 * only create hotpluggable devices
1447 phase_advance(PHASE_MACHINE_READY
);
1448 qdev_assert_realized_properly();
1450 /* TODO: once all bus devices are qdevified, this should be done
1451 * when bus is created by qdev.c */
1453 * TODO: If we had a main 'reset container' that the whole system
1454 * lived in, we could reset that using the multi-phase reset
1455 * APIs. For the moment, we just reset the sysbus, which will cause
1456 * all devices hanging off it (and all their child buses, recursively)
1457 * to be reset. Note that this will *not* reset any Device objects
1458 * which are not attached to some part of the qbus tree!
1460 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1462 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1464 if (rom_check_and_register_reset() != 0) {
1470 /* This checkpoint is required by replay to separate prior clock
1471 reading from the other reads, because timer polling functions query
1472 clock values from the log. */
1473 replay_checkpoint(CHECKPOINT_RESET
);
1474 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1475 register_global_state();
1478 static const TypeInfo machine_info
= {
1479 .name
= TYPE_MACHINE
,
1480 .parent
= TYPE_OBJECT
,
1482 .class_size
= sizeof(MachineClass
),
1483 .class_init
= machine_class_init
,
1484 .class_base_init
= machine_class_base_init
,
1485 .instance_size
= sizeof(MachineState
),
1486 .instance_init
= machine_initfn
,
1487 .instance_finalize
= machine_finalize
,
1490 static void machine_register_types(void)
1492 type_register_static(&machine_info
);
1495 type_init(machine_register_types
)