2 * Copyright (c) 2003-2004 Fabrice Bellard
3 * Copyright (c) 2019 Red Hat, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 #include "qemu/osdep.h"
24 #include "qemu/error-report.h"
25 #include "qemu/option.h"
26 #include "qemu/cutils.h"
27 #include "qemu/units.h"
28 #include "qemu-common.h"
29 #include "qapi/error.h"
30 #include "qapi/qmp/qerror.h"
31 #include "qapi/qapi-visit-common.h"
32 #include "qapi/visitor.h"
33 #include "sysemu/qtest.h"
34 #include "sysemu/numa.h"
35 #include "sysemu/replay.h"
36 #include "sysemu/sysemu.h"
39 #include "hw/i386/x86.h"
40 #include "target/i386/cpu.h"
41 #include "hw/i386/topology.h"
42 #include "hw/i386/fw_cfg.h"
43 #include "hw/intc/i8259.h"
45 #include "hw/acpi/cpu_hotplug.h"
48 #include "hw/loader.h"
49 #include "multiboot.h"
51 #include "standard-headers/asm-x86/bootparam.h"
52 #include "config-devices.h"
55 #define BIOS_FILENAME "bios.bin"
57 /* Physical Address of PVH entry point read from kernel ELF NOTE */
58 static size_t pvh_start_addr
;
60 inline void init_topo_info(X86CPUTopoInfo
*topo_info
,
61 const X86MachineState
*x86ms
)
63 MachineState
*ms
= MACHINE(x86ms
);
65 topo_info
->nodes_per_pkg
= ms
->numa_state
->num_nodes
/ ms
->smp
.sockets
;
66 topo_info
->dies_per_pkg
= x86ms
->smp_dies
;
67 topo_info
->cores_per_die
= ms
->smp
.cores
;
68 topo_info
->threads_per_core
= ms
->smp
.threads
;
72 * Set up with the new EPYC topology handlers
74 * AMD uses different apic id encoding for EPYC based cpus. Override
75 * the default topo handlers with EPYC encoding handlers.
77 static void x86_set_epyc_topo_handlers(MachineState
*machine
)
79 X86MachineState
*x86ms
= X86_MACHINE(machine
);
81 x86ms
->apicid_from_cpu_idx
= x86_apicid_from_cpu_idx_epyc
;
82 x86ms
->topo_ids_from_apicid
= x86_topo_ids_from_apicid_epyc
;
83 x86ms
->apicid_from_topo_ids
= x86_apicid_from_topo_ids_epyc
;
84 x86ms
->apicid_pkg_offset
= apicid_pkg_offset_epyc
;
88 * Calculates initial APIC ID for a specific CPU index
90 * Currently we need to be able to calculate the APIC ID from the CPU index
91 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
92 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
93 * all CPUs up to max_cpus.
95 uint32_t x86_cpu_apic_id_from_index(X86MachineState
*x86ms
,
96 unsigned int cpu_index
)
98 X86MachineClass
*x86mc
= X86_MACHINE_GET_CLASS(x86ms
);
99 X86CPUTopoInfo topo_info
;
103 init_topo_info(&topo_info
, x86ms
);
105 correct_id
= x86ms
->apicid_from_cpu_idx(&topo_info
, cpu_index
);
106 if (x86mc
->compat_apic_id_mode
) {
107 if (cpu_index
!= correct_id
&& !warned
&& !qtest_enabled()) {
108 error_report("APIC IDs set in compatibility mode, "
109 "CPU topology won't match the configuration");
119 void x86_cpu_new(X86MachineState
*x86ms
, int64_t apic_id
, Error
**errp
)
121 Error
*local_err
= NULL
;
122 Object
*cpu
= object_new(MACHINE(x86ms
)->cpu_type
);
124 if (!object_property_set_uint(cpu
, "apic-id", apic_id
, &local_err
)) {
127 qdev_realize(DEVICE(cpu
), NULL
, &local_err
);
131 error_propagate(errp
, local_err
);
134 void x86_cpus_init(X86MachineState
*x86ms
, int default_cpu_version
)
137 const CPUArchIdList
*possible_cpus
;
138 MachineState
*ms
= MACHINE(x86ms
);
139 MachineClass
*mc
= MACHINE_GET_CLASS(x86ms
);
141 /* Check for apicid encoding */
142 if (cpu_x86_use_epyc_apic_id_encoding(ms
->cpu_type
)) {
143 x86_set_epyc_topo_handlers(ms
);
146 x86_cpu_set_default_version(default_cpu_version
);
149 * Calculates the limit to CPU APIC ID values
151 * Limit for the APIC ID value, so that all
152 * CPU APIC IDs are < x86ms->apic_id_limit.
154 * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
156 x86ms
->apic_id_limit
= x86_cpu_apic_id_from_index(x86ms
,
157 ms
->smp
.max_cpus
- 1) + 1;
158 possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
160 for (i
= 0; i
< ms
->possible_cpus
->len
; i
++) {
161 ms
->possible_cpus
->cpus
[i
].arch_id
=
162 x86_cpu_apic_id_from_index(x86ms
, i
);
165 for (i
= 0; i
< ms
->smp
.cpus
; i
++) {
166 x86_cpu_new(x86ms
, possible_cpus
->cpus
[i
].arch_id
, &error_fatal
);
170 CpuInstanceProperties
171 x86_cpu_index_to_props(MachineState
*ms
, unsigned cpu_index
)
173 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
174 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(ms
);
176 assert(cpu_index
< possible_cpus
->len
);
177 return possible_cpus
->cpus
[cpu_index
].props
;
180 int64_t x86_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
182 X86CPUTopoIDs topo_ids
;
183 X86MachineState
*x86ms
= X86_MACHINE(ms
);
184 X86CPUTopoInfo topo_info
;
186 init_topo_info(&topo_info
, x86ms
);
188 assert(idx
< ms
->possible_cpus
->len
);
189 x86_topo_ids_from_idx(&topo_info
, idx
, &topo_ids
);
190 return topo_ids
.pkg_id
% ms
->numa_state
->num_nodes
;
193 const CPUArchIdList
*x86_possible_cpu_arch_ids(MachineState
*ms
)
195 X86MachineState
*x86ms
= X86_MACHINE(ms
);
196 unsigned int max_cpus
= ms
->smp
.max_cpus
;
197 X86CPUTopoInfo topo_info
;
200 if (ms
->possible_cpus
) {
202 * make sure that max_cpus hasn't changed since the first use, i.e.
203 * -smp hasn't been parsed after it
205 assert(ms
->possible_cpus
->len
== max_cpus
);
206 return ms
->possible_cpus
;
209 ms
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
210 sizeof(CPUArchId
) * max_cpus
);
211 ms
->possible_cpus
->len
= max_cpus
;
213 init_topo_info(&topo_info
, x86ms
);
215 for (i
= 0; i
< ms
->possible_cpus
->len
; i
++) {
216 X86CPUTopoIDs topo_ids
;
218 ms
->possible_cpus
->cpus
[i
].type
= ms
->cpu_type
;
219 ms
->possible_cpus
->cpus
[i
].vcpus_count
= 1;
220 x86_topo_ids_from_idx(&topo_info
, i
, &topo_ids
);
221 ms
->possible_cpus
->cpus
[i
].props
.has_socket_id
= true;
222 ms
->possible_cpus
->cpus
[i
].props
.socket_id
= topo_ids
.pkg_id
;
223 if (x86ms
->smp_dies
> 1) {
224 ms
->possible_cpus
->cpus
[i
].props
.has_die_id
= true;
225 ms
->possible_cpus
->cpus
[i
].props
.die_id
= topo_ids
.die_id
;
227 ms
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
228 ms
->possible_cpus
->cpus
[i
].props
.core_id
= topo_ids
.core_id
;
229 ms
->possible_cpus
->cpus
[i
].props
.has_thread_id
= true;
230 ms
->possible_cpus
->cpus
[i
].props
.thread_id
= topo_ids
.smt_id
;
232 return ms
->possible_cpus
;
235 static void x86_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
237 /* cpu index isn't used */
241 X86CPU
*cpu
= X86_CPU(cs
);
243 if (!cpu
->apic_state
) {
244 cpu_interrupt(cs
, CPU_INTERRUPT_NMI
);
246 apic_deliver_nmi(cpu
->apic_state
);
251 static long get_file_size(FILE *f
)
255 /* XXX: on Unix systems, using fstat() probably makes more sense */
258 fseek(f
, 0, SEEK_END
);
260 fseek(f
, where
, SEEK_SET
);
266 uint64_t cpu_get_tsc(CPUX86State
*env
)
268 return cpu_get_ticks();
272 static void pic_irq_request(void *opaque
, int irq
, int level
)
274 CPUState
*cs
= first_cpu
;
275 X86CPU
*cpu
= X86_CPU(cs
);
277 trace_x86_pic_interrupt(irq
, level
);
278 if (cpu
->apic_state
&& !kvm_irqchip_in_kernel()) {
281 if (apic_accept_pic_intr(cpu
->apic_state
)) {
282 apic_deliver_pic_intr(cpu
->apic_state
, level
);
287 cpu_interrupt(cs
, CPU_INTERRUPT_HARD
);
289 cpu_reset_interrupt(cs
, CPU_INTERRUPT_HARD
);
294 qemu_irq
x86_allocate_cpu_irq(void)
296 return qemu_allocate_irq(pic_irq_request
, NULL
, 0);
299 int cpu_get_pic_interrupt(CPUX86State
*env
)
301 X86CPU
*cpu
= env_archcpu(env
);
304 if (!kvm_irqchip_in_kernel()) {
305 intno
= apic_get_interrupt(cpu
->apic_state
);
309 /* read the irq from the PIC */
310 if (!apic_accept_pic_intr(cpu
->apic_state
)) {
315 intno
= pic_read_irq(isa_pic
);
319 DeviceState
*cpu_get_current_apic(void)
322 X86CPU
*cpu
= X86_CPU(current_cpu
);
323 return cpu
->apic_state
;
329 void gsi_handler(void *opaque
, int n
, int level
)
331 GSIState
*s
= opaque
;
333 trace_x86_gsi_interrupt(n
, level
);
334 if (n
< ISA_NUM_IRQS
) {
335 /* Under KVM, Kernel will forward to both PIC and IOAPIC */
336 qemu_set_irq(s
->i8259_irq
[n
], level
);
338 qemu_set_irq(s
->ioapic_irq
[n
], level
);
341 void ioapic_init_gsi(GSIState
*gsi_state
, const char *parent_name
)
348 if (kvm_ioapic_in_kernel()) {
349 dev
= qdev_new(TYPE_KVM_IOAPIC
);
351 dev
= qdev_new(TYPE_IOAPIC
);
353 object_property_add_child(object_resolve_path(parent_name
, NULL
),
354 "ioapic", OBJECT(dev
));
355 d
= SYS_BUS_DEVICE(dev
);
356 sysbus_realize_and_unref(d
, &error_fatal
);
357 sysbus_mmio_map(d
, 0, IO_APIC_DEFAULT_ADDRESS
);
359 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
360 gsi_state
->ioapic_irq
[i
] = qdev_get_gpio_in(dev
, i
);
369 } __attribute__((packed
));
373 * The entry point into the kernel for PVH boot is different from
374 * the native entry point. The PVH entry is defined by the x86/HVM
375 * direct boot ABI and is available in an ELFNOTE in the kernel binary.
377 * This function is passed to load_elf() when it is called from
378 * load_elfboot() which then additionally checks for an ELF Note of
379 * type XEN_ELFNOTE_PHYS32_ENTRY and passes it to this function to
380 * parse the PVH entry address from the ELF Note.
382 * Due to trickery in elf_opts.h, load_elf() is actually available as
383 * load_elf32() or load_elf64() and this routine needs to be able
384 * to deal with being called as 32 or 64 bit.
386 * The address of the PVH entry point is saved to the 'pvh_start_addr'
387 * global variable. (although the entry point is 32-bit, the kernel
388 * binary can be either 32-bit or 64-bit).
390 static uint64_t read_pvh_start_addr(void *arg1
, void *arg2
, bool is64
)
392 size_t *elf_note_data_addr
;
394 /* Check if ELF Note header passed in is valid */
400 struct elf64_note
*nhdr64
= (struct elf64_note
*)arg1
;
401 uint64_t nhdr_size64
= sizeof(struct elf64_note
);
402 uint64_t phdr_align
= *(uint64_t *)arg2
;
403 uint64_t nhdr_namesz
= nhdr64
->n_namesz
;
406 ((void *)nhdr64
) + nhdr_size64
+
407 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
409 struct elf32_note
*nhdr32
= (struct elf32_note
*)arg1
;
410 uint32_t nhdr_size32
= sizeof(struct elf32_note
);
411 uint32_t phdr_align
= *(uint32_t *)arg2
;
412 uint32_t nhdr_namesz
= nhdr32
->n_namesz
;
415 ((void *)nhdr32
) + nhdr_size32
+
416 QEMU_ALIGN_UP(nhdr_namesz
, phdr_align
);
419 pvh_start_addr
= *elf_note_data_addr
;
421 return pvh_start_addr
;
424 static bool load_elfboot(const char *kernel_filename
,
425 int kernel_file_size
,
427 size_t pvh_xen_start_addr
,
431 uint32_t mh_load_addr
= 0;
432 uint32_t elf_kernel_size
= 0;
434 uint64_t elf_low
, elf_high
;
437 if (ldl_p(header
) != 0x464c457f) {
438 return false; /* no elfboot */
441 bool elf_is64
= header
[EI_CLASS
] == ELFCLASS64
;
443 ((Elf64_Ehdr
*)header
)->e_flags
: ((Elf32_Ehdr
*)header
)->e_flags
;
445 if (flags
& 0x00010004) { /* LOAD_ELF_HEADER_HAS_ADDR */
446 error_report("elfboot unsupported flags = %x", flags
);
450 uint64_t elf_note_type
= XEN_ELFNOTE_PHYS32_ENTRY
;
451 kernel_size
= load_elf(kernel_filename
, read_pvh_start_addr
,
452 NULL
, &elf_note_type
, &elf_entry
,
453 &elf_low
, &elf_high
, NULL
, 0, I386_ELF_MACHINE
,
456 if (kernel_size
< 0) {
457 error_report("Error while loading elf kernel");
460 mh_load_addr
= elf_low
;
461 elf_kernel_size
= elf_high
- elf_low
;
463 if (pvh_start_addr
== 0) {
464 error_report("Error loading uncompressed kernel without PVH ELF Note");
467 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ENTRY
, pvh_start_addr
);
468 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, mh_load_addr
);
469 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, elf_kernel_size
);
474 void x86_load_linux(X86MachineState
*x86ms
,
478 bool linuxboot_dma_enabled
)
481 int setup_size
, kernel_size
, cmdline_size
;
482 int dtb_size
, setup_data_offset
;
484 uint8_t header
[8192], *setup
, *kernel
;
485 hwaddr real_addr
, prot_addr
, cmdline_addr
, initrd_addr
= 0;
488 MachineState
*machine
= MACHINE(x86ms
);
489 struct setup_data
*setup_data
;
490 const char *kernel_filename
= machine
->kernel_filename
;
491 const char *initrd_filename
= machine
->initrd_filename
;
492 const char *dtb_filename
= machine
->dtb
;
493 const char *kernel_cmdline
= machine
->kernel_cmdline
;
495 /* Align to 16 bytes as a paranoia measure */
496 cmdline_size
= (strlen(kernel_cmdline
) + 16) & ~15;
498 /* load the kernel header */
499 f
= fopen(kernel_filename
, "rb");
501 fprintf(stderr
, "qemu: could not open kernel file '%s': %s\n",
502 kernel_filename
, strerror(errno
));
506 kernel_size
= get_file_size(f
);
508 fread(header
, 1, MIN(ARRAY_SIZE(header
), kernel_size
), f
) !=
509 MIN(ARRAY_SIZE(header
), kernel_size
)) {
510 fprintf(stderr
, "qemu: could not load kernel '%s': %s\n",
511 kernel_filename
, strerror(errno
));
515 /* kernel protocol version */
516 if (ldl_p(header
+ 0x202) == 0x53726448) {
517 protocol
= lduw_p(header
+ 0x206);
520 * This could be a multiboot kernel. If it is, let's stop treating it
521 * like a Linux kernel.
522 * Note: some multiboot images could be in the ELF format (the same of
523 * PVH), so we try multiboot first since we check the multiboot magic
524 * header before to load it.
526 if (load_multiboot(fw_cfg
, f
, kernel_filename
, initrd_filename
,
527 kernel_cmdline
, kernel_size
, header
)) {
531 * Check if the file is an uncompressed kernel file (ELF) and load it,
532 * saving the PVH entry point used by the x86/HVM direct boot ABI.
533 * If load_elfboot() is successful, populate the fw_cfg info.
536 load_elfboot(kernel_filename
, kernel_size
,
537 header
, pvh_start_addr
, fw_cfg
)) {
540 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
,
541 strlen(kernel_cmdline
) + 1);
542 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
544 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, sizeof(header
));
545 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
,
546 header
, sizeof(header
));
549 if (initrd_filename
) {
550 GMappedFile
*mapped_file
;
555 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
557 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
558 initrd_filename
, gerr
->message
);
561 x86ms
->initrd_mapped_file
= mapped_file
;
563 initrd_data
= g_mapped_file_get_contents(mapped_file
);
564 initrd_size
= g_mapped_file_get_length(mapped_file
);
565 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
566 if (initrd_size
>= initrd_max
) {
567 fprintf(stderr
, "qemu: initrd is too large, cannot support."
568 "(max: %"PRIu32
", need %"PRId64
")\n",
569 initrd_max
, (uint64_t)initrd_size
);
573 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
575 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
576 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
577 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
,
581 option_rom
[nb_option_roms
].bootindex
= 0;
582 option_rom
[nb_option_roms
].name
= "pvh.bin";
590 if (protocol
< 0x200 || !(header
[0x211] & 0x01)) {
593 cmdline_addr
= 0x9a000 - cmdline_size
;
595 } else if (protocol
< 0x202) {
596 /* High but ancient kernel */
598 cmdline_addr
= 0x9a000 - cmdline_size
;
599 prot_addr
= 0x100000;
601 /* High and recent kernel */
603 cmdline_addr
= 0x20000;
604 prot_addr
= 0x100000;
607 /* highest address for loading the initrd */
608 if (protocol
>= 0x20c &&
609 lduw_p(header
+ 0x236) & XLF_CAN_BE_LOADED_ABOVE_4G
) {
611 * Linux has supported initrd up to 4 GB for a very long time (2007,
612 * long before XLF_CAN_BE_LOADED_ABOVE_4G which was added in 2013),
613 * though it only sets initrd_max to 2 GB to "work around bootloader
614 * bugs". Luckily, QEMU firmware(which does something like bootloader)
615 * has supported this.
617 * It's believed that if XLF_CAN_BE_LOADED_ABOVE_4G is set, initrd can
618 * be loaded into any address.
620 * In addition, initrd_max is uint32_t simply because QEMU doesn't
621 * support the 64-bit boot protocol (specifically the ext_ramdisk_image
624 * Therefore here just limit initrd_max to UINT32_MAX simply as well.
626 initrd_max
= UINT32_MAX
;
627 } else if (protocol
>= 0x203) {
628 initrd_max
= ldl_p(header
+ 0x22c);
630 initrd_max
= 0x37ffffff;
633 if (initrd_max
>= x86ms
->below_4g_mem_size
- acpi_data_size
) {
634 initrd_max
= x86ms
->below_4g_mem_size
- acpi_data_size
- 1;
637 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_ADDR
, cmdline_addr
);
638 fw_cfg_add_i32(fw_cfg
, FW_CFG_CMDLINE_SIZE
, strlen(kernel_cmdline
) + 1);
639 fw_cfg_add_string(fw_cfg
, FW_CFG_CMDLINE_DATA
, kernel_cmdline
);
641 if (protocol
>= 0x202) {
642 stl_p(header
+ 0x228, cmdline_addr
);
644 stw_p(header
+ 0x20, 0xA33F);
645 stw_p(header
+ 0x22, cmdline_addr
- real_addr
);
648 /* handle vga= parameter */
649 vmode
= strstr(kernel_cmdline
, "vga=");
651 unsigned int video_mode
;
656 if (!strncmp(vmode
, "normal", 6)) {
658 } else if (!strncmp(vmode
, "ext", 3)) {
660 } else if (!strncmp(vmode
, "ask", 3)) {
663 ret
= qemu_strtoui(vmode
, &end
, 0, &video_mode
);
664 if (ret
!= 0 || (*end
&& *end
!= ' ')) {
665 fprintf(stderr
, "qemu: invalid 'vga=' kernel parameter.\n");
669 stw_p(header
+ 0x1fa, video_mode
);
674 * High nybble = B reserved for QEMU; low nybble is revision number.
675 * If this code is substantially changed, you may want to consider
676 * incrementing the revision.
678 if (protocol
>= 0x200) {
679 header
[0x210] = 0xB0;
682 if (protocol
>= 0x201) {
683 header
[0x211] |= 0x80; /* CAN_USE_HEAP */
684 stw_p(header
+ 0x224, cmdline_addr
- real_addr
- 0x200);
688 if (initrd_filename
) {
689 GMappedFile
*mapped_file
;
694 if (protocol
< 0x200) {
695 fprintf(stderr
, "qemu: linux kernel too old to load a ram disk\n");
699 mapped_file
= g_mapped_file_new(initrd_filename
, false, &gerr
);
701 fprintf(stderr
, "qemu: error reading initrd %s: %s\n",
702 initrd_filename
, gerr
->message
);
705 x86ms
->initrd_mapped_file
= mapped_file
;
707 initrd_data
= g_mapped_file_get_contents(mapped_file
);
708 initrd_size
= g_mapped_file_get_length(mapped_file
);
709 if (initrd_size
>= initrd_max
) {
710 fprintf(stderr
, "qemu: initrd is too large, cannot support."
711 "(max: %"PRIu32
", need %"PRId64
")\n",
712 initrd_max
, (uint64_t)initrd_size
);
716 initrd_addr
= (initrd_max
- initrd_size
) & ~4095;
718 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_addr
);
719 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
720 fw_cfg_add_bytes(fw_cfg
, FW_CFG_INITRD_DATA
, initrd_data
, initrd_size
);
722 stl_p(header
+ 0x218, initrd_addr
);
723 stl_p(header
+ 0x21c, initrd_size
);
726 /* load kernel and setup */
727 setup_size
= header
[0x1f1];
728 if (setup_size
== 0) {
731 setup_size
= (setup_size
+ 1) * 512;
732 if (setup_size
> kernel_size
) {
733 fprintf(stderr
, "qemu: invalid kernel header\n");
736 kernel_size
-= setup_size
;
738 setup
= g_malloc(setup_size
);
739 kernel
= g_malloc(kernel_size
);
740 fseek(f
, 0, SEEK_SET
);
741 if (fread(setup
, 1, setup_size
, f
) != setup_size
) {
742 fprintf(stderr
, "fread() failed\n");
745 if (fread(kernel
, 1, kernel_size
, f
) != kernel_size
) {
746 fprintf(stderr
, "fread() failed\n");
751 /* append dtb to kernel */
753 if (protocol
< 0x209) {
754 fprintf(stderr
, "qemu: Linux kernel too old to load a dtb\n");
758 dtb_size
= get_image_size(dtb_filename
);
760 fprintf(stderr
, "qemu: error reading dtb %s: %s\n",
761 dtb_filename
, strerror(errno
));
765 setup_data_offset
= QEMU_ALIGN_UP(kernel_size
, 16);
766 kernel_size
= setup_data_offset
+ sizeof(struct setup_data
) + dtb_size
;
767 kernel
= g_realloc(kernel
, kernel_size
);
769 stq_p(header
+ 0x250, prot_addr
+ setup_data_offset
);
771 setup_data
= (struct setup_data
*)(kernel
+ setup_data_offset
);
772 setup_data
->next
= 0;
773 setup_data
->type
= cpu_to_le32(SETUP_DTB
);
774 setup_data
->len
= cpu_to_le32(dtb_size
);
776 load_image_size(dtb_filename
, setup_data
->data
, dtb_size
);
779 memcpy(setup
, header
, MIN(sizeof(header
), setup_size
));
781 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, prot_addr
);
782 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
783 fw_cfg_add_bytes(fw_cfg
, FW_CFG_KERNEL_DATA
, kernel
, kernel_size
);
785 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_ADDR
, real_addr
);
786 fw_cfg_add_i32(fw_cfg
, FW_CFG_SETUP_SIZE
, setup_size
);
787 fw_cfg_add_bytes(fw_cfg
, FW_CFG_SETUP_DATA
, setup
, setup_size
);
789 option_rom
[nb_option_roms
].bootindex
= 0;
790 option_rom
[nb_option_roms
].name
= "linuxboot.bin";
791 if (linuxboot_dma_enabled
&& fw_cfg_dma_enabled(fw_cfg
)) {
792 option_rom
[nb_option_roms
].name
= "linuxboot_dma.bin";
797 void x86_bios_rom_init(MemoryRegion
*rom_memory
, bool isapc_ram_fw
)
800 MemoryRegion
*bios
, *isa_bios
;
801 int bios_size
, isa_bios_size
;
805 if (bios_name
== NULL
) {
806 bios_name
= BIOS_FILENAME
;
808 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
810 bios_size
= get_image_size(filename
);
814 if (bios_size
<= 0 ||
815 (bios_size
% 65536) != 0) {
818 bios
= g_malloc(sizeof(*bios
));
819 memory_region_init_ram(bios
, NULL
, "pc.bios", bios_size
, &error_fatal
);
821 memory_region_set_readonly(bios
, true);
823 ret
= rom_add_file_fixed(bios_name
, (uint32_t)(-bios_size
), -1);
826 fprintf(stderr
, "qemu: could not load PC BIOS '%s'\n", bios_name
);
831 /* map the last 128KB of the BIOS in ISA space */
832 isa_bios_size
= MIN(bios_size
, 128 * KiB
);
833 isa_bios
= g_malloc(sizeof(*isa_bios
));
834 memory_region_init_alias(isa_bios
, NULL
, "isa-bios", bios
,
835 bios_size
- isa_bios_size
, isa_bios_size
);
836 memory_region_add_subregion_overlap(rom_memory
,
837 0x100000 - isa_bios_size
,
841 memory_region_set_readonly(isa_bios
, true);
844 /* map all the bios at the top of memory */
845 memory_region_add_subregion(rom_memory
,
846 (uint32_t)(-bios_size
),
850 bool x86_machine_is_smm_enabled(X86MachineState
*x86ms
)
852 bool smm_available
= false;
854 if (x86ms
->smm
== ON_OFF_AUTO_OFF
) {
858 if (tcg_enabled() || qtest_enabled()) {
859 smm_available
= true;
860 } else if (kvm_enabled()) {
861 smm_available
= kvm_has_smm();
868 if (x86ms
->smm
== ON_OFF_AUTO_ON
) {
869 error_report("System Management Mode not supported by this hypervisor.");
875 static void x86_machine_get_smm(Object
*obj
, Visitor
*v
, const char *name
,
876 void *opaque
, Error
**errp
)
878 X86MachineState
*x86ms
= X86_MACHINE(obj
);
879 OnOffAuto smm
= x86ms
->smm
;
881 visit_type_OnOffAuto(v
, name
, &smm
, errp
);
884 static void x86_machine_set_smm(Object
*obj
, Visitor
*v
, const char *name
,
885 void *opaque
, Error
**errp
)
887 X86MachineState
*x86ms
= X86_MACHINE(obj
);
889 visit_type_OnOffAuto(v
, name
, &x86ms
->smm
, errp
);
892 bool x86_machine_is_acpi_enabled(X86MachineState
*x86ms
)
894 if (x86ms
->acpi
== ON_OFF_AUTO_OFF
) {
900 static void x86_machine_get_acpi(Object
*obj
, Visitor
*v
, const char *name
,
901 void *opaque
, Error
**errp
)
903 X86MachineState
*x86ms
= X86_MACHINE(obj
);
904 OnOffAuto acpi
= x86ms
->acpi
;
906 visit_type_OnOffAuto(v
, name
, &acpi
, errp
);
909 static void x86_machine_set_acpi(Object
*obj
, Visitor
*v
, const char *name
,
910 void *opaque
, Error
**errp
)
912 X86MachineState
*x86ms
= X86_MACHINE(obj
);
914 visit_type_OnOffAuto(v
, name
, &x86ms
->acpi
, errp
);
917 static void x86_machine_initfn(Object
*obj
)
919 X86MachineState
*x86ms
= X86_MACHINE(obj
);
921 x86ms
->smm
= ON_OFF_AUTO_AUTO
;
922 x86ms
->acpi
= ON_OFF_AUTO_AUTO
;
925 x86ms
->apicid_from_cpu_idx
= x86_apicid_from_cpu_idx
;
926 x86ms
->topo_ids_from_apicid
= x86_topo_ids_from_apicid
;
927 x86ms
->apicid_from_topo_ids
= x86_apicid_from_topo_ids
;
928 x86ms
->apicid_pkg_offset
= apicid_pkg_offset
;
931 static void x86_machine_class_init(ObjectClass
*oc
, void *data
)
933 MachineClass
*mc
= MACHINE_CLASS(oc
);
934 X86MachineClass
*x86mc
= X86_MACHINE_CLASS(oc
);
935 NMIClass
*nc
= NMI_CLASS(oc
);
937 mc
->cpu_index_to_instance_props
= x86_cpu_index_to_props
;
938 mc
->get_default_cpu_node_id
= x86_get_default_cpu_node_id
;
939 mc
->possible_cpu_arch_ids
= x86_possible_cpu_arch_ids
;
940 x86mc
->compat_apic_id_mode
= false;
941 x86mc
->save_tsc_khz
= true;
942 nc
->nmi_monitor_handler
= x86_nmi
;
944 object_class_property_add(oc
, X86_MACHINE_SMM
, "OnOffAuto",
945 x86_machine_get_smm
, x86_machine_set_smm
,
947 object_class_property_set_description(oc
, X86_MACHINE_SMM
,
950 object_class_property_add(oc
, X86_MACHINE_ACPI
, "OnOffAuto",
951 x86_machine_get_acpi
, x86_machine_set_acpi
,
953 object_class_property_set_description(oc
, X86_MACHINE_ACPI
,
957 static const TypeInfo x86_machine_info
= {
958 .name
= TYPE_X86_MACHINE
,
959 .parent
= TYPE_MACHINE
,
961 .instance_size
= sizeof(X86MachineState
),
962 .instance_init
= x86_machine_initfn
,
963 .class_size
= sizeof(X86MachineClass
),
964 .class_init
= x86_machine_class_init
,
965 .interfaces
= (InterfaceInfo
[]) {
971 static void x86_machine_register_types(void)
973 type_register_static(&x86_machine_info
);
976 type_init(x86_machine_register_types
)