hw/arm/digic.c

   1 /*
   2  * QEMU model of the Canon DIGIC SoC.
   3  *
   4  * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
   5  *
   6  * This model is based on reverse engineering efforts
   7  * made by CHDK (http://chdk.wikia.com) and
   8  * Magic Lantern (http://www.magiclantern.fm) projects
   9  * contributors.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19  * GNU General Public License for more details.
  20  *
  21  */
  22
  23 #include "qemu/osdep.h"
  24 #include "qapi/error.h"
  25 #include "qemu/module.h"
  26 #include "hw/arm/digic.h"
  27 #include "hw/qdev-properties.h"
  28 #include "sysemu/sysemu.h"
  29
  30 #define DIGIC4_TIMER_BASE(n)    (0xc0210000 + (n) * 0x100)
  31
  32 #define DIGIC_UART_BASE          0xc0800000
  33
  34 static void digic_init(Object *obj)
  35 {
  36     DigicState *s = DIGIC(obj);
  37     int i;
  38
  39     object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm946"));
  40
  41     for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
  42 #define DIGIC_TIMER_NAME_MLEN    11
  43         char name[DIGIC_TIMER_NAME_MLEN];
  44
  45         snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
  46         object_initialize_child(obj, name, &s->timer[i], TYPE_DIGIC_TIMER);
  47     }
  48
  49     object_initialize_child(obj, "uart", &s->uart, TYPE_DIGIC_UART);
  50 }
  51
  52 static void digic_realize(DeviceState *dev, Error **errp)
  53 {
  54     DigicState *s = DIGIC(dev);
  55     Error *err = NULL;
  56     SysBusDevice *sbd;
  57     int i;
  58
  59     if (!object_property_set_bool(OBJECT(&s->cpu), "reset-hivecs", true,
  60                                   &err)) {
  61         error_propagate(errp, err);
  62         return;
  63     }
  64
  65     if (!qdev_realize(DEVICE(&s->cpu), NULL, &err)) {
  66         error_propagate(errp, err);
  67         return;
  68     }
  69
  70     for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
  71         if (!sysbus_realize(SYS_BUS_DEVICE(&s->timer[i]), &err)) {
  72             error_propagate(errp, err);
  73             return;
  74         }
  75
  76         sbd = SYS_BUS_DEVICE(&s->timer[i]);
  77         sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
  78     }
  79
  80     qdev_prop_set_chr(DEVICE(&s->uart), "chardev", serial_hd(0));
  81     if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart), &err)) {
  82         error_propagate(errp, err);
  83         return;
  84     }
  85
  86     sbd = SYS_BUS_DEVICE(&s->uart);
  87     sysbus_mmio_map(sbd, 0, DIGIC_UART_BASE);
  88 }
  89
  90 static void digic_class_init(ObjectClass *oc, void *data)
  91 {
  92     DeviceClass *dc = DEVICE_CLASS(oc);
  93
  94     dc->realize = digic_realize;
  95     /* Reason: Uses serial_hds in the realize function --> not usable twice */
  96     dc->user_creatable = false;
  97 }
  98
  99 static const TypeInfo digic_type_info = {
 100     .name = TYPE_DIGIC,
 101     .parent = TYPE_DEVICE,
 102     .instance_size = sizeof(DigicState),
 103     .instance_init = digic_init,
 104     .class_init = digic_class_init,
 105 };
 106
 107 static void digic_register_types(void)
 108 {
 109     type_register_static(&digic_type_info);
 110 }
 111
 112 type_init(digic_register_types)