pseries: Fix stalls on hypervisor virtual console
[qemu/ar7.git] / qom / cpu.c
blobe71e57bd6b2634a19c8dd4c05ee5511b47dee3d4
1 /*
2 * QEMU CPU model
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
21 #include "qemu-common.h"
22 #include "qom/cpu.h"
23 #include "sysemu/kvm.h"
24 #include "qemu/notify.h"
25 #include "qemu/log.h"
26 #include "sysemu/sysemu.h"
28 typedef struct CPUExistsArgs {
29 int64_t id;
30 bool found;
31 } CPUExistsArgs;
33 static void cpu_exist_cb(CPUState *cpu, void *data)
35 CPUClass *klass = CPU_GET_CLASS(cpu);
36 CPUExistsArgs *arg = data;
38 if (klass->get_arch_id(cpu) == arg->id) {
39 arg->found = true;
43 bool cpu_exists(int64_t id)
45 CPUExistsArgs data = {
46 .id = id,
47 .found = false,
50 qemu_for_each_cpu(cpu_exist_cb, &data);
51 return data.found;
54 bool cpu_paging_enabled(const CPUState *cpu)
56 CPUClass *cc = CPU_GET_CLASS(cpu);
58 return cc->get_paging_enabled(cpu);
61 static bool cpu_common_get_paging_enabled(const CPUState *cpu)
63 return false;
66 void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
67 Error **errp)
69 CPUClass *cc = CPU_GET_CLASS(cpu);
71 return cc->get_memory_mapping(cpu, list, errp);
74 static void cpu_common_get_memory_mapping(CPUState *cpu,
75 MemoryMappingList *list,
76 Error **errp)
78 error_setg(errp, "Obtaining memory mappings is unsupported on this CPU.");
81 /* CPU hot-plug notifiers */
82 static NotifierList cpu_added_notifiers =
83 NOTIFIER_LIST_INITIALIZER(cpu_add_notifiers);
85 void qemu_register_cpu_added_notifier(Notifier *notifier)
87 notifier_list_add(&cpu_added_notifiers, notifier);
90 void cpu_reset_interrupt(CPUState *cpu, int mask)
92 cpu->interrupt_request &= ~mask;
95 void cpu_exit(CPUState *cpu)
97 cpu->exit_request = 1;
98 cpu->tcg_exit_req = 1;
101 int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
102 void *opaque)
104 CPUClass *cc = CPU_GET_CLASS(cpu);
106 return (*cc->write_elf32_qemunote)(f, cpu, opaque);
109 static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f,
110 CPUState *cpu, void *opaque)
112 return -1;
115 int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
116 int cpuid, void *opaque)
118 CPUClass *cc = CPU_GET_CLASS(cpu);
120 return (*cc->write_elf32_note)(f, cpu, cpuid, opaque);
123 static int cpu_common_write_elf32_note(WriteCoreDumpFunction f,
124 CPUState *cpu, int cpuid,
125 void *opaque)
127 return -1;
130 int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
131 void *opaque)
133 CPUClass *cc = CPU_GET_CLASS(cpu);
135 return (*cc->write_elf64_qemunote)(f, cpu, opaque);
138 static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f,
139 CPUState *cpu, void *opaque)
141 return -1;
144 int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
145 int cpuid, void *opaque)
147 CPUClass *cc = CPU_GET_CLASS(cpu);
149 return (*cc->write_elf64_note)(f, cpu, cpuid, opaque);
152 static int cpu_common_write_elf64_note(WriteCoreDumpFunction f,
153 CPUState *cpu, int cpuid,
154 void *opaque)
156 return -1;
160 static int cpu_common_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg)
162 return 0;
165 static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
167 return 0;
171 void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
172 int flags)
174 CPUClass *cc = CPU_GET_CLASS(cpu);
176 if (cc->dump_state) {
177 cc->dump_state(cpu, f, cpu_fprintf, flags);
181 void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
182 int flags)
184 CPUClass *cc = CPU_GET_CLASS(cpu);
186 if (cc->dump_statistics) {
187 cc->dump_statistics(cpu, f, cpu_fprintf, flags);
191 void cpu_reset(CPUState *cpu)
193 CPUClass *klass = CPU_GET_CLASS(cpu);
195 if (klass->reset != NULL) {
196 (*klass->reset)(cpu);
200 static void cpu_common_reset(CPUState *cpu)
202 CPUClass *cc = CPU_GET_CLASS(cpu);
204 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
205 qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
206 log_cpu_state(cpu, cc->reset_dump_flags);
209 cpu->exit_request = 0;
210 cpu->interrupt_request = 0;
211 cpu->current_tb = NULL;
212 cpu->halted = 0;
215 ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
217 CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
219 return cc->class_by_name(cpu_model);
222 static ObjectClass *cpu_common_class_by_name(const char *cpu_model)
224 return NULL;
227 static void cpu_common_realizefn(DeviceState *dev, Error **errp)
229 CPUState *cpu = CPU(dev);
231 if (dev->hotplugged) {
232 cpu_synchronize_post_init(cpu);
233 notifier_list_notify(&cpu_added_notifiers, dev);
234 cpu_resume(cpu);
238 static void cpu_common_initfn(Object *obj)
240 CPUState *cpu = CPU(obj);
241 CPUClass *cc = CPU_GET_CLASS(obj);
243 cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
246 static int64_t cpu_common_get_arch_id(CPUState *cpu)
248 return cpu->cpu_index;
251 static void cpu_class_init(ObjectClass *klass, void *data)
253 DeviceClass *dc = DEVICE_CLASS(klass);
254 CPUClass *k = CPU_CLASS(klass);
256 k->class_by_name = cpu_common_class_by_name;
257 k->reset = cpu_common_reset;
258 k->get_arch_id = cpu_common_get_arch_id;
259 k->get_paging_enabled = cpu_common_get_paging_enabled;
260 k->get_memory_mapping = cpu_common_get_memory_mapping;
261 k->write_elf32_qemunote = cpu_common_write_elf32_qemunote;
262 k->write_elf32_note = cpu_common_write_elf32_note;
263 k->write_elf64_qemunote = cpu_common_write_elf64_qemunote;
264 k->write_elf64_note = cpu_common_write_elf64_note;
265 k->gdb_read_register = cpu_common_gdb_read_register;
266 k->gdb_write_register = cpu_common_gdb_write_register;
267 dc->realize = cpu_common_realizefn;
268 dc->no_user = 1;
271 static const TypeInfo cpu_type_info = {
272 .name = TYPE_CPU,
273 .parent = TYPE_DEVICE,
274 .instance_size = sizeof(CPUState),
275 .instance_init = cpu_common_initfn,
276 .abstract = true,
277 .class_size = sizeof(CPUClass),
278 .class_init = cpu_class_init,
281 static void cpu_register_types(void)
283 type_register_static(&cpu_type_info);
286 type_init(cpu_register_types)