nvdimm acpi: introduce fit buffer
[qemu/ar7.git] / hw / acpi / nvdimm.c
blob5f728a69cd06e4e1d7ce7f9f05054286452b662d
1 /*
2 * NVDIMM ACPI Implementation
4 * Copyright(C) 2015 Intel Corporation.
6 * Author:
7 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
9 * NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
10 * and the DSM specification can be found at:
11 * http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf
13 * Currently, it only supports PMEM Virtualization.
15 * This library is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU Lesser General Public
17 * License as published by the Free Software Foundation; either
18 * version 2 of the License, or (at your option) any later version.
20 * This library is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
23 * Lesser General Public License for more details.
25 * You should have received a copy of the GNU Lesser General Public
26 * License along with this library; if not, see <http://www.gnu.org/licenses/>
29 #include "qemu/osdep.h"
30 #include "hw/acpi/acpi.h"
31 #include "hw/acpi/aml-build.h"
32 #include "hw/acpi/bios-linker-loader.h"
33 #include "hw/nvram/fw_cfg.h"
34 #include "hw/mem/nvdimm.h"
36 static int nvdimm_plugged_device_list(Object *obj, void *opaque)
38 GSList **list = opaque;
40 if (object_dynamic_cast(obj, TYPE_NVDIMM)) {
41 DeviceState *dev = DEVICE(obj);
43 if (dev->realized) { /* only realized NVDIMMs matter */
44 *list = g_slist_append(*list, DEVICE(obj));
48 object_child_foreach(obj, nvdimm_plugged_device_list, opaque);
49 return 0;
53 * inquire plugged NVDIMM devices and link them into the list which is
54 * returned to the caller.
56 * Note: it is the caller's responsibility to free the list to avoid
57 * memory leak.
59 static GSList *nvdimm_get_plugged_device_list(void)
61 GSList *list = NULL;
63 object_child_foreach(qdev_get_machine(), nvdimm_plugged_device_list,
64 &list);
65 return list;
68 #define NVDIMM_UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
69 { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
70 (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff, \
71 (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }
74 * define Byte Addressable Persistent Memory (PM) Region according to
75 * ACPI 6.0: 5.2.25.1 System Physical Address Range Structure.
77 static const uint8_t nvdimm_nfit_spa_uuid[] =
78 NVDIMM_UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33,
79 0x18, 0xb7, 0x8c, 0xdb);
82 * NVDIMM Firmware Interface Table
83 * @signature: "NFIT"
85 * It provides information that allows OSPM to enumerate NVDIMM present in
86 * the platform and associate system physical address ranges created by the
87 * NVDIMMs.
89 * It is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
91 struct NvdimmNfitHeader {
92 ACPI_TABLE_HEADER_DEF
93 uint32_t reserved;
94 } QEMU_PACKED;
95 typedef struct NvdimmNfitHeader NvdimmNfitHeader;
98 * define NFIT structures according to ACPI 6.0: 5.2.25 NVDIMM Firmware
99 * Interface Table (NFIT).
103 * System Physical Address Range Structure
105 * It describes the system physical address ranges occupied by NVDIMMs and
106 * the types of the regions.
108 struct NvdimmNfitSpa {
109 uint16_t type;
110 uint16_t length;
111 uint16_t spa_index;
112 uint16_t flags;
113 uint32_t reserved;
114 uint32_t proximity_domain;
115 uint8_t type_guid[16];
116 uint64_t spa_base;
117 uint64_t spa_length;
118 uint64_t mem_attr;
119 } QEMU_PACKED;
120 typedef struct NvdimmNfitSpa NvdimmNfitSpa;
123 * Memory Device to System Physical Address Range Mapping Structure
125 * It enables identifying each NVDIMM region and the corresponding SPA
126 * describing the memory interleave
128 struct NvdimmNfitMemDev {
129 uint16_t type;
130 uint16_t length;
131 uint32_t nfit_handle;
132 uint16_t phys_id;
133 uint16_t region_id;
134 uint16_t spa_index;
135 uint16_t dcr_index;
136 uint64_t region_len;
137 uint64_t region_offset;
138 uint64_t region_dpa;
139 uint16_t interleave_index;
140 uint16_t interleave_ways;
141 uint16_t flags;
142 uint16_t reserved;
143 } QEMU_PACKED;
144 typedef struct NvdimmNfitMemDev NvdimmNfitMemDev;
147 * NVDIMM Control Region Structure
149 * It describes the NVDIMM and if applicable, Block Control Window.
151 struct NvdimmNfitControlRegion {
152 uint16_t type;
153 uint16_t length;
154 uint16_t dcr_index;
155 uint16_t vendor_id;
156 uint16_t device_id;
157 uint16_t revision_id;
158 uint16_t sub_vendor_id;
159 uint16_t sub_device_id;
160 uint16_t sub_revision_id;
161 uint8_t reserved[6];
162 uint32_t serial_number;
163 uint16_t fic;
164 uint16_t num_bcw;
165 uint64_t bcw_size;
166 uint64_t cmd_offset;
167 uint64_t cmd_size;
168 uint64_t status_offset;
169 uint64_t status_size;
170 uint16_t flags;
171 uint8_t reserved2[6];
172 } QEMU_PACKED;
173 typedef struct NvdimmNfitControlRegion NvdimmNfitControlRegion;
176 * Module serial number is a unique number for each device. We use the
177 * slot id of NVDIMM device to generate this number so that each device
178 * associates with a different number.
180 * 0x123456 is a magic number we arbitrarily chose.
182 static uint32_t nvdimm_slot_to_sn(int slot)
184 return 0x123456 + slot;
188 * handle is used to uniquely associate nfit_memdev structure with NVDIMM
189 * ACPI device - nfit_memdev.nfit_handle matches with the value returned
190 * by ACPI device _ADR method.
192 * We generate the handle with the slot id of NVDIMM device and reserve
193 * 0 for NVDIMM root device.
195 static uint32_t nvdimm_slot_to_handle(int slot)
197 return slot + 1;
201 * index uniquely identifies the structure, 0 is reserved which indicates
202 * that the structure is not valid or the associated structure is not
203 * present.
205 * Each NVDIMM device needs two indexes, one for nfit_spa and another for
206 * nfit_dc which are generated by the slot id of NVDIMM device.
208 static uint16_t nvdimm_slot_to_spa_index(int slot)
210 return (slot + 1) << 1;
213 /* See the comments of nvdimm_slot_to_spa_index(). */
214 static uint32_t nvdimm_slot_to_dcr_index(int slot)
216 return nvdimm_slot_to_spa_index(slot) + 1;
219 static NVDIMMDevice *nvdimm_get_device_by_handle(uint32_t handle)
221 NVDIMMDevice *nvdimm = NULL;
222 GSList *list, *device_list = nvdimm_get_plugged_device_list();
224 for (list = device_list; list; list = list->next) {
225 NVDIMMDevice *nvd = list->data;
226 int slot = object_property_get_int(OBJECT(nvd), PC_DIMM_SLOT_PROP,
227 NULL);
229 if (nvdimm_slot_to_handle(slot) == handle) {
230 nvdimm = nvd;
231 break;
235 g_slist_free(device_list);
236 return nvdimm;
239 /* ACPI 6.0: 5.2.25.1 System Physical Address Range Structure */
240 static void
241 nvdimm_build_structure_spa(GArray *structures, DeviceState *dev)
243 NvdimmNfitSpa *nfit_spa;
244 uint64_t addr = object_property_get_int(OBJECT(dev), PC_DIMM_ADDR_PROP,
245 NULL);
246 uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP,
247 NULL);
248 uint32_t node = object_property_get_int(OBJECT(dev), PC_DIMM_NODE_PROP,
249 NULL);
250 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
251 NULL);
253 nfit_spa = acpi_data_push(structures, sizeof(*nfit_spa));
255 nfit_spa->type = cpu_to_le16(0 /* System Physical Address Range
256 Structure */);
257 nfit_spa->length = cpu_to_le16(sizeof(*nfit_spa));
258 nfit_spa->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot));
261 * Control region is strict as all the device info, such as SN, index,
262 * is associated with slot id.
264 nfit_spa->flags = cpu_to_le16(1 /* Control region is strictly for
265 management during hot add/online
266 operation */ |
267 2 /* Data in Proximity Domain field is
268 valid*/);
270 /* NUMA node. */
271 nfit_spa->proximity_domain = cpu_to_le32(node);
272 /* the region reported as PMEM. */
273 memcpy(nfit_spa->type_guid, nvdimm_nfit_spa_uuid,
274 sizeof(nvdimm_nfit_spa_uuid));
276 nfit_spa->spa_base = cpu_to_le64(addr);
277 nfit_spa->spa_length = cpu_to_le64(size);
279 /* It is the PMEM and can be cached as writeback. */
280 nfit_spa->mem_attr = cpu_to_le64(0x8ULL /* EFI_MEMORY_WB */ |
281 0x8000ULL /* EFI_MEMORY_NV */);
285 * ACPI 6.0: 5.2.25.2 Memory Device to System Physical Address Range Mapping
286 * Structure
288 static void
289 nvdimm_build_structure_memdev(GArray *structures, DeviceState *dev)
291 NvdimmNfitMemDev *nfit_memdev;
292 uint64_t size = object_property_get_int(OBJECT(dev), PC_DIMM_SIZE_PROP,
293 NULL);
294 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
295 NULL);
296 uint32_t handle = nvdimm_slot_to_handle(slot);
298 nfit_memdev = acpi_data_push(structures, sizeof(*nfit_memdev));
300 nfit_memdev->type = cpu_to_le16(1 /* Memory Device to System Address
301 Range Map Structure*/);
302 nfit_memdev->length = cpu_to_le16(sizeof(*nfit_memdev));
303 nfit_memdev->nfit_handle = cpu_to_le32(handle);
306 * associate memory device with System Physical Address Range
307 * Structure.
309 nfit_memdev->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot));
310 /* associate memory device with Control Region Structure. */
311 nfit_memdev->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot));
313 /* The memory region on the device. */
314 nfit_memdev->region_len = cpu_to_le64(size);
315 /* The device address starts from 0. */
316 nfit_memdev->region_dpa = cpu_to_le64(0);
318 /* Only one interleave for PMEM. */
319 nfit_memdev->interleave_ways = cpu_to_le16(1);
323 * ACPI 6.0: 5.2.25.5 NVDIMM Control Region Structure.
325 static void nvdimm_build_structure_dcr(GArray *structures, DeviceState *dev)
327 NvdimmNfitControlRegion *nfit_dcr;
328 int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
329 NULL);
330 uint32_t sn = nvdimm_slot_to_sn(slot);
332 nfit_dcr = acpi_data_push(structures, sizeof(*nfit_dcr));
334 nfit_dcr->type = cpu_to_le16(4 /* NVDIMM Control Region Structure */);
335 nfit_dcr->length = cpu_to_le16(sizeof(*nfit_dcr));
336 nfit_dcr->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot));
338 /* vendor: Intel. */
339 nfit_dcr->vendor_id = cpu_to_le16(0x8086);
340 nfit_dcr->device_id = cpu_to_le16(1);
342 /* The _DSM method is following Intel's DSM specification. */
343 nfit_dcr->revision_id = cpu_to_le16(1 /* Current Revision supported
344 in ACPI 6.0 is 1. */);
345 nfit_dcr->serial_number = cpu_to_le32(sn);
346 nfit_dcr->fic = cpu_to_le16(0x201 /* Format Interface Code. See Chapter
347 2: NVDIMM Device Specific Method
348 (DSM) in DSM Spec Rev1.*/);
351 static GArray *nvdimm_build_device_structure(void)
353 GSList *device_list = nvdimm_get_plugged_device_list();
354 GArray *structures = g_array_new(false, true /* clear */, 1);
356 for (; device_list; device_list = device_list->next) {
357 DeviceState *dev = device_list->data;
359 /* build System Physical Address Range Structure. */
360 nvdimm_build_structure_spa(structures, dev);
363 * build Memory Device to System Physical Address Range Mapping
364 * Structure.
366 nvdimm_build_structure_memdev(structures, dev);
368 /* build NVDIMM Control Region Structure. */
369 nvdimm_build_structure_dcr(structures, dev);
371 g_slist_free(device_list);
373 return structures;
376 static void nvdimm_init_fit_buffer(NvdimmFitBuffer *fit_buf)
378 qemu_mutex_init(&fit_buf->lock);
379 fit_buf->fit = g_array_new(false, true /* clear */, 1);
382 static void nvdimm_build_fit_buffer(NvdimmFitBuffer *fit_buf)
384 qemu_mutex_lock(&fit_buf->lock);
385 g_array_free(fit_buf->fit, true);
386 fit_buf->fit = nvdimm_build_device_structure();
387 fit_buf->dirty = true;
388 qemu_mutex_unlock(&fit_buf->lock);
391 void nvdimm_acpi_hotplug(AcpiNVDIMMState *state)
393 nvdimm_build_fit_buffer(&state->fit_buf);
396 static void nvdimm_build_nfit(AcpiNVDIMMState *state, GArray *table_offsets,
397 GArray *table_data, BIOSLinker *linker)
399 NvdimmFitBuffer *fit_buf = &state->fit_buf;
400 unsigned int header;
402 qemu_mutex_lock(&fit_buf->lock);
404 /* NVDIMM device is not plugged? */
405 if (!fit_buf->fit->len) {
406 goto exit;
409 acpi_add_table(table_offsets, table_data);
411 /* NFIT header. */
412 header = table_data->len;
413 acpi_data_push(table_data, sizeof(NvdimmNfitHeader));
414 /* NVDIMM device structures. */
415 g_array_append_vals(table_data, fit_buf->fit->data, fit_buf->fit->len);
417 build_header(linker, table_data,
418 (void *)(table_data->data + header), "NFIT",
419 sizeof(NvdimmNfitHeader) + fit_buf->fit->len, 1, NULL, NULL);
421 exit:
422 qemu_mutex_unlock(&fit_buf->lock);
425 struct NvdimmDsmIn {
426 uint32_t handle;
427 uint32_t revision;
428 uint32_t function;
429 /* the remaining size in the page is used by arg3. */
430 union {
431 uint8_t arg3[4084];
433 } QEMU_PACKED;
434 typedef struct NvdimmDsmIn NvdimmDsmIn;
435 QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmIn) != 4096);
437 struct NvdimmDsmOut {
438 /* the size of buffer filled by QEMU. */
439 uint32_t len;
440 uint8_t data[4092];
441 } QEMU_PACKED;
442 typedef struct NvdimmDsmOut NvdimmDsmOut;
443 QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmOut) != 4096);
445 struct NvdimmDsmFunc0Out {
446 /* the size of buffer filled by QEMU. */
447 uint32_t len;
448 uint32_t supported_func;
449 } QEMU_PACKED;
450 typedef struct NvdimmDsmFunc0Out NvdimmDsmFunc0Out;
452 struct NvdimmDsmFuncNoPayloadOut {
453 /* the size of buffer filled by QEMU. */
454 uint32_t len;
455 uint32_t func_ret_status;
456 } QEMU_PACKED;
457 typedef struct NvdimmDsmFuncNoPayloadOut NvdimmDsmFuncNoPayloadOut;
459 struct NvdimmFuncGetLabelSizeOut {
460 /* the size of buffer filled by QEMU. */
461 uint32_t len;
462 uint32_t func_ret_status; /* return status code. */
463 uint32_t label_size; /* the size of label data area. */
465 * Maximum size of the namespace label data length supported by
466 * the platform in Get/Set Namespace Label Data functions.
468 uint32_t max_xfer;
469 } QEMU_PACKED;
470 typedef struct NvdimmFuncGetLabelSizeOut NvdimmFuncGetLabelSizeOut;
471 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelSizeOut) > 4096);
473 struct NvdimmFuncGetLabelDataIn {
474 uint32_t offset; /* the offset in the namespace label data area. */
475 uint32_t length; /* the size of data is to be read via the function. */
476 } QEMU_PACKED;
477 typedef struct NvdimmFuncGetLabelDataIn NvdimmFuncGetLabelDataIn;
478 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataIn) +
479 offsetof(NvdimmDsmIn, arg3) > 4096);
481 struct NvdimmFuncGetLabelDataOut {
482 /* the size of buffer filled by QEMU. */
483 uint32_t len;
484 uint32_t func_ret_status; /* return status code. */
485 uint8_t out_buf[0]; /* the data got via Get Namesapce Label function. */
486 } QEMU_PACKED;
487 typedef struct NvdimmFuncGetLabelDataOut NvdimmFuncGetLabelDataOut;
488 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut) > 4096);
490 struct NvdimmFuncSetLabelDataIn {
491 uint32_t offset; /* the offset in the namespace label data area. */
492 uint32_t length; /* the size of data is to be written via the function. */
493 uint8_t in_buf[0]; /* the data written to label data area. */
494 } QEMU_PACKED;
495 typedef struct NvdimmFuncSetLabelDataIn NvdimmFuncSetLabelDataIn;
496 QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncSetLabelDataIn) +
497 offsetof(NvdimmDsmIn, arg3) > 4096);
499 static void
500 nvdimm_dsm_function0(uint32_t supported_func, hwaddr dsm_mem_addr)
502 NvdimmDsmFunc0Out func0 = {
503 .len = cpu_to_le32(sizeof(func0)),
504 .supported_func = cpu_to_le32(supported_func),
506 cpu_physical_memory_write(dsm_mem_addr, &func0, sizeof(func0));
509 static void
510 nvdimm_dsm_no_payload(uint32_t func_ret_status, hwaddr dsm_mem_addr)
512 NvdimmDsmFuncNoPayloadOut out = {
513 .len = cpu_to_le32(sizeof(out)),
514 .func_ret_status = cpu_to_le32(func_ret_status),
516 cpu_physical_memory_write(dsm_mem_addr, &out, sizeof(out));
519 static void nvdimm_dsm_root(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
522 * function 0 is called to inquire which functions are supported by
523 * OSPM
525 if (!in->function) {
526 nvdimm_dsm_function0(0 /* No function supported other than
527 function 0 */, dsm_mem_addr);
528 return;
531 /* No function except function 0 is supported yet. */
532 nvdimm_dsm_no_payload(1 /* Not Supported */, dsm_mem_addr);
536 * the max transfer size is the max size transferred by both a
537 * 'Get Namespace Label Data' function and a 'Set Namespace Label Data'
538 * function.
540 static uint32_t nvdimm_get_max_xfer_label_size(void)
542 uint32_t max_get_size, max_set_size, dsm_memory_size = 4096;
545 * the max data ACPI can read one time which is transferred by
546 * the response of 'Get Namespace Label Data' function.
548 max_get_size = dsm_memory_size - sizeof(NvdimmFuncGetLabelDataOut);
551 * the max data ACPI can write one time which is transferred by
552 * 'Set Namespace Label Data' function.
554 max_set_size = dsm_memory_size - offsetof(NvdimmDsmIn, arg3) -
555 sizeof(NvdimmFuncSetLabelDataIn);
557 return MIN(max_get_size, max_set_size);
561 * DSM Spec Rev1 4.4 Get Namespace Label Size (Function Index 4).
563 * It gets the size of Namespace Label data area and the max data size
564 * that Get/Set Namespace Label Data functions can transfer.
566 static void nvdimm_dsm_label_size(NVDIMMDevice *nvdimm, hwaddr dsm_mem_addr)
568 NvdimmFuncGetLabelSizeOut label_size_out = {
569 .len = cpu_to_le32(sizeof(label_size_out)),
571 uint32_t label_size, mxfer;
573 label_size = nvdimm->label_size;
574 mxfer = nvdimm_get_max_xfer_label_size();
576 nvdimm_debug("label_size %#x, max_xfer %#x.\n", label_size, mxfer);
578 label_size_out.func_ret_status = cpu_to_le32(0 /* Success */);
579 label_size_out.label_size = cpu_to_le32(label_size);
580 label_size_out.max_xfer = cpu_to_le32(mxfer);
582 cpu_physical_memory_write(dsm_mem_addr, &label_size_out,
583 sizeof(label_size_out));
586 static uint32_t nvdimm_rw_label_data_check(NVDIMMDevice *nvdimm,
587 uint32_t offset, uint32_t length)
589 uint32_t ret = 3 /* Invalid Input Parameters */;
591 if (offset + length < offset) {
592 nvdimm_debug("offset %#x + length %#x is overflow.\n", offset,
593 length);
594 return ret;
597 if (nvdimm->label_size < offset + length) {
598 nvdimm_debug("position %#x is beyond label data (len = %" PRIx64 ").\n",
599 offset + length, nvdimm->label_size);
600 return ret;
603 if (length > nvdimm_get_max_xfer_label_size()) {
604 nvdimm_debug("length (%#x) is larger than max_xfer (%#x).\n",
605 length, nvdimm_get_max_xfer_label_size());
606 return ret;
609 return 0 /* Success */;
613 * DSM Spec Rev1 4.5 Get Namespace Label Data (Function Index 5).
615 static void nvdimm_dsm_get_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
616 hwaddr dsm_mem_addr)
618 NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm);
619 NvdimmFuncGetLabelDataIn *get_label_data;
620 NvdimmFuncGetLabelDataOut *get_label_data_out;
621 uint32_t status;
622 int size;
624 get_label_data = (NvdimmFuncGetLabelDataIn *)in->arg3;
625 le32_to_cpus(&get_label_data->offset);
626 le32_to_cpus(&get_label_data->length);
628 nvdimm_debug("Read Label Data: offset %#x length %#x.\n",
629 get_label_data->offset, get_label_data->length);
631 status = nvdimm_rw_label_data_check(nvdimm, get_label_data->offset,
632 get_label_data->length);
633 if (status != 0 /* Success */) {
634 nvdimm_dsm_no_payload(status, dsm_mem_addr);
635 return;
638 size = sizeof(*get_label_data_out) + get_label_data->length;
639 assert(size <= 4096);
640 get_label_data_out = g_malloc(size);
642 get_label_data_out->len = cpu_to_le32(size);
643 get_label_data_out->func_ret_status = cpu_to_le32(0 /* Success */);
644 nvc->read_label_data(nvdimm, get_label_data_out->out_buf,
645 get_label_data->length, get_label_data->offset);
647 cpu_physical_memory_write(dsm_mem_addr, get_label_data_out, size);
648 g_free(get_label_data_out);
652 * DSM Spec Rev1 4.6 Set Namespace Label Data (Function Index 6).
654 static void nvdimm_dsm_set_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
655 hwaddr dsm_mem_addr)
657 NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm);
658 NvdimmFuncSetLabelDataIn *set_label_data;
659 uint32_t status;
661 set_label_data = (NvdimmFuncSetLabelDataIn *)in->arg3;
663 le32_to_cpus(&set_label_data->offset);
664 le32_to_cpus(&set_label_data->length);
666 nvdimm_debug("Write Label Data: offset %#x length %#x.\n",
667 set_label_data->offset, set_label_data->length);
669 status = nvdimm_rw_label_data_check(nvdimm, set_label_data->offset,
670 set_label_data->length);
671 if (status != 0 /* Success */) {
672 nvdimm_dsm_no_payload(status, dsm_mem_addr);
673 return;
676 assert(sizeof(*in) + sizeof(*set_label_data) + set_label_data->length <=
677 4096);
679 nvc->write_label_data(nvdimm, set_label_data->in_buf,
680 set_label_data->length, set_label_data->offset);
681 nvdimm_dsm_no_payload(0 /* Success */, dsm_mem_addr);
684 static void nvdimm_dsm_device(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
686 NVDIMMDevice *nvdimm = nvdimm_get_device_by_handle(in->handle);
688 /* See the comments in nvdimm_dsm_root(). */
689 if (!in->function) {
690 uint32_t supported_func = 0;
692 if (nvdimm && nvdimm->label_size) {
693 supported_func |= 0x1 /* Bit 0 indicates whether there is
694 support for any functions other
695 than function 0. */ |
696 1 << 4 /* Get Namespace Label Size */ |
697 1 << 5 /* Get Namespace Label Data */ |
698 1 << 6 /* Set Namespace Label Data */;
700 nvdimm_dsm_function0(supported_func, dsm_mem_addr);
701 return;
704 if (!nvdimm) {
705 nvdimm_dsm_no_payload(2 /* Non-Existing Memory Device */,
706 dsm_mem_addr);
707 return;
710 /* Encode DSM function according to DSM Spec Rev1. */
711 switch (in->function) {
712 case 4 /* Get Namespace Label Size */:
713 if (nvdimm->label_size) {
714 nvdimm_dsm_label_size(nvdimm, dsm_mem_addr);
715 return;
717 break;
718 case 5 /* Get Namespace Label Data */:
719 if (nvdimm->label_size) {
720 nvdimm_dsm_get_label_data(nvdimm, in, dsm_mem_addr);
721 return;
723 break;
724 case 0x6 /* Set Namespace Label Data */:
725 if (nvdimm->label_size) {
726 nvdimm_dsm_set_label_data(nvdimm, in, dsm_mem_addr);
727 return;
729 break;
732 nvdimm_dsm_no_payload(1 /* Not Supported */, dsm_mem_addr);
735 static uint64_t
736 nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size)
738 nvdimm_debug("BUG: we never read _DSM IO Port.\n");
739 return 0;
742 static void
743 nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
745 NvdimmDsmIn *in;
746 hwaddr dsm_mem_addr = val;
748 nvdimm_debug("dsm memory address %#" HWADDR_PRIx ".\n", dsm_mem_addr);
751 * The DSM memory is mapped to guest address space so an evil guest
752 * can change its content while we are doing DSM emulation. Avoid
753 * this by copying DSM memory to QEMU local memory.
755 in = g_new(NvdimmDsmIn, 1);
756 cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in));
758 le32_to_cpus(&in->revision);
759 le32_to_cpus(&in->function);
760 le32_to_cpus(&in->handle);
762 nvdimm_debug("Revision %#x Handler %#x Function %#x.\n", in->revision,
763 in->handle, in->function);
765 if (in->revision != 0x1 /* Currently we only support DSM Spec Rev1. */) {
766 nvdimm_debug("Revision %#x is not supported, expect %#x.\n",
767 in->revision, 0x1);
768 nvdimm_dsm_no_payload(1 /* Not Supported */, dsm_mem_addr);
769 goto exit;
772 /* Handle 0 is reserved for NVDIMM Root Device. */
773 if (!in->handle) {
774 nvdimm_dsm_root(in, dsm_mem_addr);
775 goto exit;
778 nvdimm_dsm_device(in, dsm_mem_addr);
780 exit:
781 g_free(in);
784 static const MemoryRegionOps nvdimm_dsm_ops = {
785 .read = nvdimm_dsm_read,
786 .write = nvdimm_dsm_write,
787 .endianness = DEVICE_LITTLE_ENDIAN,
788 .valid = {
789 .min_access_size = 4,
790 .max_access_size = 4,
794 void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
795 FWCfgState *fw_cfg, Object *owner)
797 memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state,
798 "nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN);
799 memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr);
801 state->dsm_mem = g_array_new(false, true /* clear */, 1);
802 acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn));
803 fw_cfg_add_file(fw_cfg, NVDIMM_DSM_MEM_FILE, state->dsm_mem->data,
804 state->dsm_mem->len);
806 nvdimm_init_fit_buffer(&state->fit_buf);
809 #define NVDIMM_COMMON_DSM "NCAL"
810 #define NVDIMM_ACPI_MEM_ADDR "MEMA"
812 #define NVDIMM_DSM_MEMORY "NRAM"
813 #define NVDIMM_DSM_IOPORT "NPIO"
815 #define NVDIMM_DSM_NOTIFY "NTFI"
816 #define NVDIMM_DSM_HANDLE "HDLE"
817 #define NVDIMM_DSM_REVISION "REVS"
818 #define NVDIMM_DSM_FUNCTION "FUNC"
819 #define NVDIMM_DSM_ARG3 "FARG"
821 #define NVDIMM_DSM_OUT_BUF_SIZE "RLEN"
822 #define NVDIMM_DSM_OUT_BUF "ODAT"
824 static void nvdimm_build_common_dsm(Aml *dev)
826 Aml *method, *ifctx, *function, *handle, *uuid, *dsm_mem;
827 Aml *elsectx, *unsupport, *unpatched, *expected_uuid, *uuid_invalid;
828 Aml *pckg, *pckg_index, *pckg_buf, *field, *dsm_out_buf, *dsm_out_buf_size;
829 uint8_t byte_list[1];
831 method = aml_method(NVDIMM_COMMON_DSM, 5, AML_SERIALIZED);
832 uuid = aml_arg(0);
833 function = aml_arg(2);
834 handle = aml_arg(4);
835 dsm_mem = aml_local(6);
836 dsm_out_buf = aml_local(7);
838 aml_append(method, aml_store(aml_name(NVDIMM_ACPI_MEM_ADDR), dsm_mem));
840 /* map DSM memory and IO into ACPI namespace. */
841 aml_append(method, aml_operation_region(NVDIMM_DSM_IOPORT, AML_SYSTEM_IO,
842 aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN));
843 aml_append(method, aml_operation_region(NVDIMM_DSM_MEMORY,
844 AML_SYSTEM_MEMORY, dsm_mem, sizeof(NvdimmDsmIn)));
847 * DSM notifier:
848 * NVDIMM_DSM_NOTIFY: write the address of DSM memory and notify QEMU to
849 * emulate the access.
851 * It is the IO port so that accessing them will cause VM-exit, the
852 * control will be transferred to QEMU.
854 field = aml_field(NVDIMM_DSM_IOPORT, AML_DWORD_ACC, AML_NOLOCK,
855 AML_PRESERVE);
856 aml_append(field, aml_named_field(NVDIMM_DSM_NOTIFY,
857 sizeof(uint32_t) * BITS_PER_BYTE));
858 aml_append(method, field);
861 * DSM input:
862 * NVDIMM_DSM_HANDLE: store device's handle, it's zero if the _DSM call
863 * happens on NVDIMM Root Device.
864 * NVDIMM_DSM_REVISION: store the Arg1 of _DSM call.
865 * NVDIMM_DSM_FUNCTION: store the Arg2 of _DSM call.
866 * NVDIMM_DSM_ARG3: store the Arg3 of _DSM call which is a Package
867 * containing function-specific arguments.
869 * They are RAM mapping on host so that these accesses never cause
870 * VM-EXIT.
872 field = aml_field(NVDIMM_DSM_MEMORY, AML_DWORD_ACC, AML_NOLOCK,
873 AML_PRESERVE);
874 aml_append(field, aml_named_field(NVDIMM_DSM_HANDLE,
875 sizeof(typeof_field(NvdimmDsmIn, handle)) * BITS_PER_BYTE));
876 aml_append(field, aml_named_field(NVDIMM_DSM_REVISION,
877 sizeof(typeof_field(NvdimmDsmIn, revision)) * BITS_PER_BYTE));
878 aml_append(field, aml_named_field(NVDIMM_DSM_FUNCTION,
879 sizeof(typeof_field(NvdimmDsmIn, function)) * BITS_PER_BYTE));
880 aml_append(field, aml_named_field(NVDIMM_DSM_ARG3,
881 (sizeof(NvdimmDsmIn) - offsetof(NvdimmDsmIn, arg3)) * BITS_PER_BYTE));
882 aml_append(method, field);
885 * DSM output:
886 * NVDIMM_DSM_OUT_BUF_SIZE: the size of the buffer filled by QEMU.
887 * NVDIMM_DSM_OUT_BUF: the buffer QEMU uses to store the result.
889 * Since the page is reused by both input and out, the input data
890 * will be lost after storing new result into ODAT so we should fetch
891 * all the input data before writing the result.
893 field = aml_field(NVDIMM_DSM_MEMORY, AML_DWORD_ACC, AML_NOLOCK,
894 AML_PRESERVE);
895 aml_append(field, aml_named_field(NVDIMM_DSM_OUT_BUF_SIZE,
896 sizeof(typeof_field(NvdimmDsmOut, len)) * BITS_PER_BYTE));
897 aml_append(field, aml_named_field(NVDIMM_DSM_OUT_BUF,
898 (sizeof(NvdimmDsmOut) - offsetof(NvdimmDsmOut, data)) * BITS_PER_BYTE));
899 aml_append(method, field);
902 * do not support any method if DSM memory address has not been
903 * patched.
905 unpatched = aml_equal(dsm_mem, aml_int(0x0));
907 expected_uuid = aml_local(0);
909 ifctx = aml_if(aml_equal(handle, aml_int(0x0)));
910 aml_append(ifctx, aml_store(
911 aml_touuid("2F10E7A4-9E91-11E4-89D3-123B93F75CBA")
912 /* UUID for NVDIMM Root Device */, expected_uuid));
913 aml_append(method, ifctx);
914 elsectx = aml_else();
915 aml_append(elsectx, aml_store(
916 aml_touuid("4309AC30-0D11-11E4-9191-0800200C9A66")
917 /* UUID for NVDIMM Devices */, expected_uuid));
918 aml_append(method, elsectx);
920 uuid_invalid = aml_lnot(aml_equal(uuid, expected_uuid));
922 unsupport = aml_if(aml_or(unpatched, uuid_invalid, NULL));
925 * function 0 is called to inquire what functions are supported by
926 * OSPM
928 ifctx = aml_if(aml_equal(function, aml_int(0)));
929 byte_list[0] = 0 /* No function Supported */;
930 aml_append(ifctx, aml_return(aml_buffer(1, byte_list)));
931 aml_append(unsupport, ifctx);
933 /* No function is supported yet. */
934 byte_list[0] = 1 /* Not Supported */;
935 aml_append(unsupport, aml_return(aml_buffer(1, byte_list)));
936 aml_append(method, unsupport);
939 * The HDLE indicates the DSM function is issued from which device,
940 * it reserves 0 for root device and is the handle for NVDIMM devices.
941 * See the comments in nvdimm_slot_to_handle().
943 aml_append(method, aml_store(handle, aml_name(NVDIMM_DSM_HANDLE)));
944 aml_append(method, aml_store(aml_arg(1), aml_name(NVDIMM_DSM_REVISION)));
945 aml_append(method, aml_store(aml_arg(2), aml_name(NVDIMM_DSM_FUNCTION)));
948 * The fourth parameter (Arg3) of _DSM is a package which contains
949 * a buffer, the layout of the buffer is specified by UUID (Arg0),
950 * Revision ID (Arg1) and Function Index (Arg2) which are documented
951 * in the DSM Spec.
953 pckg = aml_arg(3);
954 ifctx = aml_if(aml_and(aml_equal(aml_object_type(pckg),
955 aml_int(4 /* Package */)) /* It is a Package? */,
956 aml_equal(aml_sizeof(pckg), aml_int(1)) /* 1 element? */,
957 NULL));
959 pckg_index = aml_local(2);
960 pckg_buf = aml_local(3);
961 aml_append(ifctx, aml_store(aml_index(pckg, aml_int(0)), pckg_index));
962 aml_append(ifctx, aml_store(aml_derefof(pckg_index), pckg_buf));
963 aml_append(ifctx, aml_store(pckg_buf, aml_name(NVDIMM_DSM_ARG3)));
964 aml_append(method, ifctx);
967 * tell QEMU about the real address of DSM memory, then QEMU
968 * gets the control and fills the result in DSM memory.
970 aml_append(method, aml_store(dsm_mem, aml_name(NVDIMM_DSM_NOTIFY)));
972 dsm_out_buf_size = aml_local(1);
973 /* RLEN is not included in the payload returned to guest. */
974 aml_append(method, aml_subtract(aml_name(NVDIMM_DSM_OUT_BUF_SIZE),
975 aml_int(4), dsm_out_buf_size));
976 aml_append(method, aml_store(aml_shiftleft(dsm_out_buf_size, aml_int(3)),
977 dsm_out_buf_size));
978 aml_append(method, aml_create_field(aml_name(NVDIMM_DSM_OUT_BUF),
979 aml_int(0), dsm_out_buf_size, "OBUF"));
980 aml_append(method, aml_concatenate(aml_buffer(0, NULL), aml_name("OBUF"),
981 dsm_out_buf));
982 aml_append(method, aml_return(dsm_out_buf));
983 aml_append(dev, method);
986 static void nvdimm_build_device_dsm(Aml *dev, uint32_t handle)
988 Aml *method;
990 method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
991 aml_append(method, aml_return(aml_call5(NVDIMM_COMMON_DSM, aml_arg(0),
992 aml_arg(1), aml_arg(2), aml_arg(3),
993 aml_int(handle))));
994 aml_append(dev, method);
997 static void nvdimm_build_nvdimm_devices(Aml *root_dev, uint32_t ram_slots)
999 uint32_t slot;
1001 for (slot = 0; slot < ram_slots; slot++) {
1002 uint32_t handle = nvdimm_slot_to_handle(slot);
1003 Aml *nvdimm_dev;
1005 nvdimm_dev = aml_device("NV%02X", slot);
1008 * ACPI 6.0: 9.20 NVDIMM Devices:
1010 * _ADR object that is used to supply OSPM with unique address
1011 * of the NVDIMM device. This is done by returning the NFIT Device
1012 * handle that is used to identify the associated entries in ACPI
1013 * table NFIT or _FIT.
1015 aml_append(nvdimm_dev, aml_name_decl("_ADR", aml_int(handle)));
1017 nvdimm_build_device_dsm(nvdimm_dev, handle);
1018 aml_append(root_dev, nvdimm_dev);
1022 static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data,
1023 BIOSLinker *linker, GArray *dsm_dma_arrea,
1024 uint32_t ram_slots)
1026 Aml *ssdt, *sb_scope, *dev;
1027 int mem_addr_offset, nvdimm_ssdt;
1029 acpi_add_table(table_offsets, table_data);
1031 ssdt = init_aml_allocator();
1032 acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader));
1034 sb_scope = aml_scope("\\_SB");
1036 dev = aml_device("NVDR");
1039 * ACPI 6.0: 9.20 NVDIMM Devices:
1041 * The ACPI Name Space device uses _HID of ACPI0012 to identify the root
1042 * NVDIMM interface device. Platform firmware is required to contain one
1043 * such device in _SB scope if NVDIMMs support is exposed by platform to
1044 * OSPM.
1045 * For each NVDIMM present or intended to be supported by platform,
1046 * platform firmware also exposes an ACPI Namespace Device under the
1047 * root device.
1049 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012")));
1051 nvdimm_build_common_dsm(dev);
1053 /* 0 is reserved for root device. */
1054 nvdimm_build_device_dsm(dev, 0);
1056 nvdimm_build_nvdimm_devices(dev, ram_slots);
1058 aml_append(sb_scope, dev);
1059 aml_append(ssdt, sb_scope);
1061 nvdimm_ssdt = table_data->len;
1063 /* copy AML table into ACPI tables blob and patch header there */
1064 g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len);
1065 mem_addr_offset = build_append_named_dword(table_data,
1066 NVDIMM_ACPI_MEM_ADDR);
1068 bios_linker_loader_alloc(linker,
1069 NVDIMM_DSM_MEM_FILE, dsm_dma_arrea,
1070 sizeof(NvdimmDsmIn), false /* high memory */);
1071 bios_linker_loader_add_pointer(linker,
1072 ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t),
1073 NVDIMM_DSM_MEM_FILE, 0);
1074 build_header(linker, table_data,
1075 (void *)(table_data->data + nvdimm_ssdt),
1076 "SSDT", table_data->len - nvdimm_ssdt, 1, NULL, "NVDIMM");
1077 free_aml_allocator();
1080 void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
1081 BIOSLinker *linker, AcpiNVDIMMState *state,
1082 uint32_t ram_slots)
1084 nvdimm_build_nfit(state, table_offsets, table_data, linker);
1087 * NVDIMM device is allowed to be plugged only if there is available
1088 * slot.
1090 if (ram_slots) {
1091 nvdimm_build_ssdt(table_offsets, table_data, linker, state->dsm_mem,
1092 ram_slots);