qcow2: Helper function for refcount modification
[qemu/ar7.git] / target-arm / kvm.c
blob23cefe98b46dd0b73bccb965efa92c814836a8f6
1 /*
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
9 */
11 #include <stdio.h>
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
14 #include <sys/mman.h>
16 #include <linux/kvm.h>
18 #include "qemu-common.h"
19 #include "qemu/timer.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
22 #include "kvm_arm.h"
23 #include "cpu.h"
24 #include "internals.h"
25 #include "hw/arm/arm.h"
27 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
28 KVM_CAP_LAST_INFO
31 int kvm_arm_vcpu_init(CPUState *cs)
33 ARMCPU *cpu = ARM_CPU(cs);
34 struct kvm_vcpu_init init;
36 init.target = cpu->kvm_target;
37 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
39 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
42 bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
43 int *fdarray,
44 struct kvm_vcpu_init *init)
46 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
48 kvmfd = qemu_open("/dev/kvm", O_RDWR);
49 if (kvmfd < 0) {
50 goto err;
52 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
53 if (vmfd < 0) {
54 goto err;
56 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
57 if (cpufd < 0) {
58 goto err;
61 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
62 if (ret >= 0) {
63 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
64 if (ret < 0) {
65 goto err;
67 } else {
68 /* Old kernel which doesn't know about the
69 * PREFERRED_TARGET ioctl: we know it will only support
70 * creating one kind of guest CPU which is its preferred
71 * CPU type.
73 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
74 init->target = *cpus_to_try++;
75 memset(init->features, 0, sizeof(init->features));
76 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
77 if (ret >= 0) {
78 break;
81 if (ret < 0) {
82 goto err;
86 fdarray[0] = kvmfd;
87 fdarray[1] = vmfd;
88 fdarray[2] = cpufd;
90 return true;
92 err:
93 if (cpufd >= 0) {
94 close(cpufd);
96 if (vmfd >= 0) {
97 close(vmfd);
99 if (kvmfd >= 0) {
100 close(kvmfd);
103 return false;
106 void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
108 int i;
110 for (i = 2; i >= 0; i--) {
111 close(fdarray[i]);
115 static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
117 ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
119 /* All we really need to set up for the 'host' CPU
120 * is the feature bits -- we rely on the fact that the
121 * various ID register values in ARMCPU are only used for
122 * TCG CPUs.
124 if (!kvm_arm_get_host_cpu_features(ahcc)) {
125 fprintf(stderr, "Failed to retrieve host CPU features!\n");
126 abort();
130 static void kvm_arm_host_cpu_initfn(Object *obj)
132 ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
133 ARMCPU *cpu = ARM_CPU(obj);
134 CPUARMState *env = &cpu->env;
136 cpu->kvm_target = ahcc->target;
137 cpu->dtb_compatible = ahcc->dtb_compatible;
138 env->features = ahcc->features;
141 static const TypeInfo host_arm_cpu_type_info = {
142 .name = TYPE_ARM_HOST_CPU,
143 #ifdef TARGET_AARCH64
144 .parent = TYPE_AARCH64_CPU,
145 #else
146 .parent = TYPE_ARM_CPU,
147 #endif
148 .instance_init = kvm_arm_host_cpu_initfn,
149 .class_init = kvm_arm_host_cpu_class_init,
150 .class_size = sizeof(ARMHostCPUClass),
153 int kvm_arch_init(KVMState *s)
155 /* For ARM interrupt delivery is always asynchronous,
156 * whether we are using an in-kernel VGIC or not.
158 kvm_async_interrupts_allowed = true;
160 type_register_static(&host_arm_cpu_type_info);
162 return 0;
165 unsigned long kvm_arch_vcpu_id(CPUState *cpu)
167 return cpu->cpu_index;
170 /* We track all the KVM devices which need their memory addresses
171 * passing to the kernel in a list of these structures.
172 * When board init is complete we run through the list and
173 * tell the kernel the base addresses of the memory regions.
174 * We use a MemoryListener to track mapping and unmapping of
175 * the regions during board creation, so the board models don't
176 * need to do anything special for the KVM case.
178 typedef struct KVMDevice {
179 struct kvm_arm_device_addr kda;
180 struct kvm_device_attr kdattr;
181 MemoryRegion *mr;
182 QSLIST_ENTRY(KVMDevice) entries;
183 int dev_fd;
184 } KVMDevice;
186 static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
188 static void kvm_arm_devlistener_add(MemoryListener *listener,
189 MemoryRegionSection *section)
191 KVMDevice *kd;
193 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
194 if (section->mr == kd->mr) {
195 kd->kda.addr = section->offset_within_address_space;
200 static void kvm_arm_devlistener_del(MemoryListener *listener,
201 MemoryRegionSection *section)
203 KVMDevice *kd;
205 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
206 if (section->mr == kd->mr) {
207 kd->kda.addr = -1;
212 static MemoryListener devlistener = {
213 .region_add = kvm_arm_devlistener_add,
214 .region_del = kvm_arm_devlistener_del,
217 static void kvm_arm_set_device_addr(KVMDevice *kd)
219 struct kvm_device_attr *attr = &kd->kdattr;
220 int ret;
222 /* If the device control API is available and we have a device fd on the
223 * KVMDevice struct, let's use the newer API
225 if (kd->dev_fd >= 0) {
226 uint64_t addr = kd->kda.addr;
227 attr->addr = (uintptr_t)&addr;
228 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
229 } else {
230 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
233 if (ret < 0) {
234 fprintf(stderr, "Failed to set device address: %s\n",
235 strerror(-ret));
236 abort();
240 static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
242 KVMDevice *kd, *tkd;
244 memory_listener_unregister(&devlistener);
245 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
246 if (kd->kda.addr != -1) {
247 kvm_arm_set_device_addr(kd);
249 memory_region_unref(kd->mr);
250 g_free(kd);
254 static Notifier notify = {
255 .notify = kvm_arm_machine_init_done,
258 void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
259 uint64_t attr, int dev_fd)
261 KVMDevice *kd;
263 if (!kvm_irqchip_in_kernel()) {
264 return;
267 if (QSLIST_EMPTY(&kvm_devices_head)) {
268 memory_listener_register(&devlistener, NULL);
269 qemu_add_machine_init_done_notifier(&notify);
271 kd = g_new0(KVMDevice, 1);
272 kd->mr = mr;
273 kd->kda.id = devid;
274 kd->kda.addr = -1;
275 kd->kdattr.flags = 0;
276 kd->kdattr.group = group;
277 kd->kdattr.attr = attr;
278 kd->dev_fd = dev_fd;
279 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
280 memory_region_ref(kd->mr);
283 static int compare_u64(const void *a, const void *b)
285 if (*(uint64_t *)a > *(uint64_t *)b) {
286 return 1;
288 if (*(uint64_t *)a < *(uint64_t *)b) {
289 return -1;
291 return 0;
294 /* Initialize the CPUState's cpreg list according to the kernel's
295 * definition of what CPU registers it knows about (and throw away
296 * the previous TCG-created cpreg list).
298 int kvm_arm_init_cpreg_list(ARMCPU *cpu)
300 struct kvm_reg_list rl;
301 struct kvm_reg_list *rlp;
302 int i, ret, arraylen;
303 CPUState *cs = CPU(cpu);
305 rl.n = 0;
306 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, &rl);
307 if (ret != -E2BIG) {
308 return ret;
310 rlp = g_malloc(sizeof(struct kvm_reg_list) + rl.n * sizeof(uint64_t));
311 rlp->n = rl.n;
312 ret = kvm_vcpu_ioctl(cs, KVM_GET_REG_LIST, rlp);
313 if (ret) {
314 goto out;
316 /* Sort the list we get back from the kernel, since cpreg_tuples
317 * must be in strictly ascending order.
319 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64);
321 for (i = 0, arraylen = 0; i < rlp->n; i++) {
322 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) {
323 continue;
325 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) {
326 case KVM_REG_SIZE_U32:
327 case KVM_REG_SIZE_U64:
328 break;
329 default:
330 fprintf(stderr, "Can't handle size of register in kernel list\n");
331 ret = -EINVAL;
332 goto out;
335 arraylen++;
338 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen);
339 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen);
340 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes,
341 arraylen);
342 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values,
343 arraylen);
344 cpu->cpreg_array_len = arraylen;
345 cpu->cpreg_vmstate_array_len = arraylen;
347 for (i = 0, arraylen = 0; i < rlp->n; i++) {
348 uint64_t regidx = rlp->reg[i];
349 if (!kvm_arm_reg_syncs_via_cpreg_list(regidx)) {
350 continue;
352 cpu->cpreg_indexes[arraylen] = regidx;
353 arraylen++;
355 assert(cpu->cpreg_array_len == arraylen);
357 if (!write_kvmstate_to_list(cpu)) {
358 /* Shouldn't happen unless kernel is inconsistent about
359 * what registers exist.
361 fprintf(stderr, "Initial read of kernel register state failed\n");
362 ret = -EINVAL;
363 goto out;
366 out:
367 g_free(rlp);
368 return ret;
371 bool write_kvmstate_to_list(ARMCPU *cpu)
373 CPUState *cs = CPU(cpu);
374 int i;
375 bool ok = true;
377 for (i = 0; i < cpu->cpreg_array_len; i++) {
378 struct kvm_one_reg r;
379 uint64_t regidx = cpu->cpreg_indexes[i];
380 uint32_t v32;
381 int ret;
383 r.id = regidx;
385 switch (regidx & KVM_REG_SIZE_MASK) {
386 case KVM_REG_SIZE_U32:
387 r.addr = (uintptr_t)&v32;
388 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
389 if (!ret) {
390 cpu->cpreg_values[i] = v32;
392 break;
393 case KVM_REG_SIZE_U64:
394 r.addr = (uintptr_t)(cpu->cpreg_values + i);
395 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
396 break;
397 default:
398 abort();
400 if (ret) {
401 ok = false;
404 return ok;
407 bool write_list_to_kvmstate(ARMCPU *cpu)
409 CPUState *cs = CPU(cpu);
410 int i;
411 bool ok = true;
413 for (i = 0; i < cpu->cpreg_array_len; i++) {
414 struct kvm_one_reg r;
415 uint64_t regidx = cpu->cpreg_indexes[i];
416 uint32_t v32;
417 int ret;
419 r.id = regidx;
420 switch (regidx & KVM_REG_SIZE_MASK) {
421 case KVM_REG_SIZE_U32:
422 v32 = cpu->cpreg_values[i];
423 r.addr = (uintptr_t)&v32;
424 break;
425 case KVM_REG_SIZE_U64:
426 r.addr = (uintptr_t)(cpu->cpreg_values + i);
427 break;
428 default:
429 abort();
431 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
432 if (ret) {
433 /* We might fail for "unknown register" and also for
434 * "you tried to set a register which is constant with
435 * a different value from what it actually contains".
437 ok = false;
440 return ok;
443 void kvm_arm_reset_vcpu(ARMCPU *cpu)
445 int ret;
447 /* Re-init VCPU so that all registers are set to
448 * their respective reset values.
450 ret = kvm_arm_vcpu_init(CPU(cpu));
451 if (ret < 0) {
452 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret));
453 abort();
455 if (!write_kvmstate_to_list(cpu)) {
456 fprintf(stderr, "write_kvmstate_to_list failed\n");
457 abort();
461 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
465 void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
469 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
471 return 0;
474 bool kvm_arch_stop_on_emulation_error(CPUState *cs)
476 return true;
479 int kvm_arch_process_async_events(CPUState *cs)
481 return 0;
484 int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
486 return 1;
489 int kvm_arch_on_sigbus(int code, void *addr)
491 return 1;
494 void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
496 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
499 int kvm_arch_insert_sw_breakpoint(CPUState *cs,
500 struct kvm_sw_breakpoint *bp)
502 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
503 return -EINVAL;
506 int kvm_arch_insert_hw_breakpoint(target_ulong addr,
507 target_ulong len, int type)
509 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
510 return -EINVAL;
513 int kvm_arch_remove_hw_breakpoint(target_ulong addr,
514 target_ulong len, int type)
516 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
517 return -EINVAL;
520 int kvm_arch_remove_sw_breakpoint(CPUState *cs,
521 struct kvm_sw_breakpoint *bp)
523 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
524 return -EINVAL;
527 void kvm_arch_remove_all_hw_breakpoints(void)
529 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
532 void kvm_arch_init_irq_routing(KVMState *s)
536 int kvm_arch_irqchip_create(KVMState *s)
538 int ret;
540 /* If we can create the VGIC using the newer device control API, we
541 * let the device do this when it initializes itself, otherwise we
542 * fall back to the old API */
544 ret = kvm_create_device(s, KVM_DEV_TYPE_ARM_VGIC_V2, true);
545 if (ret == 0) {
546 return 1;
549 return 0;
552 int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
553 uint64_t address, uint32_t data)
555 return 0;