hw/display/virtio-vga.c

   1 #include "qemu/osdep.h"
   2 #include "hw/pci/pci.h"
   3 #include "hw/qdev-properties.h"
   4 #include "hw/virtio/virtio-gpu.h"
   5 #include "qapi/error.h"
   6 #include "qemu/module.h"
   7 #include "virtio-vga.h"
   8 #include "qom/object.h"
   9
  10 static void virtio_vga_base_invalidate_display(void *opaque)
  11 {
  12     VirtIOVGABase *vvga = opaque;
  13     VirtIOGPUBase *g = vvga->vgpu;
  14
  15     if (g->enable) {
  16         g->hw_ops->invalidate(g);
  17     } else {
  18         vvga->vga.hw_ops->invalidate(&vvga->vga);
  19     }
  20 }
  21
  22 static void virtio_vga_base_update_display(void *opaque)
  23 {
  24     VirtIOVGABase *vvga = opaque;
  25     VirtIOGPUBase *g = vvga->vgpu;
  26
  27     if (g->enable) {
  28         g->hw_ops->gfx_update(g);
  29     } else {
  30         vvga->vga.hw_ops->gfx_update(&vvga->vga);
  31     }
  32 }
  33
  34 static void virtio_vga_base_text_update(void *opaque, console_ch_t *chardata)
  35 {
  36     VirtIOVGABase *vvga = opaque;
  37     VirtIOGPUBase *g = vvga->vgpu;
  38
  39     if (g->enable) {
  40         if (g->hw_ops->text_update) {
  41             g->hw_ops->text_update(g, chardata);
  42         }
  43     } else {
  44         if (vvga->vga.hw_ops->text_update) {
  45             vvga->vga.hw_ops->text_update(&vvga->vga, chardata);
  46         }
  47     }
  48 }
  49
  50 static int virtio_vga_base_ui_info(void *opaque, uint32_t idx, QemuUIInfo *info)
  51 {
  52     VirtIOVGABase *vvga = opaque;
  53     VirtIOGPUBase *g = vvga->vgpu;
  54
  55     if (g->hw_ops->ui_info) {
  56         return g->hw_ops->ui_info(g, idx, info);
  57     }
  58     return -1;
  59 }
  60
  61 static void virtio_vga_base_gl_block(void *opaque, bool block)
  62 {
  63     VirtIOVGABase *vvga = opaque;
  64     VirtIOGPUBase *g = vvga->vgpu;
  65
  66     if (g->hw_ops->gl_block) {
  67         g->hw_ops->gl_block(g, block);
  68     }
  69 }
  70
  71 static const GraphicHwOps virtio_vga_base_ops = {
  72     .invalidate = virtio_vga_base_invalidate_display,
  73     .gfx_update = virtio_vga_base_update_display,
  74     .text_update = virtio_vga_base_text_update,
  75     .ui_info = virtio_vga_base_ui_info,
  76     .gl_block = virtio_vga_base_gl_block,
  77 };
  78
  79 static const VMStateDescription vmstate_virtio_vga_base = {
  80     .name = "virtio-vga",
  81     .version_id = 2,
  82     .minimum_version_id = 2,
  83     .fields = (VMStateField[]) {
  84         /* no pci stuff here, saving the virtio device will handle that */
  85         VMSTATE_STRUCT(vga, VirtIOVGABase, 0,
  86                        vmstate_vga_common, VGACommonState),
  87         VMSTATE_END_OF_LIST()
  88     }
  89 };
  90
  91 /* VGA device wrapper around PCI device around virtio GPU */
  92 static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
  93 {
  94     VirtIOVGABase *vvga = VIRTIO_VGA_BASE(vpci_dev);
  95     VirtIOGPUBase *g = vvga->vgpu;
  96     VGACommonState *vga = &vvga->vga;
  97     uint32_t offset;
  98     int i;
  99
 100     /* init vga compat bits */
 101     vga->vram_size_mb = 8;
 102     vga_common_init(vga, OBJECT(vpci_dev));
 103     vga_init(vga, OBJECT(vpci_dev), pci_address_space(&vpci_dev->pci_dev),
 104              pci_address_space_io(&vpci_dev->pci_dev), true);
 105     pci_register_bar(&vpci_dev->pci_dev, 0,
 106                      PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram);
 107
 108     /*
 109      * Configure virtio bar and regions
 110      *
 111      * We use bar #2 for the mmio regions, to be compatible with stdvga.
 112      * virtio regions are moved to the end of bar #2, to make room for
 113      * the stdvga mmio registers at the start of bar #2.
 114      */
 115     vpci_dev->modern_mem_bar_idx = 2;
 116     vpci_dev->msix_bar_idx = 4;
 117     vpci_dev->modern_io_bar_idx = 5;
 118
 119     if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
 120         /*
 121          * with page-per-vq=off there is no padding space we can use
 122          * for the stdvga registers.  Make the common and isr regions
 123          * smaller then.
 124          */
 125         vpci_dev->common.size /= 2;
 126         vpci_dev->isr.size /= 2;
 127     }
 128
 129     offset = memory_region_size(&vpci_dev->modern_bar);
 130     offset -= vpci_dev->notify.size;
 131     vpci_dev->notify.offset = offset;
 132     offset -= vpci_dev->device.size;
 133     vpci_dev->device.offset = offset;
 134     offset -= vpci_dev->isr.size;
 135     vpci_dev->isr.offset = offset;
 136     offset -= vpci_dev->common.size;
 137     vpci_dev->common.offset = offset;
 138
 139     /* init virtio bits */
 140     virtio_pci_force_virtio_1(vpci_dev);
 141     if (!qdev_realize(DEVICE(g), BUS(&vpci_dev->bus), errp)) {
 142         return;
 143     }
 144
 145     /* add stdvga mmio regions */
 146     pci_std_vga_mmio_region_init(vga, OBJECT(vvga), &vpci_dev->modern_bar,
 147                                  vvga->vga_mrs, true, false);
 148
 149     vga->con = g->scanout[0].con;
 150     graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga);
 151
 152     for (i = 0; i < g->conf.max_outputs; i++) {
 153         object_property_set_link(OBJECT(g->scanout[i].con), "device",
 154                                  OBJECT(vpci_dev), &error_abort);
 155     }
 156 }
 157
 158 static void virtio_vga_base_reset(DeviceState *dev)
 159 {
 160     VirtIOVGABaseClass *klass = VIRTIO_VGA_BASE_GET_CLASS(dev);
 161     VirtIOVGABase *vvga = VIRTIO_VGA_BASE(dev);
 162
 163     /* reset virtio-gpu */
 164     klass->parent_reset(dev);
 165
 166     /* reset vga */
 167     vga_common_reset(&vvga->vga);
 168     vga_dirty_log_start(&vvga->vga);
 169 }
 170
 171 static bool virtio_vga_get_big_endian_fb(Object *obj, Error **errp)
 172 {
 173     VirtIOVGABase *d = VIRTIO_VGA_BASE(obj);
 174
 175     return d->vga.big_endian_fb;
 176 }
 177
 178 static void virtio_vga_set_big_endian_fb(Object *obj, bool value, Error **errp)
 179 {
 180     VirtIOVGABase *d = VIRTIO_VGA_BASE(obj);
 181
 182     d->vga.big_endian_fb = value;
 183 }
 184
 185 static Property virtio_vga_base_properties[] = {
 186     DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
 187     DEFINE_PROP_END_OF_LIST(),
 188 };
 189
 190 static void virtio_vga_base_class_init(ObjectClass *klass, void *data)
 191 {
 192     DeviceClass *dc = DEVICE_CLASS(klass);
 193     VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
 194     VirtIOVGABaseClass *v = VIRTIO_VGA_BASE_CLASS(klass);
 195     PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
 196
 197     set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
 198     device_class_set_props(dc, virtio_vga_base_properties);
 199     dc->vmsd = &vmstate_virtio_vga_base;
 200     dc->hotpluggable = false;
 201     device_class_set_parent_reset(dc, virtio_vga_base_reset,
 202                                   &v->parent_reset);
 203
 204     k->realize = virtio_vga_base_realize;
 205     pcidev_k->romfile = "vgabios-virtio.bin";
 206     pcidev_k->class_id = PCI_CLASS_DISPLAY_VGA;
 207
 208     /* Expose framebuffer byteorder via QOM */
 209     object_class_property_add_bool(klass, "big-endian-framebuffer",
 210                                    virtio_vga_get_big_endian_fb,
 211                                    virtio_vga_set_big_endian_fb);
 212 }
 213
 214 static TypeInfo virtio_vga_base_info = {
 215     .name          = TYPE_VIRTIO_VGA_BASE,
 216     .parent        = TYPE_VIRTIO_PCI,
 217     .instance_size = sizeof(VirtIOVGABase),
 218     .class_size    = sizeof(VirtIOVGABaseClass),
 219     .class_init    = virtio_vga_base_class_init,
 220     .abstract      = true,
 221 };
 222
 223 #define TYPE_VIRTIO_VGA "virtio-vga"
 224
 225 typedef struct VirtIOVGA VirtIOVGA;
 226 DECLARE_INSTANCE_CHECKER(VirtIOVGA, VIRTIO_VGA,
 227                          TYPE_VIRTIO_VGA)
 228
 229 struct VirtIOVGA {
 230     VirtIOVGABase parent_obj;
 231
 232     VirtIOGPU     vdev;
 233 };
 234
 235 static void virtio_vga_inst_initfn(Object *obj)
 236 {
 237     VirtIOVGA *dev = VIRTIO_VGA(obj);
 238
 239     virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev),
 240                                 TYPE_VIRTIO_GPU);
 241     VIRTIO_VGA_BASE(dev)->vgpu = VIRTIO_GPU_BASE(&dev->vdev);
 242 }
 243
 244
 245 static VirtioPCIDeviceTypeInfo virtio_vga_info = {
 246     .generic_name  = TYPE_VIRTIO_VGA,
 247     .parent        = TYPE_VIRTIO_VGA_BASE,
 248     .instance_size = sizeof(VirtIOVGA),
 249     .instance_init = virtio_vga_inst_initfn,
 250 };
 251
 252 static void virtio_vga_register_types(void)
 253 {
 254     type_register_static(&virtio_vga_base_info);
 255     virtio_pci_types_register(&virtio_vga_info);
 256 }
 257
 258 type_init(virtio_vga_register_types)