2 * ARM implementation of KVM hooks, 64 bit specific code
4 * Copyright Mian-M. Hamayun 2013, Virtual Open Systems
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
12 #include <sys/types.h>
13 #include <sys/ioctl.h>
16 #include <linux/kvm.h>
18 #include "qemu-common.h"
19 #include "qemu/timer.h"
20 #include "sysemu/sysemu.h"
21 #include "sysemu/kvm.h"
24 #include "hw/arm/arm.h"
26 static inline void set_feature(uint64_t *features
, int feature
)
28 *features
|= 1ULL << feature
;
31 bool kvm_arm_get_host_cpu_features(ARMHostCPUClass
*ahcc
)
33 /* Identify the feature bits corresponding to the host CPU, and
34 * fill out the ARMHostCPUClass fields accordingly. To do this
35 * we have to create a scratch VM, create a single CPU inside it,
36 * and then query that CPU for the relevant ID registers.
37 * For AArch64 we currently don't care about ID registers at
38 * all; we just want to know the CPU type.
41 uint64_t features
= 0;
42 /* Old kernels may not know about the PREFERRED_TARGET ioctl: however
43 * we know these will only support creating one kind of guest CPU,
44 * which is its preferred CPU type. Fortunately these old kernels
45 * support only a very limited number of CPUs.
47 static const uint32_t cpus_to_try
[] = {
48 KVM_ARM_TARGET_AEM_V8
,
49 KVM_ARM_TARGET_FOUNDATION_V8
,
50 KVM_ARM_TARGET_CORTEX_A57
,
51 QEMU_KVM_ARM_TARGET_NONE
53 struct kvm_vcpu_init init
;
55 if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try
, fdarray
, &init
)) {
59 ahcc
->target
= init
.target
;
60 ahcc
->dtb_compatible
= "arm,arm-v8";
62 kvm_arm_destroy_scratch_host_vcpu(fdarray
);
64 /* We can assume any KVM supporting CPU is at least a v8
65 * with VFPv4+Neon; this in turn implies most of the other
68 set_feature(&features
, ARM_FEATURE_V8
);
69 set_feature(&features
, ARM_FEATURE_VFP4
);
70 set_feature(&features
, ARM_FEATURE_NEON
);
71 set_feature(&features
, ARM_FEATURE_AARCH64
);
73 ahcc
->features
= features
;
78 int kvm_arch_init_vcpu(CPUState
*cs
)
81 ARMCPU
*cpu
= ARM_CPU(cs
);
83 if (cpu
->kvm_target
== QEMU_KVM_ARM_TARGET_NONE
||
84 !arm_feature(&cpu
->env
, ARM_FEATURE_AARCH64
)) {
85 fprintf(stderr
, "KVM is not supported for this guest CPU type\n");
89 /* Determine init features for this CPU */
90 memset(cpu
->kvm_init_features
, 0, sizeof(cpu
->kvm_init_features
));
91 if (cpu
->start_powered_off
) {
92 cpu
->kvm_init_features
[0] |= 1 << KVM_ARM_VCPU_POWER_OFF
;
94 if (kvm_check_extension(cs
->kvm_state
, KVM_CAP_ARM_PSCI_0_2
)) {
95 cpu
->kvm_init_features
[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2
;
98 /* Do KVM_ARM_VCPU_INIT ioctl */
99 ret
= kvm_arm_vcpu_init(cs
);
104 /* TODO : support for save/restore/reset of system regs via tuple list */
109 #define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
110 KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
112 int kvm_arch_put_registers(CPUState
*cs
, int level
)
114 struct kvm_one_reg reg
;
119 ARMCPU
*cpu
= ARM_CPU(cs
);
120 CPUARMState
*env
= &cpu
->env
;
122 for (i
= 0; i
< 31; i
++) {
123 reg
.id
= AARCH64_CORE_REG(regs
.regs
[i
]);
124 reg
.addr
= (uintptr_t) &env
->xregs
[i
];
125 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
131 /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
132 * QEMU side we keep the current SP in xregs[31] as well.
134 if (env
->pstate
& PSTATE_SP
) {
135 env
->sp_el
[1] = env
->xregs
[31];
137 env
->sp_el
[0] = env
->xregs
[31];
140 reg
.id
= AARCH64_CORE_REG(regs
.sp
);
141 reg
.addr
= (uintptr_t) &env
->sp_el
[0];
142 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
147 reg
.id
= AARCH64_CORE_REG(sp_el1
);
148 reg
.addr
= (uintptr_t) &env
->sp_el
[1];
149 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
154 /* Note that KVM thinks pstate is 64 bit but we use a uint32_t */
155 val
= pstate_read(env
);
156 reg
.id
= AARCH64_CORE_REG(regs
.pstate
);
157 reg
.addr
= (uintptr_t) &val
;
158 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
163 reg
.id
= AARCH64_CORE_REG(regs
.pc
);
164 reg
.addr
= (uintptr_t) &env
->pc
;
165 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
170 reg
.id
= AARCH64_CORE_REG(elr_el1
);
171 reg
.addr
= (uintptr_t) &env
->elr_el
[1];
172 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
177 for (i
= 0; i
< KVM_NR_SPSR
; i
++) {
178 reg
.id
= AARCH64_CORE_REG(spsr
[i
]);
179 reg
.addr
= (uintptr_t) &env
->banked_spsr
[i
- 1];
180 ret
= kvm_vcpu_ioctl(cs
, KVM_SET_ONE_REG
, ®
);
193 int kvm_arch_get_registers(CPUState
*cs
)
195 struct kvm_one_reg reg
;
200 ARMCPU
*cpu
= ARM_CPU(cs
);
201 CPUARMState
*env
= &cpu
->env
;
203 for (i
= 0; i
< 31; i
++) {
204 reg
.id
= AARCH64_CORE_REG(regs
.regs
[i
]);
205 reg
.addr
= (uintptr_t) &env
->xregs
[i
];
206 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
212 reg
.id
= AARCH64_CORE_REG(regs
.sp
);
213 reg
.addr
= (uintptr_t) &env
->sp_el
[0];
214 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
219 reg
.id
= AARCH64_CORE_REG(sp_el1
);
220 reg
.addr
= (uintptr_t) &env
->sp_el
[1];
221 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
226 reg
.id
= AARCH64_CORE_REG(regs
.pstate
);
227 reg
.addr
= (uintptr_t) &val
;
228 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
232 pstate_write(env
, val
);
234 /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the
235 * QEMU side we keep the current SP in xregs[31] as well.
237 if (env
->pstate
& PSTATE_SP
) {
238 env
->xregs
[31] = env
->sp_el
[1];
240 env
->xregs
[31] = env
->sp_el
[0];
243 reg
.id
= AARCH64_CORE_REG(regs
.pc
);
244 reg
.addr
= (uintptr_t) &env
->pc
;
245 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
250 reg
.id
= AARCH64_CORE_REG(elr_el1
);
251 reg
.addr
= (uintptr_t) &env
->elr_el
[1];
252 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
257 for (i
= 0; i
< KVM_NR_SPSR
; i
++) {
258 reg
.id
= AARCH64_CORE_REG(spsr
[i
]);
259 reg
.addr
= (uintptr_t) &env
->banked_spsr
[i
- 1];
260 ret
= kvm_vcpu_ioctl(cs
, KVM_GET_ONE_REG
, ®
);
266 /* TODO: other registers */
270 void kvm_arm_reset_vcpu(ARMCPU
*cpu
)
272 /* Re-init VCPU so that all registers are set to
273 * their respective reset values.
275 kvm_arm_vcpu_init(CPU(cpu
));