2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 /* define it to use liveness analysis (better code) */
26 #define USE_LIVENESS_ANALYSIS
27 #define USE_TCG_OPTIMIZATIONS
31 /* Define to jump the ELF file used to communicate with GDB. */
34 #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
35 /* define it to suppress various consistency checks (faster) */
39 #include "qemu-common.h"
40 #include "qemu/host-utils.h"
41 #include "qemu/timer.h"
43 /* Note: the long term plan is to reduce the dependencies on the QEMU
44 CPU definitions. Currently they are used for qemu_ld/st
46 #define NO_CPU_IO_DEFS
51 #if UINTPTR_MAX == UINT32_MAX
52 # define ELF_CLASS ELFCLASS32
54 # define ELF_CLASS ELFCLASS64
56 #ifdef HOST_WORDS_BIGENDIAN
57 # define ELF_DATA ELFDATA2MSB
59 # define ELF_DATA ELFDATA2LSB
64 /* Forward declarations for functions declared in tcg-target.c and used here. */
65 static void tcg_target_init(TCGContext
*s
);
66 static void tcg_target_qemu_prologue(TCGContext
*s
);
67 static void patch_reloc(tcg_insn_unit
*code_ptr
, int type
,
68 intptr_t value
, intptr_t addend
);
70 /* The CIE and FDE header definitions will be common to all hosts. */
72 uint32_t len
__attribute__((aligned((sizeof(void *)))));
78 uint8_t return_column
;
81 typedef struct QEMU_PACKED
{
82 uint32_t len
__attribute__((aligned((sizeof(void *)))));
86 } DebugFrameFDEHeader
;
88 typedef struct QEMU_PACKED
{
90 DebugFrameFDEHeader fde
;
93 static void tcg_register_jit_int(void *buf
, size_t size
,
94 const void *debug_frame
,
95 size_t debug_frame_size
)
96 __attribute__((unused
));
98 /* Forward declarations for functions declared and used in tcg-target.c. */
99 static int target_parse_constraint(TCGArgConstraint
*ct
, const char **pct_str
);
100 static void tcg_out_ld(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg1
,
102 static void tcg_out_mov(TCGContext
*s
, TCGType type
, TCGReg ret
, TCGReg arg
);
103 static void tcg_out_movi(TCGContext
*s
, TCGType type
,
104 TCGReg ret
, tcg_target_long arg
);
105 static void tcg_out_op(TCGContext
*s
, TCGOpcode opc
, const TCGArg
*args
,
106 const int *const_args
);
107 static void tcg_out_st(TCGContext
*s
, TCGType type
, TCGReg arg
, TCGReg arg1
,
109 static void tcg_out_call(TCGContext
*s
, tcg_insn_unit
*target
);
110 static int tcg_target_const_match(tcg_target_long val
, TCGType type
,
111 const TCGArgConstraint
*arg_ct
);
112 static void tcg_out_tb_init(TCGContext
*s
);
113 static void tcg_out_tb_finalize(TCGContext
*s
);
116 /* Forward declarations for functions which may be used in tcg-target.c. */
117 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
120 TCGOpDef tcg_op_defs
[] = {
121 #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
125 const size_t tcg_op_defs_max
= ARRAY_SIZE(tcg_op_defs
);
127 static TCGRegSet tcg_target_available_regs
[2];
128 static TCGRegSet tcg_target_call_clobber_regs
;
130 #if TCG_TARGET_INSN_UNIT_SIZE == 1
131 static __attribute__((unused
)) inline void tcg_out8(TCGContext
*s
, uint8_t v
)
136 static __attribute__((unused
)) inline void tcg_patch8(tcg_insn_unit
*p
,
143 #if TCG_TARGET_INSN_UNIT_SIZE <= 2
144 static __attribute__((unused
)) inline void tcg_out16(TCGContext
*s
, uint16_t v
)
146 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
149 tcg_insn_unit
*p
= s
->code_ptr
;
150 memcpy(p
, &v
, sizeof(v
));
151 s
->code_ptr
= p
+ (2 / TCG_TARGET_INSN_UNIT_SIZE
);
155 static __attribute__((unused
)) inline void tcg_patch16(tcg_insn_unit
*p
,
158 if (TCG_TARGET_INSN_UNIT_SIZE
== 2) {
161 memcpy(p
, &v
, sizeof(v
));
166 #if TCG_TARGET_INSN_UNIT_SIZE <= 4
167 static __attribute__((unused
)) inline void tcg_out32(TCGContext
*s
, uint32_t v
)
169 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
172 tcg_insn_unit
*p
= s
->code_ptr
;
173 memcpy(p
, &v
, sizeof(v
));
174 s
->code_ptr
= p
+ (4 / TCG_TARGET_INSN_UNIT_SIZE
);
178 static __attribute__((unused
)) inline void tcg_patch32(tcg_insn_unit
*p
,
181 if (TCG_TARGET_INSN_UNIT_SIZE
== 4) {
184 memcpy(p
, &v
, sizeof(v
));
189 #if TCG_TARGET_INSN_UNIT_SIZE <= 8
190 static __attribute__((unused
)) inline void tcg_out64(TCGContext
*s
, uint64_t v
)
192 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
195 tcg_insn_unit
*p
= s
->code_ptr
;
196 memcpy(p
, &v
, sizeof(v
));
197 s
->code_ptr
= p
+ (8 / TCG_TARGET_INSN_UNIT_SIZE
);
201 static __attribute__((unused
)) inline void tcg_patch64(tcg_insn_unit
*p
,
204 if (TCG_TARGET_INSN_UNIT_SIZE
== 8) {
207 memcpy(p
, &v
, sizeof(v
));
212 /* label relocation processing */
214 static void tcg_out_reloc(TCGContext
*s
, tcg_insn_unit
*code_ptr
, int type
,
215 TCGLabel
*l
, intptr_t addend
)
220 /* FIXME: This may break relocations on RISC targets that
221 modify instruction fields in place. The caller may not have
222 written the initial value. */
223 patch_reloc(code_ptr
, type
, l
->u
.value
, addend
);
225 /* add a new relocation entry */
226 r
= tcg_malloc(sizeof(TCGRelocation
));
230 r
->next
= l
->u
.first_reloc
;
231 l
->u
.first_reloc
= r
;
235 static void tcg_out_label(TCGContext
*s
, TCGLabel
*l
, tcg_insn_unit
*ptr
)
237 intptr_t value
= (intptr_t)ptr
;
240 assert(!l
->has_value
);
242 for (r
= l
->u
.first_reloc
; r
!= NULL
; r
= r
->next
) {
243 patch_reloc(r
->ptr
, r
->type
, value
, r
->addend
);
247 l
->u
.value_ptr
= ptr
;
250 TCGLabel
*gen_new_label(void)
252 TCGContext
*s
= &tcg_ctx
;
253 TCGLabel
*l
= tcg_malloc(sizeof(TCGLabel
));
262 #include "tcg-target.c"
264 /* pool based memory allocation */
265 void *tcg_malloc_internal(TCGContext
*s
, int size
)
270 if (size
> TCG_POOL_CHUNK_SIZE
) {
271 /* big malloc: insert a new pool (XXX: could optimize) */
272 p
= g_malloc(sizeof(TCGPool
) + size
);
274 p
->next
= s
->pool_first_large
;
275 s
->pool_first_large
= p
;
286 pool_size
= TCG_POOL_CHUNK_SIZE
;
287 p
= g_malloc(sizeof(TCGPool
) + pool_size
);
291 s
->pool_current
->next
= p
;
300 s
->pool_cur
= p
->data
+ size
;
301 s
->pool_end
= p
->data
+ p
->size
;
305 void tcg_pool_reset(TCGContext
*s
)
308 for (p
= s
->pool_first_large
; p
; p
= t
) {
312 s
->pool_first_large
= NULL
;
313 s
->pool_cur
= s
->pool_end
= NULL
;
314 s
->pool_current
= NULL
;
317 typedef struct TCGHelperInfo
{
324 #include "exec/helper-proto.h"
326 static const TCGHelperInfo all_helpers
[] = {
327 #include "exec/helper-tcg.h"
330 void tcg_context_init(TCGContext
*s
)
332 int op
, total_args
, n
, i
;
334 TCGArgConstraint
*args_ct
;
336 GHashTable
*helper_table
;
338 memset(s
, 0, sizeof(*s
));
341 /* Count total number of arguments and allocate the corresponding
344 for(op
= 0; op
< NB_OPS
; op
++) {
345 def
= &tcg_op_defs
[op
];
346 n
= def
->nb_iargs
+ def
->nb_oargs
;
350 args_ct
= g_malloc(sizeof(TCGArgConstraint
) * total_args
);
351 sorted_args
= g_malloc(sizeof(int) * total_args
);
353 for(op
= 0; op
< NB_OPS
; op
++) {
354 def
= &tcg_op_defs
[op
];
355 def
->args_ct
= args_ct
;
356 def
->sorted_args
= sorted_args
;
357 n
= def
->nb_iargs
+ def
->nb_oargs
;
362 /* Register helpers. */
363 /* Use g_direct_hash/equal for direct pointer comparisons on func. */
364 s
->helpers
= helper_table
= g_hash_table_new(NULL
, NULL
);
366 for (i
= 0; i
< ARRAY_SIZE(all_helpers
); ++i
) {
367 g_hash_table_insert(helper_table
, (gpointer
)all_helpers
[i
].func
,
368 (gpointer
)&all_helpers
[i
]);
374 void tcg_prologue_init(TCGContext
*s
)
376 /* init global prologue and epilogue */
377 s
->code_buf
= s
->code_gen_prologue
;
378 s
->code_ptr
= s
->code_buf
;
379 tcg_target_qemu_prologue(s
);
380 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
383 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM
)) {
384 size_t size
= tcg_current_code_size(s
);
385 qemu_log("PROLOGUE: [size=%zu]\n", size
);
386 log_disas(s
->code_buf
, size
);
393 void tcg_set_frame(TCGContext
*s
, int reg
, intptr_t start
, intptr_t size
)
395 s
->frame_start
= start
;
396 s
->frame_end
= start
+ size
;
400 void tcg_func_start(TCGContext
*s
)
403 s
->nb_temps
= s
->nb_globals
;
405 /* No temps have been previously allocated for size or locality. */
406 memset(s
->free_temps
, 0, sizeof(s
->free_temps
));
409 s
->current_frame_offset
= s
->frame_start
;
411 #ifdef CONFIG_DEBUG_TCG
412 s
->goto_tb_issue_mask
= 0;
415 s
->gen_first_op_idx
= 0;
416 s
->gen_last_op_idx
= -1;
417 s
->gen_next_op_idx
= 0;
418 s
->gen_next_parm_idx
= 0;
420 s
->be
= tcg_malloc(sizeof(TCGBackendData
));
423 static inline void tcg_temp_alloc(TCGContext
*s
, int n
)
425 if (n
> TCG_MAX_TEMPS
)
429 static inline int tcg_global_reg_new_internal(TCGType type
, int reg
,
432 TCGContext
*s
= &tcg_ctx
;
436 #if TCG_TARGET_REG_BITS == 32
437 if (type
!= TCG_TYPE_I32
)
440 if (tcg_regset_test_reg(s
->reserved_regs
, reg
))
443 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
444 ts
= &s
->temps
[s
->nb_globals
];
445 ts
->base_type
= type
;
451 tcg_regset_set_reg(s
->reserved_regs
, reg
);
455 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
)
459 idx
= tcg_global_reg_new_internal(TCG_TYPE_I32
, reg
, name
);
460 return MAKE_TCGV_I32(idx
);
463 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
)
467 idx
= tcg_global_reg_new_internal(TCG_TYPE_I64
, reg
, name
);
468 return MAKE_TCGV_I64(idx
);
471 static inline int tcg_global_mem_new_internal(TCGType type
, int reg
,
475 TCGContext
*s
= &tcg_ctx
;
480 #if TCG_TARGET_REG_BITS == 32
481 if (type
== TCG_TYPE_I64
) {
483 tcg_temp_alloc(s
, s
->nb_globals
+ 2);
484 ts
= &s
->temps
[s
->nb_globals
];
485 ts
->base_type
= type
;
486 ts
->type
= TCG_TYPE_I32
;
488 ts
->mem_allocated
= 1;
490 #ifdef HOST_WORDS_BIGENDIAN
491 ts
->mem_offset
= offset
+ 4;
493 ts
->mem_offset
= offset
;
495 pstrcpy(buf
, sizeof(buf
), name
);
496 pstrcat(buf
, sizeof(buf
), "_0");
497 ts
->name
= strdup(buf
);
500 ts
->base_type
= type
;
501 ts
->type
= TCG_TYPE_I32
;
503 ts
->mem_allocated
= 1;
505 #ifdef HOST_WORDS_BIGENDIAN
506 ts
->mem_offset
= offset
;
508 ts
->mem_offset
= offset
+ 4;
510 pstrcpy(buf
, sizeof(buf
), name
);
511 pstrcat(buf
, sizeof(buf
), "_1");
512 ts
->name
= strdup(buf
);
518 tcg_temp_alloc(s
, s
->nb_globals
+ 1);
519 ts
= &s
->temps
[s
->nb_globals
];
520 ts
->base_type
= type
;
523 ts
->mem_allocated
= 1;
525 ts
->mem_offset
= offset
;
532 TCGv_i32
tcg_global_mem_new_i32(int reg
, intptr_t offset
, const char *name
)
534 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I32
, reg
, offset
, name
);
535 return MAKE_TCGV_I32(idx
);
538 TCGv_i64
tcg_global_mem_new_i64(int reg
, intptr_t offset
, const char *name
)
540 int idx
= tcg_global_mem_new_internal(TCG_TYPE_I64
, reg
, offset
, name
);
541 return MAKE_TCGV_I64(idx
);
544 static inline int tcg_temp_new_internal(TCGType type
, int temp_local
)
546 TCGContext
*s
= &tcg_ctx
;
550 k
= type
+ (temp_local
? TCG_TYPE_COUNT
: 0);
551 idx
= find_first_bit(s
->free_temps
[k
].l
, TCG_MAX_TEMPS
);
552 if (idx
< TCG_MAX_TEMPS
) {
553 /* There is already an available temp with the right type. */
554 clear_bit(idx
, s
->free_temps
[k
].l
);
557 ts
->temp_allocated
= 1;
558 assert(ts
->base_type
== type
);
559 assert(ts
->temp_local
== temp_local
);
562 #if TCG_TARGET_REG_BITS == 32
563 if (type
== TCG_TYPE_I64
) {
564 tcg_temp_alloc(s
, s
->nb_temps
+ 2);
565 ts
= &s
->temps
[s
->nb_temps
];
566 ts
->base_type
= type
;
567 ts
->type
= TCG_TYPE_I32
;
568 ts
->temp_allocated
= 1;
569 ts
->temp_local
= temp_local
;
572 ts
->base_type
= type
;
573 ts
->type
= TCG_TYPE_I32
;
574 ts
->temp_allocated
= 1;
575 ts
->temp_local
= temp_local
;
581 tcg_temp_alloc(s
, s
->nb_temps
+ 1);
582 ts
= &s
->temps
[s
->nb_temps
];
583 ts
->base_type
= type
;
585 ts
->temp_allocated
= 1;
586 ts
->temp_local
= temp_local
;
592 #if defined(CONFIG_DEBUG_TCG)
598 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
)
602 idx
= tcg_temp_new_internal(TCG_TYPE_I32
, temp_local
);
603 return MAKE_TCGV_I32(idx
);
606 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
)
610 idx
= tcg_temp_new_internal(TCG_TYPE_I64
, temp_local
);
611 return MAKE_TCGV_I64(idx
);
614 static void tcg_temp_free_internal(int idx
)
616 TCGContext
*s
= &tcg_ctx
;
620 #if defined(CONFIG_DEBUG_TCG)
622 if (s
->temps_in_use
< 0) {
623 fprintf(stderr
, "More temporaries freed than allocated!\n");
627 assert(idx
>= s
->nb_globals
&& idx
< s
->nb_temps
);
629 assert(ts
->temp_allocated
!= 0);
630 ts
->temp_allocated
= 0;
632 k
= ts
->base_type
+ (ts
->temp_local
? TCG_TYPE_COUNT
: 0);
633 set_bit(idx
, s
->free_temps
[k
].l
);
636 void tcg_temp_free_i32(TCGv_i32 arg
)
638 tcg_temp_free_internal(GET_TCGV_I32(arg
));
641 void tcg_temp_free_i64(TCGv_i64 arg
)
643 tcg_temp_free_internal(GET_TCGV_I64(arg
));
646 TCGv_i32
tcg_const_i32(int32_t val
)
649 t0
= tcg_temp_new_i32();
650 tcg_gen_movi_i32(t0
, val
);
654 TCGv_i64
tcg_const_i64(int64_t val
)
657 t0
= tcg_temp_new_i64();
658 tcg_gen_movi_i64(t0
, val
);
662 TCGv_i32
tcg_const_local_i32(int32_t val
)
665 t0
= tcg_temp_local_new_i32();
666 tcg_gen_movi_i32(t0
, val
);
670 TCGv_i64
tcg_const_local_i64(int64_t val
)
673 t0
= tcg_temp_local_new_i64();
674 tcg_gen_movi_i64(t0
, val
);
678 #if defined(CONFIG_DEBUG_TCG)
679 void tcg_clear_temp_count(void)
681 TCGContext
*s
= &tcg_ctx
;
685 int tcg_check_temp_count(void)
687 TCGContext
*s
= &tcg_ctx
;
688 if (s
->temps_in_use
) {
689 /* Clear the count so that we don't give another
690 * warning immediately next time around.
699 /* Note: we convert the 64 bit args to 32 bit and do some alignment
700 and endian swap. Maybe it would be better to do the alignment
701 and endian swap in tcg_reg_alloc_call(). */
702 void tcg_gen_callN(TCGContext
*s
, void *func
, TCGArg ret
,
703 int nargs
, TCGArg
*args
)
705 int i
, real_args
, nb_rets
, pi
, pi_first
;
706 unsigned sizemask
, flags
;
709 info
= g_hash_table_lookup(s
->helpers
, (gpointer
)func
);
711 sizemask
= info
->sizemask
;
713 #if defined(__sparc__) && !defined(__arch64__) \
714 && !defined(CONFIG_TCG_INTERPRETER)
715 /* We have 64-bit values in one register, but need to pass as two
716 separate parameters. Split them. */
717 int orig_sizemask
= sizemask
;
718 int orig_nargs
= nargs
;
721 TCGV_UNUSED_I64(retl
);
722 TCGV_UNUSED_I64(reth
);
724 TCGArg
*split_args
= __builtin_alloca(sizeof(TCGArg
) * nargs
* 2);
725 for (i
= real_args
= 0; i
< nargs
; ++i
) {
726 int is_64bit
= sizemask
& (1 << (i
+1)*2);
728 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
729 TCGv_i32 h
= tcg_temp_new_i32();
730 TCGv_i32 l
= tcg_temp_new_i32();
731 tcg_gen_extr_i64_i32(l
, h
, orig
);
732 split_args
[real_args
++] = GET_TCGV_I32(h
);
733 split_args
[real_args
++] = GET_TCGV_I32(l
);
735 split_args
[real_args
++] = args
[i
];
742 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
743 for (i
= 0; i
< nargs
; ++i
) {
744 int is_64bit
= sizemask
& (1 << (i
+1)*2);
745 int is_signed
= sizemask
& (2 << (i
+1)*2);
747 TCGv_i64 temp
= tcg_temp_new_i64();
748 TCGv_i64 orig
= MAKE_TCGV_I64(args
[i
]);
750 tcg_gen_ext32s_i64(temp
, orig
);
752 tcg_gen_ext32u_i64(temp
, orig
);
754 args
[i
] = GET_TCGV_I64(temp
);
757 #endif /* TCG_TARGET_EXTEND_ARGS */
759 pi_first
= pi
= s
->gen_next_parm_idx
;
760 if (ret
!= TCG_CALL_DUMMY_ARG
) {
761 #if defined(__sparc__) && !defined(__arch64__) \
762 && !defined(CONFIG_TCG_INTERPRETER)
763 if (orig_sizemask
& 1) {
764 /* The 32-bit ABI is going to return the 64-bit value in
765 the %o0/%o1 register pair. Prepare for this by using
766 two return temporaries, and reassemble below. */
767 retl
= tcg_temp_new_i64();
768 reth
= tcg_temp_new_i64();
769 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(reth
);
770 s
->gen_opparam_buf
[pi
++] = GET_TCGV_I64(retl
);
773 s
->gen_opparam_buf
[pi
++] = ret
;
777 if (TCG_TARGET_REG_BITS
< 64 && (sizemask
& 1)) {
778 #ifdef HOST_WORDS_BIGENDIAN
779 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
780 s
->gen_opparam_buf
[pi
++] = ret
;
782 s
->gen_opparam_buf
[pi
++] = ret
;
783 s
->gen_opparam_buf
[pi
++] = ret
+ 1;
787 s
->gen_opparam_buf
[pi
++] = ret
;
795 for (i
= 0; i
< nargs
; i
++) {
796 int is_64bit
= sizemask
& (1 << (i
+1)*2);
797 if (TCG_TARGET_REG_BITS
< 64 && is_64bit
) {
798 #ifdef TCG_TARGET_CALL_ALIGN_ARGS
799 /* some targets want aligned 64 bit args */
801 s
->gen_opparam_buf
[pi
++] = TCG_CALL_DUMMY_ARG
;
805 /* If stack grows up, then we will be placing successive
806 arguments at lower addresses, which means we need to
807 reverse the order compared to how we would normally
808 treat either big or little-endian. For those arguments
809 that will wind up in registers, this still works for
810 HPPA (the only current STACK_GROWSUP target) since the
811 argument registers are *also* allocated in decreasing
812 order. If another such target is added, this logic may
813 have to get more complicated to differentiate between
814 stack arguments and register arguments. */
815 #if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
816 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
817 s
->gen_opparam_buf
[pi
++] = args
[i
];
819 s
->gen_opparam_buf
[pi
++] = args
[i
];
820 s
->gen_opparam_buf
[pi
++] = args
[i
] + 1;
826 s
->gen_opparam_buf
[pi
++] = args
[i
];
829 s
->gen_opparam_buf
[pi
++] = (uintptr_t)func
;
830 s
->gen_opparam_buf
[pi
++] = flags
;
832 i
= s
->gen_next_op_idx
;
833 tcg_debug_assert(i
< OPC_BUF_SIZE
);
834 tcg_debug_assert(pi
<= OPPARAM_BUF_SIZE
);
836 /* Set links for sequential allocation during translation. */
837 s
->gen_op_buf
[i
] = (TCGOp
){
838 .opc
= INDEX_op_call
,
846 /* Make sure the calli field didn't overflow. */
847 tcg_debug_assert(s
->gen_op_buf
[i
].calli
== real_args
);
849 s
->gen_last_op_idx
= i
;
850 s
->gen_next_op_idx
= i
+ 1;
851 s
->gen_next_parm_idx
= pi
;
853 #if defined(__sparc__) && !defined(__arch64__) \
854 && !defined(CONFIG_TCG_INTERPRETER)
855 /* Free all of the parts we allocated above. */
856 for (i
= real_args
= 0; i
< orig_nargs
; ++i
) {
857 int is_64bit
= orig_sizemask
& (1 << (i
+1)*2);
859 TCGv_i32 h
= MAKE_TCGV_I32(args
[real_args
++]);
860 TCGv_i32 l
= MAKE_TCGV_I32(args
[real_args
++]);
861 tcg_temp_free_i32(h
);
862 tcg_temp_free_i32(l
);
867 if (orig_sizemask
& 1) {
868 /* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
869 Note that describing these as TCGv_i64 eliminates an unnecessary
870 zero-extension that tcg_gen_concat_i32_i64 would create. */
871 tcg_gen_concat32_i64(MAKE_TCGV_I64(ret
), retl
, reth
);
872 tcg_temp_free_i64(retl
);
873 tcg_temp_free_i64(reth
);
875 #elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
876 for (i
= 0; i
< nargs
; ++i
) {
877 int is_64bit
= sizemask
& (1 << (i
+1)*2);
879 TCGv_i64 temp
= MAKE_TCGV_I64(args
[i
]);
880 tcg_temp_free_i64(temp
);
883 #endif /* TCG_TARGET_EXTEND_ARGS */
886 static void tcg_reg_alloc_start(TCGContext
*s
)
890 for(i
= 0; i
< s
->nb_globals
; i
++) {
893 ts
->val_type
= TEMP_VAL_REG
;
895 ts
->val_type
= TEMP_VAL_MEM
;
898 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
900 if (ts
->temp_local
) {
901 ts
->val_type
= TEMP_VAL_MEM
;
903 ts
->val_type
= TEMP_VAL_DEAD
;
905 ts
->mem_allocated
= 0;
908 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
909 s
->reg_to_temp
[i
] = -1;
913 static char *tcg_get_arg_str_idx(TCGContext
*s
, char *buf
, int buf_size
,
918 assert(idx
>= 0 && idx
< s
->nb_temps
);
920 if (idx
< s
->nb_globals
) {
921 pstrcpy(buf
, buf_size
, ts
->name
);
923 if (ts
&& ts
->temp_local
)
924 snprintf(buf
, buf_size
, "loc%d", idx
- s
->nb_globals
);
926 snprintf(buf
, buf_size
, "tmp%d", idx
- s
->nb_globals
);
931 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
)
933 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I32(arg
));
936 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
)
938 return tcg_get_arg_str_idx(s
, buf
, buf_size
, GET_TCGV_I64(arg
));
941 /* Find helper name. */
942 static inline const char *tcg_find_helper(TCGContext
*s
, uintptr_t val
)
944 const char *ret
= NULL
;
946 TCGHelperInfo
*info
= g_hash_table_lookup(s
->helpers
, (gpointer
)val
);
954 static const char * const cond_name
[] =
956 [TCG_COND_NEVER
] = "never",
957 [TCG_COND_ALWAYS
] = "always",
958 [TCG_COND_EQ
] = "eq",
959 [TCG_COND_NE
] = "ne",
960 [TCG_COND_LT
] = "lt",
961 [TCG_COND_GE
] = "ge",
962 [TCG_COND_LE
] = "le",
963 [TCG_COND_GT
] = "gt",
964 [TCG_COND_LTU
] = "ltu",
965 [TCG_COND_GEU
] = "geu",
966 [TCG_COND_LEU
] = "leu",
967 [TCG_COND_GTU
] = "gtu"
970 static const char * const ldst_name
[] =
986 void tcg_dump_ops(TCGContext
*s
)
992 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= op
->next
) {
993 int i
, k
, nb_oargs
, nb_iargs
, nb_cargs
;
998 op
= &s
->gen_op_buf
[oi
];
1000 def
= &tcg_op_defs
[c
];
1001 args
= &s
->gen_opparam_buf
[op
->args
];
1003 if (c
== INDEX_op_debug_insn_start
) {
1005 #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
1006 pc
= ((uint64_t)args
[1] << 32) | args
[0];
1010 if (oi
!= s
->gen_first_op_idx
) {
1013 qemu_log(" ---- 0x%" PRIx64
, pc
);
1014 } else if (c
== INDEX_op_call
) {
1015 /* variable number of arguments */
1016 nb_oargs
= op
->callo
;
1017 nb_iargs
= op
->calli
;
1018 nb_cargs
= def
->nb_cargs
;
1020 /* function name, flags, out args */
1021 qemu_log(" %s %s,$0x%" TCG_PRIlx
",$%d", def
->name
,
1022 tcg_find_helper(s
, args
[nb_oargs
+ nb_iargs
]),
1023 args
[nb_oargs
+ nb_iargs
+ 1], nb_oargs
);
1024 for (i
= 0; i
< nb_oargs
; i
++) {
1025 qemu_log(",%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1028 for (i
= 0; i
< nb_iargs
; i
++) {
1029 TCGArg arg
= args
[nb_oargs
+ i
];
1030 const char *t
= "<dummy>";
1031 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1032 t
= tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), arg
);
1037 qemu_log(" %s ", def
->name
);
1039 nb_oargs
= def
->nb_oargs
;
1040 nb_iargs
= def
->nb_iargs
;
1041 nb_cargs
= def
->nb_cargs
;
1044 for (i
= 0; i
< nb_oargs
; i
++) {
1048 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1051 for (i
= 0; i
< nb_iargs
; i
++) {
1055 qemu_log("%s", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
),
1059 case INDEX_op_brcond_i32
:
1060 case INDEX_op_setcond_i32
:
1061 case INDEX_op_movcond_i32
:
1062 case INDEX_op_brcond2_i32
:
1063 case INDEX_op_setcond2_i32
:
1064 case INDEX_op_brcond_i64
:
1065 case INDEX_op_setcond_i64
:
1066 case INDEX_op_movcond_i64
:
1067 if (args
[k
] < ARRAY_SIZE(cond_name
) && cond_name
[args
[k
]]) {
1068 qemu_log(",%s", cond_name
[args
[k
++]]);
1070 qemu_log(",$0x%" TCG_PRIlx
, args
[k
++]);
1074 case INDEX_op_qemu_ld_i32
:
1075 case INDEX_op_qemu_st_i32
:
1076 case INDEX_op_qemu_ld_i64
:
1077 case INDEX_op_qemu_st_i64
:
1079 TCGMemOpIdx oi
= args
[k
++];
1080 TCGMemOp op
= get_memop(oi
);
1081 unsigned ix
= get_mmuidx(oi
);
1083 if (op
& ~(MO_AMASK
| MO_BSWAP
| MO_SSIZE
)) {
1084 qemu_log(",$0x%x,%u", op
, ix
);
1086 const char *s_al
= "", *s_op
;
1087 if (op
& MO_AMASK
) {
1088 if ((op
& MO_AMASK
) == MO_ALIGN
) {
1094 s_op
= ldst_name
[op
& (MO_BSWAP
| MO_SSIZE
)];
1095 qemu_log(",%s%s,%u", s_al
, s_op
, ix
);
1105 case INDEX_op_set_label
:
1107 case INDEX_op_brcond_i32
:
1108 case INDEX_op_brcond_i64
:
1109 case INDEX_op_brcond2_i32
:
1110 qemu_log("%s$L%d", k
? "," : "", arg_label(args
[k
])->id
);
1116 for (; i
< nb_cargs
; i
++, k
++) {
1117 qemu_log("%s$0x%" TCG_PRIlx
, k
? "," : "", args
[k
]);
1124 /* we give more priority to constraints with less registers */
1125 static int get_constraint_priority(const TCGOpDef
*def
, int k
)
1127 const TCGArgConstraint
*arg_ct
;
1130 arg_ct
= &def
->args_ct
[k
];
1131 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
1132 /* an alias is equivalent to a single register */
1135 if (!(arg_ct
->ct
& TCG_CT_REG
))
1138 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1139 if (tcg_regset_test_reg(arg_ct
->u
.regs
, i
))
1143 return TCG_TARGET_NB_REGS
- n
+ 1;
1146 /* sort from highest priority to lowest */
1147 static void sort_constraints(TCGOpDef
*def
, int start
, int n
)
1149 int i
, j
, p1
, p2
, tmp
;
1151 for(i
= 0; i
< n
; i
++)
1152 def
->sorted_args
[start
+ i
] = start
+ i
;
1155 for(i
= 0; i
< n
- 1; i
++) {
1156 for(j
= i
+ 1; j
< n
; j
++) {
1157 p1
= get_constraint_priority(def
, def
->sorted_args
[start
+ i
]);
1158 p2
= get_constraint_priority(def
, def
->sorted_args
[start
+ j
]);
1160 tmp
= def
->sorted_args
[start
+ i
];
1161 def
->sorted_args
[start
+ i
] = def
->sorted_args
[start
+ j
];
1162 def
->sorted_args
[start
+ j
] = tmp
;
1168 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
)
1176 if (tdefs
->op
== (TCGOpcode
)-1)
1179 assert((unsigned)op
< NB_OPS
);
1180 def
= &tcg_op_defs
[op
];
1181 #if defined(CONFIG_DEBUG_TCG)
1182 /* Duplicate entry in op definitions? */
1186 nb_args
= def
->nb_iargs
+ def
->nb_oargs
;
1187 for(i
= 0; i
< nb_args
; i
++) {
1188 ct_str
= tdefs
->args_ct_str
[i
];
1189 /* Incomplete TCGTargetOpDef entry? */
1190 assert(ct_str
!= NULL
);
1191 tcg_regset_clear(def
->args_ct
[i
].u
.regs
);
1192 def
->args_ct
[i
].ct
= 0;
1193 if (ct_str
[0] >= '0' && ct_str
[0] <= '9') {
1195 oarg
= ct_str
[0] - '0';
1196 assert(oarg
< def
->nb_oargs
);
1197 assert(def
->args_ct
[oarg
].ct
& TCG_CT_REG
);
1198 /* TCG_CT_ALIAS is for the output arguments. The input
1199 argument is tagged with TCG_CT_IALIAS. */
1200 def
->args_ct
[i
] = def
->args_ct
[oarg
];
1201 def
->args_ct
[oarg
].ct
= TCG_CT_ALIAS
;
1202 def
->args_ct
[oarg
].alias_index
= i
;
1203 def
->args_ct
[i
].ct
|= TCG_CT_IALIAS
;
1204 def
->args_ct
[i
].alias_index
= oarg
;
1207 if (*ct_str
== '\0')
1211 def
->args_ct
[i
].ct
|= TCG_CT_CONST
;
1215 if (target_parse_constraint(&def
->args_ct
[i
], &ct_str
) < 0) {
1216 fprintf(stderr
, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1217 ct_str
, i
, def
->name
);
1225 /* TCGTargetOpDef entry with too much information? */
1226 assert(i
== TCG_MAX_OP_ARGS
|| tdefs
->args_ct_str
[i
] == NULL
);
1228 /* sort the constraints (XXX: this is just an heuristic) */
1229 sort_constraints(def
, 0, def
->nb_oargs
);
1230 sort_constraints(def
, def
->nb_oargs
, def
->nb_iargs
);
1236 printf("%s: sorted=", def
->name
);
1237 for(i
= 0; i
< def
->nb_oargs
+ def
->nb_iargs
; i
++)
1238 printf(" %d", def
->sorted_args
[i
]);
1245 #if defined(CONFIG_DEBUG_TCG)
1247 for (op
= 0; op
< ARRAY_SIZE(tcg_op_defs
); op
++) {
1248 const TCGOpDef
*def
= &tcg_op_defs
[op
];
1249 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
1250 /* Wrong entry in op definitions? */
1252 fprintf(stderr
, "Invalid op definition for %s\n", def
->name
);
1256 /* Missing entry in op definitions? */
1258 fprintf(stderr
, "Missing op definition for %s\n", def
->name
);
1269 void tcg_op_remove(TCGContext
*s
, TCGOp
*op
)
1271 int next
= op
->next
;
1272 int prev
= op
->prev
;
1275 s
->gen_op_buf
[next
].prev
= prev
;
1277 s
->gen_last_op_idx
= prev
;
1280 s
->gen_op_buf
[prev
].next
= next
;
1282 s
->gen_first_op_idx
= next
;
1285 memset(op
, -1, sizeof(*op
));
1287 #ifdef CONFIG_PROFILER
1292 #ifdef USE_LIVENESS_ANALYSIS
1293 /* liveness analysis: end of function: all temps are dead, and globals
1294 should be in memory. */
1295 static inline void tcg_la_func_end(TCGContext
*s
, uint8_t *dead_temps
,
1298 memset(dead_temps
, 1, s
->nb_temps
);
1299 memset(mem_temps
, 1, s
->nb_globals
);
1300 memset(mem_temps
+ s
->nb_globals
, 0, s
->nb_temps
- s
->nb_globals
);
1303 /* liveness analysis: end of basic block: all temps are dead, globals
1304 and local temps should be in memory. */
1305 static inline void tcg_la_bb_end(TCGContext
*s
, uint8_t *dead_temps
,
1310 memset(dead_temps
, 1, s
->nb_temps
);
1311 memset(mem_temps
, 1, s
->nb_globals
);
1312 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1313 mem_temps
[i
] = s
->temps
[i
].temp_local
;
1317 /* Liveness analysis : update the opc_dead_args array to tell if a
1318 given input arguments is dead. Instructions updating dead
1319 temporaries are removed. */
1320 static void tcg_liveness_analysis(TCGContext
*s
)
1322 uint8_t *dead_temps
, *mem_temps
;
1323 int oi
, oi_prev
, nb_ops
;
1325 nb_ops
= s
->gen_next_op_idx
;
1326 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1327 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1329 dead_temps
= tcg_malloc(s
->nb_temps
);
1330 mem_temps
= tcg_malloc(s
->nb_temps
);
1331 tcg_la_func_end(s
, dead_temps
, mem_temps
);
1333 for (oi
= s
->gen_last_op_idx
; oi
>= 0; oi
= oi_prev
) {
1334 int i
, nb_iargs
, nb_oargs
;
1335 TCGOpcode opc_new
, opc_new2
;
1341 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
1342 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
1343 TCGOpcode opc
= op
->opc
;
1344 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
1353 nb_oargs
= op
->callo
;
1354 nb_iargs
= op
->calli
;
1355 call_flags
= args
[nb_oargs
+ nb_iargs
+ 1];
1357 /* pure functions can be removed if their result is unused */
1358 if (call_flags
& TCG_CALL_NO_SIDE_EFFECTS
) {
1359 for (i
= 0; i
< nb_oargs
; i
++) {
1361 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1362 goto do_not_remove_call
;
1369 /* output args are dead */
1372 for (i
= 0; i
< nb_oargs
; i
++) {
1374 if (dead_temps
[arg
]) {
1375 dead_args
|= (1 << i
);
1377 if (mem_temps
[arg
]) {
1378 sync_args
|= (1 << i
);
1380 dead_temps
[arg
] = 1;
1384 if (!(call_flags
& TCG_CALL_NO_READ_GLOBALS
)) {
1385 /* globals should be synced to memory */
1386 memset(mem_temps
, 1, s
->nb_globals
);
1388 if (!(call_flags
& (TCG_CALL_NO_WRITE_GLOBALS
|
1389 TCG_CALL_NO_READ_GLOBALS
))) {
1390 /* globals should go back to memory */
1391 memset(dead_temps
, 1, s
->nb_globals
);
1394 /* record arguments that die in this helper */
1395 for (i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
1397 if (arg
!= TCG_CALL_DUMMY_ARG
) {
1398 if (dead_temps
[arg
]) {
1399 dead_args
|= (1 << i
);
1403 /* input arguments are live for preceeding opcodes */
1404 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1406 dead_temps
[arg
] = 0;
1408 s
->op_dead_args
[oi
] = dead_args
;
1409 s
->op_sync_args
[oi
] = sync_args
;
1413 case INDEX_op_debug_insn_start
:
1415 case INDEX_op_discard
:
1416 /* mark the temporary as dead */
1417 dead_temps
[args
[0]] = 1;
1418 mem_temps
[args
[0]] = 0;
1421 case INDEX_op_add2_i32
:
1422 opc_new
= INDEX_op_add_i32
;
1424 case INDEX_op_sub2_i32
:
1425 opc_new
= INDEX_op_sub_i32
;
1427 case INDEX_op_add2_i64
:
1428 opc_new
= INDEX_op_add_i64
;
1430 case INDEX_op_sub2_i64
:
1431 opc_new
= INDEX_op_sub_i64
;
1435 /* Test if the high part of the operation is dead, but not
1436 the low part. The result can be optimized to a simple
1437 add or sub. This happens often for x86_64 guest when the
1438 cpu mode is set to 32 bit. */
1439 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1440 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1443 /* Replace the opcode and adjust the args in place,
1444 leaving 3 unused args at the end. */
1445 op
->opc
= opc
= opc_new
;
1448 /* Fall through and mark the single-word operation live. */
1454 case INDEX_op_mulu2_i32
:
1455 opc_new
= INDEX_op_mul_i32
;
1456 opc_new2
= INDEX_op_muluh_i32
;
1457 have_opc_new2
= TCG_TARGET_HAS_muluh_i32
;
1459 case INDEX_op_muls2_i32
:
1460 opc_new
= INDEX_op_mul_i32
;
1461 opc_new2
= INDEX_op_mulsh_i32
;
1462 have_opc_new2
= TCG_TARGET_HAS_mulsh_i32
;
1464 case INDEX_op_mulu2_i64
:
1465 opc_new
= INDEX_op_mul_i64
;
1466 opc_new2
= INDEX_op_muluh_i64
;
1467 have_opc_new2
= TCG_TARGET_HAS_muluh_i64
;
1469 case INDEX_op_muls2_i64
:
1470 opc_new
= INDEX_op_mul_i64
;
1471 opc_new2
= INDEX_op_mulsh_i64
;
1472 have_opc_new2
= TCG_TARGET_HAS_mulsh_i64
;
1477 if (dead_temps
[args
[1]] && !mem_temps
[args
[1]]) {
1478 if (dead_temps
[args
[0]] && !mem_temps
[args
[0]]) {
1479 /* Both parts of the operation are dead. */
1482 /* The high part of the operation is dead; generate the low. */
1483 op
->opc
= opc
= opc_new
;
1486 } else if (have_opc_new2
&& dead_temps
[args
[0]]
1487 && !mem_temps
[args
[0]]) {
1488 /* The low part of the operation is dead; generate the high. */
1489 op
->opc
= opc
= opc_new2
;
1496 /* Mark the single-word operation live. */
1501 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1502 nb_iargs
= def
->nb_iargs
;
1503 nb_oargs
= def
->nb_oargs
;
1505 /* Test if the operation can be removed because all
1506 its outputs are dead. We assume that nb_oargs == 0
1507 implies side effects */
1508 if (!(def
->flags
& TCG_OPF_SIDE_EFFECTS
) && nb_oargs
!= 0) {
1509 for (i
= 0; i
< nb_oargs
; i
++) {
1511 if (!dead_temps
[arg
] || mem_temps
[arg
]) {
1516 tcg_op_remove(s
, op
);
1519 /* output args are dead */
1522 for (i
= 0; i
< nb_oargs
; i
++) {
1524 if (dead_temps
[arg
]) {
1525 dead_args
|= (1 << i
);
1527 if (mem_temps
[arg
]) {
1528 sync_args
|= (1 << i
);
1530 dead_temps
[arg
] = 1;
1534 /* if end of basic block, update */
1535 if (def
->flags
& TCG_OPF_BB_END
) {
1536 tcg_la_bb_end(s
, dead_temps
, mem_temps
);
1537 } else if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
1538 /* globals should be synced to memory */
1539 memset(mem_temps
, 1, s
->nb_globals
);
1542 /* record arguments that die in this opcode */
1543 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1545 if (dead_temps
[arg
]) {
1546 dead_args
|= (1 << i
);
1549 /* input arguments are live for preceeding opcodes */
1550 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
1552 dead_temps
[arg
] = 0;
1554 s
->op_dead_args
[oi
] = dead_args
;
1555 s
->op_sync_args
[oi
] = sync_args
;
1562 /* dummy liveness analysis */
1563 static void tcg_liveness_analysis(TCGContext
*s
)
1566 nb_ops
= s
->gen_opc_ptr
- s
->gen_opc_buf
;
1568 s
->op_dead_args
= tcg_malloc(nb_ops
* sizeof(uint16_t));
1569 memset(s
->op_dead_args
, 0, nb_ops
* sizeof(uint16_t));
1570 s
->op_sync_args
= tcg_malloc(nb_ops
* sizeof(uint8_t));
1571 memset(s
->op_sync_args
, 0, nb_ops
* sizeof(uint8_t));
1576 static void dump_regs(TCGContext
*s
)
1582 for(i
= 0; i
< s
->nb_temps
; i
++) {
1584 printf(" %10s: ", tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), i
));
1585 switch(ts
->val_type
) {
1587 printf("%s", tcg_target_reg_names
[ts
->reg
]);
1590 printf("%d(%s)", (int)ts
->mem_offset
, tcg_target_reg_names
[ts
->mem_reg
]);
1592 case TEMP_VAL_CONST
:
1593 printf("$0x%" TCG_PRIlx
, ts
->val
);
1605 for(i
= 0; i
< TCG_TARGET_NB_REGS
; i
++) {
1606 if (s
->reg_to_temp
[i
] >= 0) {
1608 tcg_target_reg_names
[i
],
1609 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), s
->reg_to_temp
[i
]));
1614 static void check_regs(TCGContext
*s
)
1620 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
1621 k
= s
->reg_to_temp
[reg
];
1624 if (ts
->val_type
!= TEMP_VAL_REG
||
1626 printf("Inconsistency for register %s:\n",
1627 tcg_target_reg_names
[reg
]);
1632 for(k
= 0; k
< s
->nb_temps
; k
++) {
1634 if (ts
->val_type
== TEMP_VAL_REG
&&
1636 s
->reg_to_temp
[ts
->reg
] != k
) {
1637 printf("Inconsistency for temp %s:\n",
1638 tcg_get_arg_str_idx(s
, buf
, sizeof(buf
), k
));
1640 printf("reg state:\n");
1648 static void temp_allocate_frame(TCGContext
*s
, int temp
)
1651 ts
= &s
->temps
[temp
];
1652 #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1653 /* Sparc64 stack is accessed with offset of 2047 */
1654 s
->current_frame_offset
= (s
->current_frame_offset
+
1655 (tcg_target_long
)sizeof(tcg_target_long
) - 1) &
1656 ~(sizeof(tcg_target_long
) - 1);
1658 if (s
->current_frame_offset
+ (tcg_target_long
)sizeof(tcg_target_long
) >
1662 ts
->mem_offset
= s
->current_frame_offset
;
1663 ts
->mem_reg
= s
->frame_reg
;
1664 ts
->mem_allocated
= 1;
1665 s
->current_frame_offset
+= sizeof(tcg_target_long
);
1668 /* sync register 'reg' by saving it to the corresponding temporary */
1669 static inline void tcg_reg_sync(TCGContext
*s
, int reg
)
1674 temp
= s
->reg_to_temp
[reg
];
1675 ts
= &s
->temps
[temp
];
1676 assert(ts
->val_type
== TEMP_VAL_REG
);
1677 if (!ts
->mem_coherent
&& !ts
->fixed_reg
) {
1678 if (!ts
->mem_allocated
) {
1679 temp_allocate_frame(s
, temp
);
1681 tcg_out_st(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1683 ts
->mem_coherent
= 1;
1686 /* free register 'reg' by spilling the corresponding temporary if necessary */
1687 static void tcg_reg_free(TCGContext
*s
, int reg
)
1691 temp
= s
->reg_to_temp
[reg
];
1693 tcg_reg_sync(s
, reg
);
1694 s
->temps
[temp
].val_type
= TEMP_VAL_MEM
;
1695 s
->reg_to_temp
[reg
] = -1;
1699 /* Allocate a register belonging to reg1 & ~reg2 */
1700 static int tcg_reg_alloc(TCGContext
*s
, TCGRegSet reg1
, TCGRegSet reg2
)
1705 tcg_regset_andnot(reg_ct
, reg1
, reg2
);
1707 /* first try free registers */
1708 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1709 reg
= tcg_target_reg_alloc_order
[i
];
1710 if (tcg_regset_test_reg(reg_ct
, reg
) && s
->reg_to_temp
[reg
] == -1)
1714 /* XXX: do better spill choice */
1715 for(i
= 0; i
< ARRAY_SIZE(tcg_target_reg_alloc_order
); i
++) {
1716 reg
= tcg_target_reg_alloc_order
[i
];
1717 if (tcg_regset_test_reg(reg_ct
, reg
)) {
1718 tcg_reg_free(s
, reg
);
1726 /* mark a temporary as dead. */
1727 static inline void temp_dead(TCGContext
*s
, int temp
)
1731 ts
= &s
->temps
[temp
];
1732 if (!ts
->fixed_reg
) {
1733 if (ts
->val_type
== TEMP_VAL_REG
) {
1734 s
->reg_to_temp
[ts
->reg
] = -1;
1736 if (temp
< s
->nb_globals
|| ts
->temp_local
) {
1737 ts
->val_type
= TEMP_VAL_MEM
;
1739 ts
->val_type
= TEMP_VAL_DEAD
;
1744 /* sync a temporary to memory. 'allocated_regs' is used in case a
1745 temporary registers needs to be allocated to store a constant. */
1746 static inline void temp_sync(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1750 ts
= &s
->temps
[temp
];
1751 if (!ts
->fixed_reg
) {
1752 switch(ts
->val_type
) {
1753 case TEMP_VAL_CONST
:
1754 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
1756 ts
->val_type
= TEMP_VAL_REG
;
1757 s
->reg_to_temp
[ts
->reg
] = temp
;
1758 ts
->mem_coherent
= 0;
1759 tcg_out_movi(s
, ts
->type
, ts
->reg
, ts
->val
);
1762 tcg_reg_sync(s
, ts
->reg
);
1773 /* save a temporary to memory. 'allocated_regs' is used in case a
1774 temporary registers needs to be allocated to store a constant. */
1775 static inline void temp_save(TCGContext
*s
, int temp
, TCGRegSet allocated_regs
)
1777 #ifdef USE_LIVENESS_ANALYSIS
1778 /* The liveness analysis already ensures that globals are back
1779 in memory. Keep an assert for safety. */
1780 assert(s
->temps
[temp
].val_type
== TEMP_VAL_MEM
|| s
->temps
[temp
].fixed_reg
);
1782 temp_sync(s
, temp
, allocated_regs
);
1787 /* save globals to their canonical location and assume they can be
1788 modified be the following code. 'allocated_regs' is used in case a
1789 temporary registers needs to be allocated to store a constant. */
1790 static void save_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1794 for(i
= 0; i
< s
->nb_globals
; i
++) {
1795 temp_save(s
, i
, allocated_regs
);
1799 /* sync globals to their canonical location and assume they can be
1800 read by the following code. 'allocated_regs' is used in case a
1801 temporary registers needs to be allocated to store a constant. */
1802 static void sync_globals(TCGContext
*s
, TCGRegSet allocated_regs
)
1806 for (i
= 0; i
< s
->nb_globals
; i
++) {
1807 #ifdef USE_LIVENESS_ANALYSIS
1808 assert(s
->temps
[i
].val_type
!= TEMP_VAL_REG
|| s
->temps
[i
].fixed_reg
||
1809 s
->temps
[i
].mem_coherent
);
1811 temp_sync(s
, i
, allocated_regs
);
1816 /* at the end of a basic block, we assume all temporaries are dead and
1817 all globals are stored at their canonical location. */
1818 static void tcg_reg_alloc_bb_end(TCGContext
*s
, TCGRegSet allocated_regs
)
1823 for(i
= s
->nb_globals
; i
< s
->nb_temps
; i
++) {
1825 if (ts
->temp_local
) {
1826 temp_save(s
, i
, allocated_regs
);
1828 #ifdef USE_LIVENESS_ANALYSIS
1829 /* The liveness analysis already ensures that temps are dead.
1830 Keep an assert for safety. */
1831 assert(ts
->val_type
== TEMP_VAL_DEAD
);
1838 save_globals(s
, allocated_regs
);
1841 #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
1842 #define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
1844 static void tcg_reg_alloc_movi(TCGContext
*s
, const TCGArg
*args
,
1845 uint16_t dead_args
, uint8_t sync_args
)
1848 tcg_target_ulong val
;
1850 ots
= &s
->temps
[args
[0]];
1853 if (ots
->fixed_reg
) {
1854 /* for fixed registers, we do not do any constant
1856 tcg_out_movi(s
, ots
->type
, ots
->reg
, val
);
1858 /* The movi is not explicitly generated here */
1859 if (ots
->val_type
== TEMP_VAL_REG
)
1860 s
->reg_to_temp
[ots
->reg
] = -1;
1861 ots
->val_type
= TEMP_VAL_CONST
;
1864 if (NEED_SYNC_ARG(0)) {
1865 temp_sync(s
, args
[0], s
->reserved_regs
);
1867 if (IS_DEAD_ARG(0)) {
1868 temp_dead(s
, args
[0]);
1872 static void tcg_reg_alloc_mov(TCGContext
*s
, const TCGOpDef
*def
,
1873 const TCGArg
*args
, uint16_t dead_args
,
1876 TCGRegSet allocated_regs
;
1878 TCGType otype
, itype
;
1880 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1881 ots
= &s
->temps
[args
[0]];
1882 ts
= &s
->temps
[args
[1]];
1884 /* Note that otype != itype for no-op truncation. */
1888 /* If the source value is not in a register, and we're going to be
1889 forced to have it in a register in order to perform the copy,
1890 then copy the SOURCE value into its own register first. That way
1891 we don't have to reload SOURCE the next time it is used. */
1892 if (((NEED_SYNC_ARG(0) || ots
->fixed_reg
) && ts
->val_type
!= TEMP_VAL_REG
)
1893 || ts
->val_type
== TEMP_VAL_MEM
) {
1894 ts
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[itype
],
1896 if (ts
->val_type
== TEMP_VAL_MEM
) {
1897 tcg_out_ld(s
, itype
, ts
->reg
, ts
->mem_reg
, ts
->mem_offset
);
1898 ts
->mem_coherent
= 1;
1899 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1900 tcg_out_movi(s
, itype
, ts
->reg
, ts
->val
);
1901 ts
->mem_coherent
= 0;
1903 s
->reg_to_temp
[ts
->reg
] = args
[1];
1904 ts
->val_type
= TEMP_VAL_REG
;
1907 if (IS_DEAD_ARG(0) && !ots
->fixed_reg
) {
1908 /* mov to a non-saved dead register makes no sense (even with
1909 liveness analysis disabled). */
1910 assert(NEED_SYNC_ARG(0));
1911 /* The code above should have moved the temp to a register. */
1912 assert(ts
->val_type
== TEMP_VAL_REG
);
1913 if (!ots
->mem_allocated
) {
1914 temp_allocate_frame(s
, args
[0]);
1916 tcg_out_st(s
, otype
, ts
->reg
, ots
->mem_reg
, ots
->mem_offset
);
1917 if (IS_DEAD_ARG(1)) {
1918 temp_dead(s
, args
[1]);
1920 temp_dead(s
, args
[0]);
1921 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1922 /* propagate constant */
1923 if (ots
->val_type
== TEMP_VAL_REG
) {
1924 s
->reg_to_temp
[ots
->reg
] = -1;
1926 ots
->val_type
= TEMP_VAL_CONST
;
1928 if (IS_DEAD_ARG(1)) {
1929 temp_dead(s
, args
[1]);
1932 /* The code in the first if block should have moved the
1933 temp to a register. */
1934 assert(ts
->val_type
== TEMP_VAL_REG
);
1935 if (IS_DEAD_ARG(1) && !ts
->fixed_reg
&& !ots
->fixed_reg
) {
1936 /* the mov can be suppressed */
1937 if (ots
->val_type
== TEMP_VAL_REG
) {
1938 s
->reg_to_temp
[ots
->reg
] = -1;
1941 temp_dead(s
, args
[1]);
1943 if (ots
->val_type
!= TEMP_VAL_REG
) {
1944 /* When allocating a new register, make sure to not spill the
1946 tcg_regset_set_reg(allocated_regs
, ts
->reg
);
1947 ots
->reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[otype
],
1950 tcg_out_mov(s
, otype
, ots
->reg
, ts
->reg
);
1952 ots
->val_type
= TEMP_VAL_REG
;
1953 ots
->mem_coherent
= 0;
1954 s
->reg_to_temp
[ots
->reg
] = args
[0];
1955 if (NEED_SYNC_ARG(0)) {
1956 tcg_reg_sync(s
, ots
->reg
);
1961 static void tcg_reg_alloc_op(TCGContext
*s
,
1962 const TCGOpDef
*def
, TCGOpcode opc
,
1963 const TCGArg
*args
, uint16_t dead_args
,
1966 TCGRegSet allocated_regs
;
1967 int i
, k
, nb_iargs
, nb_oargs
, reg
;
1969 const TCGArgConstraint
*arg_ct
;
1971 TCGArg new_args
[TCG_MAX_OP_ARGS
];
1972 int const_args
[TCG_MAX_OP_ARGS
];
1974 nb_oargs
= def
->nb_oargs
;
1975 nb_iargs
= def
->nb_iargs
;
1977 /* copy constants */
1978 memcpy(new_args
+ nb_oargs
+ nb_iargs
,
1979 args
+ nb_oargs
+ nb_iargs
,
1980 sizeof(TCGArg
) * def
->nb_cargs
);
1982 /* satisfy input constraints */
1983 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
1984 for(k
= 0; k
< nb_iargs
; k
++) {
1985 i
= def
->sorted_args
[nb_oargs
+ k
];
1987 arg_ct
= &def
->args_ct
[i
];
1988 ts
= &s
->temps
[arg
];
1989 if (ts
->val_type
== TEMP_VAL_MEM
) {
1990 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
1991 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
1992 ts
->val_type
= TEMP_VAL_REG
;
1994 ts
->mem_coherent
= 1;
1995 s
->reg_to_temp
[reg
] = arg
;
1996 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
1997 if (tcg_target_const_match(ts
->val
, ts
->type
, arg_ct
)) {
1998 /* constant is OK for instruction */
2000 new_args
[i
] = ts
->val
;
2003 /* need to move to a register */
2004 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2005 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2006 ts
->val_type
= TEMP_VAL_REG
;
2008 ts
->mem_coherent
= 0;
2009 s
->reg_to_temp
[reg
] = arg
;
2012 assert(ts
->val_type
== TEMP_VAL_REG
);
2013 if (arg_ct
->ct
& TCG_CT_IALIAS
) {
2014 if (ts
->fixed_reg
) {
2015 /* if fixed register, we must allocate a new register
2016 if the alias is not the same register */
2017 if (arg
!= args
[arg_ct
->alias_index
])
2018 goto allocate_in_reg
;
2020 /* if the input is aliased to an output and if it is
2021 not dead after the instruction, we must allocate
2022 a new register and move it */
2023 if (!IS_DEAD_ARG(i
)) {
2024 goto allocate_in_reg
;
2026 /* check if the current register has already been allocated
2027 for another input aliased to an output */
2029 for (k2
= 0 ; k2
< k
; k2
++) {
2030 i2
= def
->sorted_args
[nb_oargs
+ k2
];
2031 if ((def
->args_ct
[i2
].ct
& TCG_CT_IALIAS
) &&
2032 (new_args
[i2
] == ts
->reg
)) {
2033 goto allocate_in_reg
;
2039 if (tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2040 /* nothing to do : the constraint is satisfied */
2043 /* allocate a new register matching the constraint
2044 and move the temporary register into it */
2045 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2046 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2050 tcg_regset_set_reg(allocated_regs
, reg
);
2054 /* mark dead temporaries and free the associated registers */
2055 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
2056 if (IS_DEAD_ARG(i
)) {
2057 temp_dead(s
, args
[i
]);
2061 if (def
->flags
& TCG_OPF_BB_END
) {
2062 tcg_reg_alloc_bb_end(s
, allocated_regs
);
2064 if (def
->flags
& TCG_OPF_CALL_CLOBBER
) {
2065 /* XXX: permit generic clobber register list ? */
2066 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2067 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2068 tcg_reg_free(s
, reg
);
2072 if (def
->flags
& TCG_OPF_SIDE_EFFECTS
) {
2073 /* sync globals if the op has side effects and might trigger
2075 sync_globals(s
, allocated_regs
);
2078 /* satisfy the output constraints */
2079 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2080 for(k
= 0; k
< nb_oargs
; k
++) {
2081 i
= def
->sorted_args
[k
];
2083 arg_ct
= &def
->args_ct
[i
];
2084 ts
= &s
->temps
[arg
];
2085 if (arg_ct
->ct
& TCG_CT_ALIAS
) {
2086 reg
= new_args
[arg_ct
->alias_index
];
2088 /* if fixed register, we try to use it */
2090 if (ts
->fixed_reg
&&
2091 tcg_regset_test_reg(arg_ct
->u
.regs
, reg
)) {
2094 reg
= tcg_reg_alloc(s
, arg_ct
->u
.regs
, allocated_regs
);
2096 tcg_regset_set_reg(allocated_regs
, reg
);
2097 /* if a fixed register is used, then a move will be done afterwards */
2098 if (!ts
->fixed_reg
) {
2099 if (ts
->val_type
== TEMP_VAL_REG
) {
2100 s
->reg_to_temp
[ts
->reg
] = -1;
2102 ts
->val_type
= TEMP_VAL_REG
;
2104 /* temp value is modified, so the value kept in memory is
2105 potentially not the same */
2106 ts
->mem_coherent
= 0;
2107 s
->reg_to_temp
[reg
] = arg
;
2114 /* emit instruction */
2115 tcg_out_op(s
, opc
, new_args
, const_args
);
2117 /* move the outputs in the correct register if needed */
2118 for(i
= 0; i
< nb_oargs
; i
++) {
2119 ts
= &s
->temps
[args
[i
]];
2121 if (ts
->fixed_reg
&& ts
->reg
!= reg
) {
2122 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2124 if (NEED_SYNC_ARG(i
)) {
2125 tcg_reg_sync(s
, reg
);
2127 if (IS_DEAD_ARG(i
)) {
2128 temp_dead(s
, args
[i
]);
2133 #ifdef TCG_TARGET_STACK_GROWSUP
2134 #define STACK_DIR(x) (-(x))
2136 #define STACK_DIR(x) (x)
2139 static void tcg_reg_alloc_call(TCGContext
*s
, int nb_oargs
, int nb_iargs
,
2140 const TCGArg
* const args
, uint16_t dead_args
,
2143 int flags
, nb_regs
, i
, reg
;
2146 intptr_t stack_offset
;
2147 size_t call_stack_size
;
2148 tcg_insn_unit
*func_addr
;
2150 TCGRegSet allocated_regs
;
2152 func_addr
= (tcg_insn_unit
*)(intptr_t)args
[nb_oargs
+ nb_iargs
];
2153 flags
= args
[nb_oargs
+ nb_iargs
+ 1];
2155 nb_regs
= ARRAY_SIZE(tcg_target_call_iarg_regs
);
2156 if (nb_regs
> nb_iargs
) {
2160 /* assign stack slots first */
2161 call_stack_size
= (nb_iargs
- nb_regs
) * sizeof(tcg_target_long
);
2162 call_stack_size
= (call_stack_size
+ TCG_TARGET_STACK_ALIGN
- 1) &
2163 ~(TCG_TARGET_STACK_ALIGN
- 1);
2164 allocate_args
= (call_stack_size
> TCG_STATIC_CALL_ARGS_SIZE
);
2165 if (allocate_args
) {
2166 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2167 preallocate call stack */
2171 stack_offset
= TCG_TARGET_CALL_STACK_OFFSET
;
2172 for(i
= nb_regs
; i
< nb_iargs
; i
++) {
2173 arg
= args
[nb_oargs
+ i
];
2174 #ifdef TCG_TARGET_STACK_GROWSUP
2175 stack_offset
-= sizeof(tcg_target_long
);
2177 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2178 ts
= &s
->temps
[arg
];
2179 if (ts
->val_type
== TEMP_VAL_REG
) {
2180 tcg_out_st(s
, ts
->type
, ts
->reg
, TCG_REG_CALL_STACK
, stack_offset
);
2181 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2182 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2184 /* XXX: not correct if reading values from the stack */
2185 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2186 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2187 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2188 reg
= tcg_reg_alloc(s
, tcg_target_available_regs
[ts
->type
],
2190 /* XXX: sign extend may be needed on some targets */
2191 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2192 tcg_out_st(s
, ts
->type
, reg
, TCG_REG_CALL_STACK
, stack_offset
);
2197 #ifndef TCG_TARGET_STACK_GROWSUP
2198 stack_offset
+= sizeof(tcg_target_long
);
2202 /* assign input registers */
2203 tcg_regset_set(allocated_regs
, s
->reserved_regs
);
2204 for(i
= 0; i
< nb_regs
; i
++) {
2205 arg
= args
[nb_oargs
+ i
];
2206 if (arg
!= TCG_CALL_DUMMY_ARG
) {
2207 ts
= &s
->temps
[arg
];
2208 reg
= tcg_target_call_iarg_regs
[i
];
2209 tcg_reg_free(s
, reg
);
2210 if (ts
->val_type
== TEMP_VAL_REG
) {
2211 if (ts
->reg
!= reg
) {
2212 tcg_out_mov(s
, ts
->type
, reg
, ts
->reg
);
2214 } else if (ts
->val_type
== TEMP_VAL_MEM
) {
2215 tcg_out_ld(s
, ts
->type
, reg
, ts
->mem_reg
, ts
->mem_offset
);
2216 } else if (ts
->val_type
== TEMP_VAL_CONST
) {
2217 /* XXX: sign extend ? */
2218 tcg_out_movi(s
, ts
->type
, reg
, ts
->val
);
2222 tcg_regset_set_reg(allocated_regs
, reg
);
2226 /* mark dead temporaries and free the associated registers */
2227 for(i
= nb_oargs
; i
< nb_iargs
+ nb_oargs
; i
++) {
2228 if (IS_DEAD_ARG(i
)) {
2229 temp_dead(s
, args
[i
]);
2233 /* clobber call registers */
2234 for(reg
= 0; reg
< TCG_TARGET_NB_REGS
; reg
++) {
2235 if (tcg_regset_test_reg(tcg_target_call_clobber_regs
, reg
)) {
2236 tcg_reg_free(s
, reg
);
2240 /* Save globals if they might be written by the helper, sync them if
2241 they might be read. */
2242 if (flags
& TCG_CALL_NO_READ_GLOBALS
) {
2244 } else if (flags
& TCG_CALL_NO_WRITE_GLOBALS
) {
2245 sync_globals(s
, allocated_regs
);
2247 save_globals(s
, allocated_regs
);
2250 tcg_out_call(s
, func_addr
);
2252 /* assign output registers and emit moves if needed */
2253 for(i
= 0; i
< nb_oargs
; i
++) {
2255 ts
= &s
->temps
[arg
];
2256 reg
= tcg_target_call_oarg_regs
[i
];
2257 assert(s
->reg_to_temp
[reg
] == -1);
2259 if (ts
->fixed_reg
) {
2260 if (ts
->reg
!= reg
) {
2261 tcg_out_mov(s
, ts
->type
, ts
->reg
, reg
);
2264 if (ts
->val_type
== TEMP_VAL_REG
) {
2265 s
->reg_to_temp
[ts
->reg
] = -1;
2267 ts
->val_type
= TEMP_VAL_REG
;
2269 ts
->mem_coherent
= 0;
2270 s
->reg_to_temp
[reg
] = arg
;
2271 if (NEED_SYNC_ARG(i
)) {
2272 tcg_reg_sync(s
, reg
);
2274 if (IS_DEAD_ARG(i
)) {
2275 temp_dead(s
, args
[i
]);
2281 #ifdef CONFIG_PROFILER
2283 static int64_t tcg_table_op_count
[NB_OPS
];
2285 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2289 for (i
= 0; i
< NB_OPS
; i
++) {
2290 cpu_fprintf(f
, "%s %" PRId64
"\n", tcg_op_defs
[i
].name
,
2291 tcg_table_op_count
[i
]);
2295 void tcg_dump_op_count(FILE *f
, fprintf_function cpu_fprintf
)
2297 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2302 static inline int tcg_gen_code_common(TCGContext
*s
,
2303 tcg_insn_unit
*gen_code_buf
,
2309 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP
))) {
2316 #ifdef CONFIG_PROFILER
2317 s
->opt_time
-= profile_getclock();
2320 #ifdef USE_TCG_OPTIMIZATIONS
2324 #ifdef CONFIG_PROFILER
2325 s
->opt_time
+= profile_getclock();
2326 s
->la_time
-= profile_getclock();
2329 tcg_liveness_analysis(s
);
2331 #ifdef CONFIG_PROFILER
2332 s
->la_time
+= profile_getclock();
2336 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT
))) {
2337 qemu_log("OP after optimization and liveness analysis:\n");
2343 tcg_reg_alloc_start(s
);
2345 s
->code_buf
= gen_code_buf
;
2346 s
->code_ptr
= gen_code_buf
;
2350 for (oi
= s
->gen_first_op_idx
; oi
>= 0; oi
= oi_next
) {
2351 TCGOp
* const op
= &s
->gen_op_buf
[oi
];
2352 TCGArg
* const args
= &s
->gen_opparam_buf
[op
->args
];
2353 TCGOpcode opc
= op
->opc
;
2354 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
2355 uint16_t dead_args
= s
->op_dead_args
[oi
];
2356 uint8_t sync_args
= s
->op_sync_args
[oi
];
2359 #ifdef CONFIG_PROFILER
2360 tcg_table_op_count
[opc
]++;
2364 case INDEX_op_mov_i32
:
2365 case INDEX_op_mov_i64
:
2366 tcg_reg_alloc_mov(s
, def
, args
, dead_args
, sync_args
);
2368 case INDEX_op_movi_i32
:
2369 case INDEX_op_movi_i64
:
2370 tcg_reg_alloc_movi(s
, args
, dead_args
, sync_args
);
2372 case INDEX_op_debug_insn_start
:
2374 case INDEX_op_discard
:
2375 temp_dead(s
, args
[0]);
2377 case INDEX_op_set_label
:
2378 tcg_reg_alloc_bb_end(s
, s
->reserved_regs
);
2379 tcg_out_label(s
, arg_label(args
[0]), s
->code_ptr
);
2382 tcg_reg_alloc_call(s
, op
->callo
, op
->calli
, args
,
2383 dead_args
, sync_args
);
2386 /* Sanity check that we've not introduced any unhandled opcodes. */
2387 if (def
->flags
& TCG_OPF_NOT_PRESENT
) {
2390 /* Note: in order to speed up the code, it would be much
2391 faster to have specialized register allocator functions for
2392 some common argument patterns */
2393 tcg_reg_alloc_op(s
, def
, opc
, args
, dead_args
, sync_args
);
2396 if (search_pc
>= 0 && search_pc
< tcg_current_code_size(s
)) {
2404 /* Generate TB finalization at the end of block */
2405 tcg_out_tb_finalize(s
);
2409 int tcg_gen_code(TCGContext
*s
, tcg_insn_unit
*gen_code_buf
)
2411 #ifdef CONFIG_PROFILER
2415 n
= s
->gen_last_op_idx
+ 1;
2417 if (n
> s
->op_count_max
) {
2418 s
->op_count_max
= n
;
2423 if (n
> s
->temp_count_max
) {
2424 s
->temp_count_max
= n
;
2429 tcg_gen_code_common(s
, gen_code_buf
, -1);
2431 /* flush instruction cache */
2432 flush_icache_range((uintptr_t)s
->code_buf
, (uintptr_t)s
->code_ptr
);
2434 return tcg_current_code_size(s
);
2437 /* Return the index of the micro operation such as the pc after is <
2438 offset bytes from the start of the TB. The contents of gen_code_buf must
2439 not be changed, though writing the same values is ok.
2440 Return -1 if not found. */
2441 int tcg_gen_code_search_pc(TCGContext
*s
, tcg_insn_unit
*gen_code_buf
,
2444 return tcg_gen_code_common(s
, gen_code_buf
, offset
);
2447 #ifdef CONFIG_PROFILER
2448 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2450 TCGContext
*s
= &tcg_ctx
;
2453 tot
= s
->interm_time
+ s
->code_time
;
2454 cpu_fprintf(f
, "JIT cycles %" PRId64
" (%0.3f s at 2.4 GHz)\n",
2456 cpu_fprintf(f
, "translated TBs %" PRId64
" (aborted=%" PRId64
" %0.1f%%)\n",
2458 s
->tb_count1
- s
->tb_count
,
2459 s
->tb_count1
? (double)(s
->tb_count1
- s
->tb_count
) / s
->tb_count1
* 100.0 : 0);
2460 cpu_fprintf(f
, "avg ops/TB %0.1f max=%d\n",
2461 s
->tb_count
? (double)s
->op_count
/ s
->tb_count
: 0, s
->op_count_max
);
2462 cpu_fprintf(f
, "deleted ops/TB %0.2f\n",
2464 (double)s
->del_op_count
/ s
->tb_count
: 0);
2465 cpu_fprintf(f
, "avg temps/TB %0.2f max=%d\n",
2467 (double)s
->temp_count
/ s
->tb_count
: 0,
2470 cpu_fprintf(f
, "cycles/op %0.1f\n",
2471 s
->op_count
? (double)tot
/ s
->op_count
: 0);
2472 cpu_fprintf(f
, "cycles/in byte %0.1f\n",
2473 s
->code_in_len
? (double)tot
/ s
->code_in_len
: 0);
2474 cpu_fprintf(f
, "cycles/out byte %0.1f\n",
2475 s
->code_out_len
? (double)tot
/ s
->code_out_len
: 0);
2478 cpu_fprintf(f
, " gen_interm time %0.1f%%\n",
2479 (double)s
->interm_time
/ tot
* 100.0);
2480 cpu_fprintf(f
, " gen_code time %0.1f%%\n",
2481 (double)s
->code_time
/ tot
* 100.0);
2482 cpu_fprintf(f
, "optim./code time %0.1f%%\n",
2483 (double)s
->opt_time
/ (s
->code_time
? s
->code_time
: 1)
2485 cpu_fprintf(f
, "liveness/code time %0.1f%%\n",
2486 (double)s
->la_time
/ (s
->code_time
? s
->code_time
: 1) * 100.0);
2487 cpu_fprintf(f
, "cpu_restore count %" PRId64
"\n",
2489 cpu_fprintf(f
, " avg cycles %0.1f\n",
2490 s
->restore_count
? (double)s
->restore_time
/ s
->restore_count
: 0);
2493 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
)
2495 cpu_fprintf(f
, "[TCG profiler not compiled]\n");
2499 #ifdef ELF_HOST_MACHINE
2500 /* In order to use this feature, the backend needs to do three things:
2502 (1) Define ELF_HOST_MACHINE to indicate both what value to
2503 put into the ELF image and to indicate support for the feature.
2505 (2) Define tcg_register_jit. This should create a buffer containing
2506 the contents of a .debug_frame section that describes the post-
2507 prologue unwind info for the tcg machine.
2509 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2512 /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2519 struct jit_code_entry
{
2520 struct jit_code_entry
*next_entry
;
2521 struct jit_code_entry
*prev_entry
;
2522 const void *symfile_addr
;
2523 uint64_t symfile_size
;
2526 struct jit_descriptor
{
2528 uint32_t action_flag
;
2529 struct jit_code_entry
*relevant_entry
;
2530 struct jit_code_entry
*first_entry
;
2533 void __jit_debug_register_code(void) __attribute__((noinline
));
2534 void __jit_debug_register_code(void)
2539 /* Must statically initialize the version, because GDB may check
2540 the version before we can set it. */
2541 struct jit_descriptor __jit_debug_descriptor
= { 1, 0, 0, 0 };
2543 /* End GDB interface. */
2545 static int find_string(const char *strtab
, const char *str
)
2547 const char *p
= strtab
+ 1;
2550 if (strcmp(p
, str
) == 0) {
2557 static void tcg_register_jit_int(void *buf_ptr
, size_t buf_size
,
2558 const void *debug_frame
,
2559 size_t debug_frame_size
)
2561 struct __attribute__((packed
)) DebugInfo
{
2568 uintptr_t cu_low_pc
;
2569 uintptr_t cu_high_pc
;
2572 uintptr_t fn_low_pc
;
2573 uintptr_t fn_high_pc
;
2582 struct DebugInfo di
;
2587 struct ElfImage
*img
;
2589 static const struct ElfImage img_template
= {
2591 .e_ident
[EI_MAG0
] = ELFMAG0
,
2592 .e_ident
[EI_MAG1
] = ELFMAG1
,
2593 .e_ident
[EI_MAG2
] = ELFMAG2
,
2594 .e_ident
[EI_MAG3
] = ELFMAG3
,
2595 .e_ident
[EI_CLASS
] = ELF_CLASS
,
2596 .e_ident
[EI_DATA
] = ELF_DATA
,
2597 .e_ident
[EI_VERSION
] = EV_CURRENT
,
2599 .e_machine
= ELF_HOST_MACHINE
,
2600 .e_version
= EV_CURRENT
,
2601 .e_phoff
= offsetof(struct ElfImage
, phdr
),
2602 .e_shoff
= offsetof(struct ElfImage
, shdr
),
2603 .e_ehsize
= sizeof(ElfW(Shdr
)),
2604 .e_phentsize
= sizeof(ElfW(Phdr
)),
2606 .e_shentsize
= sizeof(ElfW(Shdr
)),
2607 .e_shnum
= ARRAY_SIZE(img
->shdr
),
2608 .e_shstrndx
= ARRAY_SIZE(img
->shdr
) - 1,
2609 #ifdef ELF_HOST_FLAGS
2610 .e_flags
= ELF_HOST_FLAGS
,
2613 .e_ident
[EI_OSABI
] = ELF_OSABI
,
2621 [0] = { .sh_type
= SHT_NULL
},
2622 /* Trick: The contents of code_gen_buffer are not present in
2623 this fake ELF file; that got allocated elsewhere. Therefore
2624 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2625 will not look for contents. We can record any address. */
2627 .sh_type
= SHT_NOBITS
,
2628 .sh_flags
= SHF_EXECINSTR
| SHF_ALLOC
,
2630 [2] = { /* .debug_info */
2631 .sh_type
= SHT_PROGBITS
,
2632 .sh_offset
= offsetof(struct ElfImage
, di
),
2633 .sh_size
= sizeof(struct DebugInfo
),
2635 [3] = { /* .debug_abbrev */
2636 .sh_type
= SHT_PROGBITS
,
2637 .sh_offset
= offsetof(struct ElfImage
, da
),
2638 .sh_size
= sizeof(img
->da
),
2640 [4] = { /* .debug_frame */
2641 .sh_type
= SHT_PROGBITS
,
2642 .sh_offset
= sizeof(struct ElfImage
),
2644 [5] = { /* .symtab */
2645 .sh_type
= SHT_SYMTAB
,
2646 .sh_offset
= offsetof(struct ElfImage
, sym
),
2647 .sh_size
= sizeof(img
->sym
),
2649 .sh_link
= ARRAY_SIZE(img
->shdr
) - 1,
2650 .sh_entsize
= sizeof(ElfW(Sym
)),
2652 [6] = { /* .strtab */
2653 .sh_type
= SHT_STRTAB
,
2654 .sh_offset
= offsetof(struct ElfImage
, str
),
2655 .sh_size
= sizeof(img
->str
),
2659 [1] = { /* code_gen_buffer */
2660 .st_info
= ELF_ST_INFO(STB_GLOBAL
, STT_FUNC
),
2665 .len
= sizeof(struct DebugInfo
) - 4,
2667 .ptr_size
= sizeof(void *),
2669 .cu_lang
= 0x8001, /* DW_LANG_Mips_Assembler */
2671 .fn_name
= "code_gen_buffer"
2674 1, /* abbrev number (the cu) */
2675 0x11, 1, /* DW_TAG_compile_unit, has children */
2676 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2677 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2678 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2679 0, 0, /* end of abbrev */
2680 2, /* abbrev number (the fn) */
2681 0x2e, 0, /* DW_TAG_subprogram, no children */
2682 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2683 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2684 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2685 0, 0, /* end of abbrev */
2686 0 /* no more abbrev */
2688 .str
= "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2689 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
2692 /* We only need a single jit entry; statically allocate it. */
2693 static struct jit_code_entry one_entry
;
2695 uintptr_t buf
= (uintptr_t)buf_ptr
;
2696 size_t img_size
= sizeof(struct ElfImage
) + debug_frame_size
;
2697 DebugFrameHeader
*dfh
;
2699 img
= g_malloc(img_size
);
2700 *img
= img_template
;
2702 img
->phdr
.p_vaddr
= buf
;
2703 img
->phdr
.p_paddr
= buf
;
2704 img
->phdr
.p_memsz
= buf_size
;
2706 img
->shdr
[1].sh_name
= find_string(img
->str
, ".text");
2707 img
->shdr
[1].sh_addr
= buf
;
2708 img
->shdr
[1].sh_size
= buf_size
;
2710 img
->shdr
[2].sh_name
= find_string(img
->str
, ".debug_info");
2711 img
->shdr
[3].sh_name
= find_string(img
->str
, ".debug_abbrev");
2713 img
->shdr
[4].sh_name
= find_string(img
->str
, ".debug_frame");
2714 img
->shdr
[4].sh_size
= debug_frame_size
;
2716 img
->shdr
[5].sh_name
= find_string(img
->str
, ".symtab");
2717 img
->shdr
[6].sh_name
= find_string(img
->str
, ".strtab");
2719 img
->sym
[1].st_name
= find_string(img
->str
, "code_gen_buffer");
2720 img
->sym
[1].st_value
= buf
;
2721 img
->sym
[1].st_size
= buf_size
;
2723 img
->di
.cu_low_pc
= buf
;
2724 img
->di
.cu_high_pc
= buf
+ buf_size
;
2725 img
->di
.fn_low_pc
= buf
;
2726 img
->di
.fn_high_pc
= buf
+ buf_size
;
2728 dfh
= (DebugFrameHeader
*)(img
+ 1);
2729 memcpy(dfh
, debug_frame
, debug_frame_size
);
2730 dfh
->fde
.func_start
= buf
;
2731 dfh
->fde
.func_len
= buf_size
;
2734 /* Enable this block to be able to debug the ELF image file creation.
2735 One can use readelf, objdump, or other inspection utilities. */
2737 FILE *f
= fopen("/tmp/qemu.jit", "w+b");
2739 if (fwrite(img
, img_size
, 1, f
) != img_size
) {
2740 /* Avoid stupid unused return value warning for fwrite. */
2747 one_entry
.symfile_addr
= img
;
2748 one_entry
.symfile_size
= img_size
;
2750 __jit_debug_descriptor
.action_flag
= JIT_REGISTER_FN
;
2751 __jit_debug_descriptor
.relevant_entry
= &one_entry
;
2752 __jit_debug_descriptor
.first_entry
= &one_entry
;
2753 __jit_debug_register_code();
2756 /* No support for the feature. Provide the entry point expected by exec.c,
2757 and implement the internal function we declared earlier. */
2759 static void tcg_register_jit_int(void *buf
, size_t size
,
2760 const void *debug_frame
,
2761 size_t debug_frame_size
)
2765 void tcg_register_jit(void *buf
, size_t buf_size
)
2768 #endif /* ELF_HOST_MACHINE */