hw/arm/sbsa-ref: Do not open-code ahci_ide_create_devs()
[qemu/ar7.git] / accel / tcg / tb-hash.h
bloba0c61f25cda551b6cff6297cb1d91daefdbc21ff
1 /*
2 * internal execution defines for qemu
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #ifndef EXEC_TB_HASH_H
21 #define EXEC_TB_HASH_H
23 #include "exec/cpu-defs.h"
24 #include "exec/exec-all.h"
25 #include "qemu/xxhash.h"
26 #include "tb-jmp-cache.h"
28 #ifdef CONFIG_SOFTMMU
30 /* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for
31 addresses on the same page. The top bits are the same. This allows
32 TLB invalidation to quickly clear a subset of the hash table. */
33 #define TB_JMP_PAGE_BITS (TB_JMP_CACHE_BITS / 2)
34 #define TB_JMP_PAGE_SIZE (1 << TB_JMP_PAGE_BITS)
35 #define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1)
36 #define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE)
38 static inline unsigned int tb_jmp_cache_hash_page(vaddr pc)
40 vaddr tmp;
41 tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS));
42 return (tmp >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)) & TB_JMP_PAGE_MASK;
45 static inline unsigned int tb_jmp_cache_hash_func(vaddr pc)
47 vaddr tmp;
48 tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS));
49 return (((tmp >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS)) & TB_JMP_PAGE_MASK)
50 | (tmp & TB_JMP_ADDR_MASK));
53 #else
55 /* In user-mode we can get better hashing because we do not have a TLB */
56 static inline unsigned int tb_jmp_cache_hash_func(vaddr pc)
58 return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1);
61 #endif /* CONFIG_SOFTMMU */
63 static inline
64 uint32_t tb_hash_func(tb_page_addr_t phys_pc, vaddr pc,
65 uint32_t flags, uint64_t flags2, uint32_t cf_mask)
67 return qemu_xxhash8(phys_pc, pc, flags2, flags, cf_mask);
70 #endif