include/hw/southbridge/piix.h

   1 /*
   2  * QEMU PIIX South Bridge Emulation
   3  *
   4  * Copyright (c) 2006 Fabrice Bellard
   5  * Copyright (c) 2018 Hervé Poussineau
   6  *
   7  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   8  * See the COPYING file in the top-level directory.
   9  *
  10  */
  11
  12 #ifndef HW_SOUTHBRIDGE_PIIX_H
  13 #define HW_SOUTHBRIDGE_PIIX_H
  14
  15 #include "hw/pci/pci_device.h"
  16 #include "hw/ide/pci.h"
  17 #include "hw/rtc/mc146818rtc.h"
  18 #include "hw/usb/hcd-uhci.h"
  19
  20 /* PIRQRC[A:D]: PIRQx Route Control Registers */
  21 #define PIIX_PIRQCA 0x60
  22 #define PIIX_PIRQCB 0x61
  23 #define PIIX_PIRQCC 0x62
  24 #define PIIX_PIRQCD 0x63
  25
  26 /*
  27  * Reset Control Register: PCI-accessible ISA-Compatible Register at address
  28  * 0xcf9, provided by the PCI/ISA bridge (PIIX3 PCI function 0, 8086:7000).
  29  */
  30 #define PIIX_RCR_IOPORT 0xcf9
  31
  32 #define PIIX_NUM_PIRQS          4ULL    /* PIRQ[A-D] */
  33
  34 struct PIIXState {
  35     PCIDevice dev;
  36
  37     /*
  38      * bitmap to track pic levels.
  39      * The pic level is the logical OR of all the PCI irqs mapped to it
  40      * So one PIC level is tracked by PIIX_NUM_PIRQS bits.
  41      *
  42      * PIRQ is mapped to PIC pins, we track it by
  43      * PIIX_NUM_PIRQS * ISA_NUM_IRQS = 64 bits with
  44      * pic_irq * PIIX_NUM_PIRQS + pirq
  45      */
  46 #if ISA_NUM_IRQS * PIIX_NUM_PIRQS > 64
  47 #error "unable to encode pic state in 64bit in pic_levels."
  48 #endif
  49     uint64_t pic_levels;
  50
  51     qemu_irq isa_irqs_in[ISA_NUM_IRQS];
  52
  53     /* This member isn't used. Just for save/load compatibility */
  54     int32_t pci_irq_levels_vmstate[PIIX_NUM_PIRQS];
  55
  56     MC146818RtcState rtc;
  57     PCIIDEState ide;
  58     UHCIState uhci;
  59
  60     /* Reset Control Register contents */
  61     uint8_t rcr;
  62
  63     /* IO memory region for Reset Control Register (PIIX_RCR_IOPORT) */
  64     MemoryRegion rcr_mem;
  65
  66     bool has_usb;
  67 };
  68 typedef struct PIIXState PIIX3State;
  69
  70 #define TYPE_PIIX3_PCI_DEVICE "pci-piix3"
  71 DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE,
  72                          TYPE_PIIX3_PCI_DEVICE)
  73
  74 #define TYPE_PIIX3_DEVICE "PIIX3"
  75 #define TYPE_PIIX4_PCI_DEVICE "piix4-isa"
  76
  77 #endif