hw/i2c/versatile_i2c.c

   1 /*
   2  * ARM Versatile I2C controller
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
   6  *
   7  * This file is derived from hw/realview.c by Paul Brook
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version 2
  12  * of the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  21  *
  22  */
  23
  24 #include "qemu/osdep.h"
  25 #include "hw/sysbus.h"
  26 #include "bitbang_i2c.h"
  27 #include "qemu/log.h"
  28
  29 #define TYPE_VERSATILE_I2C "versatile_i2c"
  30 #define VERSATILE_I2C(obj) \
  31     OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
  32
  33 typedef struct VersatileI2CState {
  34     SysBusDevice parent_obj;
  35
  36     MemoryRegion iomem;
  37     bitbang_i2c_interface *bitbang;
  38     int out;
  39     int in;
  40 } VersatileI2CState;
  41
  42 static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
  43                                    unsigned size)
  44 {
  45     VersatileI2CState *s = (VersatileI2CState *)opaque;
  46
  47     if (offset == 0) {
  48         return (s->out & 1) | (s->in << 1);
  49     } else {
  50         qemu_log_mask(LOG_GUEST_ERROR,
  51                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
  52         return -1;
  53     }
  54 }
  55
  56 static void versatile_i2c_write(void *opaque, hwaddr offset,
  57                                 uint64_t value, unsigned size)
  58 {
  59     VersatileI2CState *s = (VersatileI2CState *)opaque;
  60
  61     switch (offset) {
  62     case 0:
  63         s->out |= value & 3;
  64         break;
  65     case 4:
  66         s->out &= ~value;
  67         break;
  68     default:
  69         qemu_log_mask(LOG_GUEST_ERROR,
  70                       "%s: Bad offset 0x%x\n", __func__, (int)offset);
  71     }
  72     bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
  73     s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
  74 }
  75
  76 static const MemoryRegionOps versatile_i2c_ops = {
  77     .read = versatile_i2c_read,
  78     .write = versatile_i2c_write,
  79     .endianness = DEVICE_NATIVE_ENDIAN,
  80 };
  81
  82 static int versatile_i2c_init(SysBusDevice *sbd)
  83 {
  84     DeviceState *dev = DEVICE(sbd);
  85     VersatileI2CState *s = VERSATILE_I2C(dev);
  86     I2CBus *bus;
  87
  88     bus = i2c_init_bus(dev, "i2c");
  89     s->bitbang = bitbang_i2c_init(bus);
  90     memory_region_init_io(&s->iomem, OBJECT(s), &versatile_i2c_ops, s,
  91                           "versatile_i2c", 0x1000);
  92     sysbus_init_mmio(sbd, &s->iomem);
  93     return 0;
  94 }
  95
  96 static void versatile_i2c_class_init(ObjectClass *klass, void *data)
  97 {
  98     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
  99
 100     k->init = versatile_i2c_init;
 101 }
 102
 103 static const TypeInfo versatile_i2c_info = {
 104     .name          = TYPE_VERSATILE_I2C,
 105     .parent        = TYPE_SYS_BUS_DEVICE,
 106     .instance_size = sizeof(VersatileI2CState),
 107     .class_init    = versatile_i2c_class_init,
 108 };
 109
 110 static void versatile_i2c_register_types(void)
 111 {
 112     type_register_static(&versatile_i2c_info);
 113 }
 114
 115 type_init(versatile_i2c_register_types)