2 * ARM Versatile I2C controller
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
7 * This file is derived from hw/realview.c by Paul Brook
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 #include "qemu/osdep.h"
25 #include "hw/sysbus.h"
26 #include "bitbang_i2c.h"
29 #define TYPE_VERSATILE_I2C "versatile_i2c"
30 #define VERSATILE_I2C(obj) \
31 OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
33 typedef struct VersatileI2CState
{
34 SysBusDevice parent_obj
;
37 bitbang_i2c_interface
*bitbang
;
42 static uint64_t versatile_i2c_read(void *opaque
, hwaddr offset
,
45 VersatileI2CState
*s
= (VersatileI2CState
*)opaque
;
48 return (s
->out
& 1) | (s
->in
<< 1);
50 qemu_log_mask(LOG_GUEST_ERROR
,
51 "%s: Bad offset 0x%x\n", __func__
, (int)offset
);
56 static void versatile_i2c_write(void *opaque
, hwaddr offset
,
57 uint64_t value
, unsigned size
)
59 VersatileI2CState
*s
= (VersatileI2CState
*)opaque
;
69 qemu_log_mask(LOG_GUEST_ERROR
,
70 "%s: Bad offset 0x%x\n", __func__
, (int)offset
);
72 bitbang_i2c_set(s
->bitbang
, BITBANG_I2C_SCL
, (s
->out
& 1) != 0);
73 s
->in
= bitbang_i2c_set(s
->bitbang
, BITBANG_I2C_SDA
, (s
->out
& 2) != 0);
76 static const MemoryRegionOps versatile_i2c_ops
= {
77 .read
= versatile_i2c_read
,
78 .write
= versatile_i2c_write
,
79 .endianness
= DEVICE_NATIVE_ENDIAN
,
82 static int versatile_i2c_init(SysBusDevice
*sbd
)
84 DeviceState
*dev
= DEVICE(sbd
);
85 VersatileI2CState
*s
= VERSATILE_I2C(dev
);
88 bus
= i2c_init_bus(dev
, "i2c");
89 s
->bitbang
= bitbang_i2c_init(bus
);
90 memory_region_init_io(&s
->iomem
, OBJECT(s
), &versatile_i2c_ops
, s
,
91 "versatile_i2c", 0x1000);
92 sysbus_init_mmio(sbd
, &s
->iomem
);
96 static void versatile_i2c_class_init(ObjectClass
*klass
, void *data
)
98 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
100 k
->init
= versatile_i2c_init
;
103 static const TypeInfo versatile_i2c_info
= {
104 .name
= TYPE_VERSATILE_I2C
,
105 .parent
= TYPE_SYS_BUS_DEVICE
,
106 .instance_size
= sizeof(VersatileI2CState
),
107 .class_init
= versatile_i2c_class_init
,
110 static void versatile_i2c_register_types(void)
112 type_register_static(&versatile_i2c_info
);
115 type_init(versatile_i2c_register_types
)