hw/i386/pc: Confine system flash handling to pc_sysfw
[qemu/ar7.git] / include / hw / i386 / pc.h
blobe8f4af5d5c17535997c11807cd67f5963c329d41
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu/notify.h"
5 #include "qapi/qapi-types-common.h"
6 #include "qemu/uuid.h"
7 #include "hw/boards.h"
8 #include "hw/block/fdc.h"
9 #include "hw/block/flash.h"
10 #include "hw/i386/x86.h"
12 #include "hw/hotplug.h"
13 #include "qom/object.h"
14 #include "hw/i386/sgx-epc.h"
15 #include "hw/cxl/cxl.h"
17 #define HPET_INTCAP "hpet-intcap"
19 #define MAX_IDE_BUS 2
21 /**
22 * PCMachineState:
23 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
24 * @boot_cpus: number of present VCPUs
26 typedef struct PCMachineState {
27 /*< private >*/
28 X86MachineState parent_obj;
30 /* <public> */
32 /* State for other subsystems/APIs: */
33 Notifier machine_done;
35 /* Pointers to devices and objects: */
36 PCIBus *bus;
37 I2CBus *smbus;
38 PFlashCFI01 *flash[2];
39 ISADevice *pcspk;
40 DeviceState *iommu;
41 BusState *idebus[MAX_IDE_BUS];
43 /* Configuration options: */
44 uint64_t max_ram_below_4g;
45 OnOffAuto vmport;
46 SmbiosEntryPointType smbios_entry_point_type;
47 const char *south_bridge;
49 bool acpi_build_enabled;
50 bool smbus_enabled;
51 bool sata_enabled;
52 bool hpet_enabled;
53 bool i8042_enabled;
54 bool default_bus_bypass_iommu;
55 uint64_t max_fw_size;
57 /* ACPI Memory hotplug IO base address */
58 hwaddr memhp_io_base;
60 SGXEPCState sgx_epc;
61 CXLState cxl_devices_state;
62 } PCMachineState;
64 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
65 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
66 #define PC_MACHINE_VMPORT "vmport"
67 #define PC_MACHINE_SMBUS "smbus"
68 #define PC_MACHINE_SATA "sata"
69 #define PC_MACHINE_I8042 "i8042"
70 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
71 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"
73 /**
74 * PCMachineClass:
76 * Compat fields:
78 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
79 * backend's alignment value if provided
80 * @acpi_data_size: Size of the chunk of memory at the top of RAM
81 * for the BIOS ACPI tables and other BIOS
82 * datastructures.
83 * @gigabyte_align: Make sure that guest addresses aligned at
84 * 1Gbyte boundaries get mapped to host
85 * addresses aligned at 1Gbyte boundaries. This
86 * way we can use 1GByte pages in the host.
89 struct PCMachineClass {
90 /*< private >*/
91 X86MachineClass parent_class;
93 /*< public >*/
95 /* Device configuration: */
96 bool pci_enabled;
97 bool kvmclock_enabled;
98 const char *default_south_bridge;
100 /* Compat options: */
102 /* Default CPU model version. See x86_cpu_set_default_version(). */
103 int default_cpu_version;
105 /* ACPI compat: */
106 bool has_acpi_build;
107 bool rsdp_in_ram;
108 int legacy_acpi_table_size;
109 unsigned acpi_data_size;
110 int pci_root_uid;
112 /* SMBIOS compat: */
113 bool smbios_defaults;
114 bool smbios_legacy_mode;
115 bool smbios_uuid_encoded;
116 SmbiosEntryPointType default_smbios_ep_type;
118 /* RAM / address space compat: */
119 bool gigabyte_align;
120 bool has_reserved_memory;
121 bool enforce_aligned_dimm;
122 bool broken_reserved_end;
123 bool enforce_amd_1tb_hole;
125 /* generate legacy CPU hotplug AML */
126 bool legacy_cpu_hotplug;
128 /* use PVH to load kernels that support this feature */
129 bool pvh_enabled;
131 /* create kvmclock device even when KVM PV features are not exposed */
132 bool kvmclock_create_always;
134 /* resizable acpi blob compat */
135 bool resizable_acpi_blob;
138 * whether the machine type implements broken 32-bit address space bound
139 * check for memory.
141 bool broken_32bit_mem_addr_check;
144 #define TYPE_PC_MACHINE "generic-pc-machine"
145 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
147 /* ioapic.c */
149 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
151 /* pc.c */
152 extern int fd_bootchk;
154 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
156 #define PCI_HOST_PROP_RAM_MEM "ram-mem"
157 #define PCI_HOST_PROP_PCI_MEM "pci-mem"
158 #define PCI_HOST_PROP_SYSTEM_MEM "system-mem"
159 #define PCI_HOST_PROP_IO_MEM "io-mem"
160 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
161 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
162 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
163 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
164 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
165 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
166 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
169 void pc_pci_as_mapping_init(MemoryRegion *system_memory,
170 MemoryRegion *pci_address_space);
172 void xen_load_linux(PCMachineState *pcms);
173 void pc_memory_init(PCMachineState *pcms,
174 MemoryRegion *system_memory,
175 MemoryRegion *rom_memory,
176 uint64_t pci_hole64_size);
177 uint64_t pc_pci_hole64_start(void);
178 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
179 void pc_basic_device_init(struct PCMachineState *pcms,
180 ISABus *isa_bus, qemu_irq *gsi,
181 ISADevice *rtc_state,
182 bool create_fdctrl,
183 uint32_t hpet_irqs);
184 void pc_cmos_init(PCMachineState *pcms,
185 ISADevice *s);
186 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
188 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
190 /* port92.c */
191 #define PORT92_A20_LINE "a20"
193 #define TYPE_PORT92 "port92"
195 /* pc_sysfw.c */
196 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
197 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
198 int *data_len);
199 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
201 /* hw/i386/acpi-common.c */
202 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
203 GArray *entry, bool force_enabled);
205 /* sgx.c */
206 void pc_machine_init_sgx_epc(PCMachineState *pcms);
208 extern GlobalProperty pc_compat_8_2[];
209 extern const size_t pc_compat_8_2_len;
211 extern GlobalProperty pc_compat_8_1[];
212 extern const size_t pc_compat_8_1_len;
214 extern GlobalProperty pc_compat_8_0[];
215 extern const size_t pc_compat_8_0_len;
217 extern GlobalProperty pc_compat_7_2[];
218 extern const size_t pc_compat_7_2_len;
220 extern GlobalProperty pc_compat_7_1[];
221 extern const size_t pc_compat_7_1_len;
223 extern GlobalProperty pc_compat_7_0[];
224 extern const size_t pc_compat_7_0_len;
226 extern GlobalProperty pc_compat_6_2[];
227 extern const size_t pc_compat_6_2_len;
229 extern GlobalProperty pc_compat_6_1[];
230 extern const size_t pc_compat_6_1_len;
232 extern GlobalProperty pc_compat_6_0[];
233 extern const size_t pc_compat_6_0_len;
235 extern GlobalProperty pc_compat_5_2[];
236 extern const size_t pc_compat_5_2_len;
238 extern GlobalProperty pc_compat_5_1[];
239 extern const size_t pc_compat_5_1_len;
241 extern GlobalProperty pc_compat_5_0[];
242 extern const size_t pc_compat_5_0_len;
244 extern GlobalProperty pc_compat_4_2[];
245 extern const size_t pc_compat_4_2_len;
247 extern GlobalProperty pc_compat_4_1[];
248 extern const size_t pc_compat_4_1_len;
250 extern GlobalProperty pc_compat_4_0[];
251 extern const size_t pc_compat_4_0_len;
253 extern GlobalProperty pc_compat_3_1[];
254 extern const size_t pc_compat_3_1_len;
256 extern GlobalProperty pc_compat_3_0[];
257 extern const size_t pc_compat_3_0_len;
259 extern GlobalProperty pc_compat_2_12[];
260 extern const size_t pc_compat_2_12_len;
262 extern GlobalProperty pc_compat_2_11[];
263 extern const size_t pc_compat_2_11_len;
265 extern GlobalProperty pc_compat_2_10[];
266 extern const size_t pc_compat_2_10_len;
268 extern GlobalProperty pc_compat_2_9[];
269 extern const size_t pc_compat_2_9_len;
271 extern GlobalProperty pc_compat_2_8[];
272 extern const size_t pc_compat_2_8_len;
274 extern GlobalProperty pc_compat_2_7[];
275 extern const size_t pc_compat_2_7_len;
277 extern GlobalProperty pc_compat_2_6[];
278 extern const size_t pc_compat_2_6_len;
280 extern GlobalProperty pc_compat_2_5[];
281 extern const size_t pc_compat_2_5_len;
283 extern GlobalProperty pc_compat_2_4[];
284 extern const size_t pc_compat_2_4_len;
286 extern GlobalProperty pc_compat_2_3[];
287 extern const size_t pc_compat_2_3_len;
289 extern GlobalProperty pc_compat_2_2[];
290 extern const size_t pc_compat_2_2_len;
292 extern GlobalProperty pc_compat_2_1[];
293 extern const size_t pc_compat_2_1_len;
295 extern GlobalProperty pc_compat_2_0[];
296 extern const size_t pc_compat_2_0_len;
298 extern GlobalProperty pc_compat_1_7[];
299 extern const size_t pc_compat_1_7_len;
301 extern GlobalProperty pc_compat_1_6[];
302 extern const size_t pc_compat_1_6_len;
304 extern GlobalProperty pc_compat_1_5[];
305 extern const size_t pc_compat_1_5_len;
307 extern GlobalProperty pc_compat_1_4[];
308 extern const size_t pc_compat_1_4_len;
310 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
311 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
313 MachineClass *mc = MACHINE_CLASS(oc); \
314 optsfn(mc); \
315 mc->init = initfn; \
317 static const TypeInfo pc_machine_type_##suffix = { \
318 .name = namestr TYPE_MACHINE_SUFFIX, \
319 .parent = TYPE_PC_MACHINE, \
320 .class_init = pc_machine_##suffix##_class_init, \
321 }; \
322 static void pc_machine_init_##suffix(void) \
324 type_register(&pc_machine_type_##suffix); \
326 type_init(pc_machine_init_##suffix)
328 #endif