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net/colo-compare.c: Optimize unpredictable tcp options comparison
[qemu/ar7.git] / hw / block / fdc.c
blobdb40e174c9677ce54aaf498c9c800da7bc5591b8
1 /*
2 * QEMU Floppy disk emulator (Intel 82078)
3 *
4 * Copyright (c) 2003, 2007 Jocelyn Mayer
5 * Copyright (c) 2008 Hervé Poussineau
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25 /*
26 * The controller is used in Sun4m systems in a slightly different
27 * way. There are changes in DOR register and DMA is not available.
28 */
29
30 #include "qemu/osdep.h"
31 #include "hw/hw.h"
32 #include "hw/block/fdc.h"
33 #include "qapi/error.h"
34 #include "qemu/error-report.h"
35 #include "qemu/timer.h"
36 #include "hw/isa/isa.h"
37 #include "hw/sysbus.h"
38 #include "hw/block/block.h"
39 #include "sysemu/block-backend.h"
40 #include "sysemu/blockdev.h"
41 #include "sysemu/sysemu.h"
42 #include "qemu/log.h"
43
44 /********************************************************/
45 /* debug Floppy devices */
46
47 #define DEBUG_FLOPPY 0
48
49 #define FLOPPY_DPRINTF(fmt, ...) \
50 do { \
51 if (DEBUG_FLOPPY) { \
52 fprintf(stderr, "FLOPPY: " fmt , ## __VA_ARGS__); \
53 } \
54 } while (0)
55
56
57 /********************************************************/
58 /* qdev floppy bus */
59
60 #define TYPE_FLOPPY_BUS "floppy-bus"
61 #define FLOPPY_BUS(obj) OBJECT_CHECK(FloppyBus, (obj), TYPE_FLOPPY_BUS)
62
63 typedef struct FDCtrl FDCtrl;
64 typedef struct FDrive FDrive;
65 static FDrive *get_drv(FDCtrl *fdctrl, int unit);
66
67 typedef struct FloppyBus {
68 BusState bus;
69 FDCtrl *fdc;
70 } FloppyBus;
71
72 static const TypeInfo floppy_bus_info = {
73 .name = TYPE_FLOPPY_BUS,
74 .parent = TYPE_BUS,
75 .instance_size = sizeof(FloppyBus),
76 };
77
78 static void floppy_bus_create(FDCtrl *fdc, FloppyBus *bus, DeviceState *dev)
79 {
80 qbus_create_inplace(bus, sizeof(FloppyBus), TYPE_FLOPPY_BUS, dev, NULL);
81 bus->fdc = fdc;
82 }
83
84
85 /********************************************************/
86 /* Floppy drive emulation */
87
88 typedef enum FDriveRate {
89 FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
90 FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
91 FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
92 FDRIVE_RATE_1M = 0x03, /* 1 Mbps */
93 } FDriveRate;
94
95 typedef enum FDriveSize {
96 FDRIVE_SIZE_UNKNOWN,
97 FDRIVE_SIZE_350,
98 FDRIVE_SIZE_525,
99 } FDriveSize;
100
101 typedef struct FDFormat {
102 FloppyDriveType drive;
103 uint8_t last_sect;
104 uint8_t max_track;
105 uint8_t max_head;
106 FDriveRate rate;
107 } FDFormat;
108
109 /* In many cases, the total sector size of a format is enough to uniquely
110 * identify it. However, there are some total sector collisions between
111 * formats of different physical size, and these are noted below by
112 * highlighting the total sector size for entries with collisions. */
113 static const FDFormat fd_formats[] = {
114 /* First entry is default format */
115 /* 1.44 MB 3"1/2 floppy disks */
116 { FLOPPY_DRIVE_TYPE_144, 18, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 2880 */
117 { FLOPPY_DRIVE_TYPE_144, 20, 80, 1, FDRIVE_RATE_500K, }, /* 3.5" 3200 */
118 { FLOPPY_DRIVE_TYPE_144, 21, 80, 1, FDRIVE_RATE_500K, },
119 { FLOPPY_DRIVE_TYPE_144, 21, 82, 1, FDRIVE_RATE_500K, },
120 { FLOPPY_DRIVE_TYPE_144, 21, 83, 1, FDRIVE_RATE_500K, },
121 { FLOPPY_DRIVE_TYPE_144, 22, 80, 1, FDRIVE_RATE_500K, },
122 { FLOPPY_DRIVE_TYPE_144, 23, 80, 1, FDRIVE_RATE_500K, },
123 { FLOPPY_DRIVE_TYPE_144, 24, 80, 1, FDRIVE_RATE_500K, },
124 /* 2.88 MB 3"1/2 floppy disks */
125 { FLOPPY_DRIVE_TYPE_288, 36, 80, 1, FDRIVE_RATE_1M, },
126 { FLOPPY_DRIVE_TYPE_288, 39, 80, 1, FDRIVE_RATE_1M, },
127 { FLOPPY_DRIVE_TYPE_288, 40, 80, 1, FDRIVE_RATE_1M, },
128 { FLOPPY_DRIVE_TYPE_288, 44, 80, 1, FDRIVE_RATE_1M, },
129 { FLOPPY_DRIVE_TYPE_288, 48, 80, 1, FDRIVE_RATE_1M, },
130 /* 720 kB 3"1/2 floppy disks */
131 { FLOPPY_DRIVE_TYPE_144, 9, 80, 1, FDRIVE_RATE_250K, }, /* 3.5" 1440 */
132 { FLOPPY_DRIVE_TYPE_144, 10, 80, 1, FDRIVE_RATE_250K, },
133 { FLOPPY_DRIVE_TYPE_144, 10, 82, 1, FDRIVE_RATE_250K, },
134 { FLOPPY_DRIVE_TYPE_144, 10, 83, 1, FDRIVE_RATE_250K, },
135 { FLOPPY_DRIVE_TYPE_144, 13, 80, 1, FDRIVE_RATE_250K, },
136 { FLOPPY_DRIVE_TYPE_144, 14, 80, 1, FDRIVE_RATE_250K, },
137 /* 1.2 MB 5"1/4 floppy disks */
138 { FLOPPY_DRIVE_TYPE_120, 15, 80, 1, FDRIVE_RATE_500K, },
139 { FLOPPY_DRIVE_TYPE_120, 18, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 2880 */
140 { FLOPPY_DRIVE_TYPE_120, 18, 82, 1, FDRIVE_RATE_500K, },
141 { FLOPPY_DRIVE_TYPE_120, 18, 83, 1, FDRIVE_RATE_500K, },
142 { FLOPPY_DRIVE_TYPE_120, 20, 80, 1, FDRIVE_RATE_500K, }, /* 5.25" 3200 */
143 /* 720 kB 5"1/4 floppy disks */
144 { FLOPPY_DRIVE_TYPE_120, 9, 80, 1, FDRIVE_RATE_250K, }, /* 5.25" 1440 */
145 { FLOPPY_DRIVE_TYPE_120, 11, 80, 1, FDRIVE_RATE_250K, },
146 /* 360 kB 5"1/4 floppy disks */
147 { FLOPPY_DRIVE_TYPE_120, 9, 40, 1, FDRIVE_RATE_300K, }, /* 5.25" 720 */
148 { FLOPPY_DRIVE_TYPE_120, 9, 40, 0, FDRIVE_RATE_300K, },
149 { FLOPPY_DRIVE_TYPE_120, 10, 41, 1, FDRIVE_RATE_300K, },
150 { FLOPPY_DRIVE_TYPE_120, 10, 42, 1, FDRIVE_RATE_300K, },
151 /* 320 kB 5"1/4 floppy disks */
152 { FLOPPY_DRIVE_TYPE_120, 8, 40, 1, FDRIVE_RATE_250K, },
153 { FLOPPY_DRIVE_TYPE_120, 8, 40, 0, FDRIVE_RATE_250K, },
154 /* 360 kB must match 5"1/4 better than 3"1/2... */
155 { FLOPPY_DRIVE_TYPE_144, 9, 80, 0, FDRIVE_RATE_250K, }, /* 3.5" 720 */
156 /* end */
157 { FLOPPY_DRIVE_TYPE_NONE, -1, -1, 0, 0, },
158 };
159
160 static FDriveSize drive_size(FloppyDriveType drive)
161 {
162 switch (drive) {
163 case FLOPPY_DRIVE_TYPE_120:
164 return FDRIVE_SIZE_525;
165 case FLOPPY_DRIVE_TYPE_144:
166 case FLOPPY_DRIVE_TYPE_288:
167 return FDRIVE_SIZE_350;
168 default:
169 return FDRIVE_SIZE_UNKNOWN;
170 }
171 }
172
173 #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
174 #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
175
176 /* Will always be a fixed parameter for us */
177 #define FD_SECTOR_LEN 512
178 #define FD_SECTOR_SC 2 /* Sector size code */
179 #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
180
181 /* Floppy disk drive emulation */
182 typedef enum FDiskFlags {
183 FDISK_DBL_SIDES = 0x01,
184 } FDiskFlags;
185
186 struct FDrive {
187 FDCtrl *fdctrl;
188 BlockBackend *blk;
189 BlockConf *conf;
190 /* Drive status */
191 FloppyDriveType drive; /* CMOS drive type */
192 uint8_t perpendicular; /* 2.88 MB access mode */
193 /* Position */
194 uint8_t head;
195 uint8_t track;
196 uint8_t sect;
197 /* Media */
198 FloppyDriveType disk; /* Current disk type */
199 FDiskFlags flags;
200 uint8_t last_sect; /* Nb sector per track */
201 uint8_t max_track; /* Nb of tracks */
202 uint16_t bps; /* Bytes per sector */
203 uint8_t ro; /* Is read-only */
204 uint8_t media_changed; /* Is media changed */
205 uint8_t media_rate; /* Data rate of medium */
206
207 bool media_validated; /* Have we validated the media? */
208 };
209
210
211 static FloppyDriveType get_fallback_drive_type(FDrive *drv);
212
213 /* Hack: FD_SEEK is expected to work on empty drives. However, QEMU
214 * currently goes through some pains to keep seeks within the bounds
215 * established by last_sect and max_track. Correcting this is difficult,
216 * as refactoring FDC code tends to expose nasty bugs in the Linux kernel.
217 *
218 * For now: allow empty drives to have large bounds so we can seek around,
219 * with the understanding that when a diskette is inserted, the bounds will
220 * properly tighten to match the geometry of that inserted medium.
221 */
222 static void fd_empty_seek_hack(FDrive *drv)
223 {
224 drv->last_sect = 0xFF;
225 drv->max_track = 0xFF;
226 }
227
228 static void fd_init(FDrive *drv)
229 {
230 /* Drive */
231 drv->perpendicular = 0;
232 /* Disk */
233 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
234 drv->last_sect = 0;
235 drv->max_track = 0;
236 drv->ro = true;
237 drv->media_changed = 1;
238 }
239
240 #define NUM_SIDES(drv) ((drv)->flags & FDISK_DBL_SIDES ? 2 : 1)
241
242 static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
243 uint8_t last_sect, uint8_t num_sides)
244 {
245 return (((track * num_sides) + head) * last_sect) + sect - 1;
246 }
247
248 /* Returns current position, in sectors, for given drive */
249 static int fd_sector(FDrive *drv)
250 {
251 return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect,
252 NUM_SIDES(drv));
253 }
254
255 /* Returns current position, in bytes, for given drive */
256 static int fd_offset(FDrive *drv)
257 {
258 g_assert(fd_sector(drv) < INT_MAX >> BDRV_SECTOR_BITS);
259 return fd_sector(drv) << BDRV_SECTOR_BITS;
260 }
261
262 /* Seek to a new position:
263 * returns 0 if already on right track
264 * returns 1 if track changed
265 * returns 2 if track is invalid
266 * returns 3 if sector is invalid
267 * returns 4 if seek is disabled
268 */
269 static int fd_seek(FDrive *drv, uint8_t head, uint8_t track, uint8_t sect,
270 int enable_seek)
271 {
272 uint32_t sector;
273 int ret;
274
275 if (track > drv->max_track ||
276 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
277 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
278 head, track, sect, 1,
279 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
280 drv->max_track, drv->last_sect);
281 return 2;
282 }
283 if (sect > drv->last_sect) {
284 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
285 head, track, sect, 1,
286 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
287 drv->max_track, drv->last_sect);
288 return 3;
289 }
290 sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
291 ret = 0;
292 if (sector != fd_sector(drv)) {
293 #if 0
294 if (!enable_seek) {
295 FLOPPY_DPRINTF("error: no implicit seek %d %02x %02x"
296 " (max=%d %02x %02x)\n",
297 head, track, sect, 1, drv->max_track,
298 drv->last_sect);
299 return 4;
300 }
301 #endif
302 drv->head = head;
303 if (drv->track != track) {
304 if (drv->blk != NULL && blk_is_inserted(drv->blk)) {
305 drv->media_changed = 0;
306 }
307 ret = 1;
308 }
309 drv->track = track;
310 drv->sect = sect;
311 }
312
313 if (drv->blk == NULL || !blk_is_inserted(drv->blk)) {
314 ret = 2;
315 }
316
317 return ret;
318 }
319
320 /* Set drive back to track 0 */
321 static void fd_recalibrate(FDrive *drv)
322 {
323 FLOPPY_DPRINTF("recalibrate\n");
324 fd_seek(drv, 0, 0, 1, 1);
325 }
326
327 /**
328 * Determine geometry based on inserted diskette.
329 * Will not operate on an empty drive.
330 *
331 * @return: 0 on success, -1 if the drive is empty.
332 */
333 static int pick_geometry(FDrive *drv)
334 {
335 BlockBackend *blk = drv->blk;
336 const FDFormat *parse;
337 uint64_t nb_sectors, size;
338 int i;
339 int match, size_match, type_match;
340 bool magic = drv->drive == FLOPPY_DRIVE_TYPE_AUTO;
341
342 /* We can only pick a geometry if we have a diskette. */
343 if (!drv->blk || !blk_is_inserted(drv->blk) ||
344 drv->drive == FLOPPY_DRIVE_TYPE_NONE)
345 {
346 return -1;
347 }
348
349 /* We need to determine the likely geometry of the inserted medium.
350 * In order of preference, we look for:
351 * (1) The same drive type and number of sectors,
352 * (2) The same diskette size and number of sectors,
353 * (3) The same drive type.
354 *
355 * In all cases, matches that occur higher in the drive table will take
356 * precedence over matches that occur later in the table.
357 */
358 blk_get_geometry(blk, &nb_sectors);
359 match = size_match = type_match = -1;
360 for (i = 0; ; i++) {
361 parse = &fd_formats[i];
362 if (parse->drive == FLOPPY_DRIVE_TYPE_NONE) {
363 break;
364 }
365 size = (parse->max_head + 1) * parse->max_track * parse->last_sect;
366 if (nb_sectors == size) {
367 if (magic || parse->drive == drv->drive) {
368 /* (1) perfect match -- nb_sectors and drive type */
369 goto out;
370 } else if (drive_size(parse->drive) == drive_size(drv->drive)) {
371 /* (2) size match -- nb_sectors and physical medium size */
372 match = (match == -1) ? i : match;
373 } else {
374 /* This is suspicious -- Did the user misconfigure? */
375 size_match = (size_match == -1) ? i : size_match;
376 }
377 } else if (type_match == -1) {
378 if ((parse->drive == drv->drive) ||
379 (magic && (parse->drive == get_fallback_drive_type(drv)))) {
380 /* (3) type match -- nb_sectors mismatch, but matches the type
381 * specified explicitly by the user, or matches the fallback
382 * default type when using the drive autodetect mechanism */
383 type_match = i;
384 }
385 }
386 }
387
388 /* No exact match found */
389 if (match == -1) {
390 if (size_match != -1) {
391 parse = &fd_formats[size_match];
392 FLOPPY_DPRINTF("User requested floppy drive type '%s', "
393 "but inserted medium appears to be a "
394 "%"PRId64" sector '%s' type\n",
395 FloppyDriveType_str(drv->drive),
396 nb_sectors,
397 FloppyDriveType_str(parse->drive));
398 }
399 match = type_match;
400 }
401
402 /* No match of any kind found -- fd_format is misconfigured, abort. */
403 if (match == -1) {
404 error_setg(&error_abort, "No candidate geometries present in table "
405 " for floppy drive type '%s'",
406 FloppyDriveType_str(drv->drive));
407 }
408
409 parse = &(fd_formats[match]);
410
411 out:
412 if (parse->max_head == 0) {
413 drv->flags &= ~FDISK_DBL_SIDES;
414 } else {
415 drv->flags |= FDISK_DBL_SIDES;
416 }
417 drv->max_track = parse->max_track;
418 drv->last_sect = parse->last_sect;
419 drv->disk = parse->drive;
420 drv->media_rate = parse->rate;
421 return 0;
422 }
423
424 static void pick_drive_type(FDrive *drv)
425 {
426 if (drv->drive != FLOPPY_DRIVE_TYPE_AUTO) {
427 return;
428 }
429
430 if (pick_geometry(drv) == 0) {
431 drv->drive = drv->disk;
432 } else {
433 drv->drive = get_fallback_drive_type(drv);
434 }
435
436 g_assert(drv->drive != FLOPPY_DRIVE_TYPE_AUTO);
437 }
438
439 /* Revalidate a disk drive after a disk change */
440 static void fd_revalidate(FDrive *drv)
441 {
442 int rc;
443
444 FLOPPY_DPRINTF("revalidate\n");
445 if (drv->blk != NULL) {
446 drv->ro = blk_is_read_only(drv->blk);
447 if (!blk_is_inserted(drv->blk)) {
448 FLOPPY_DPRINTF("No disk in drive\n");
449 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
450 fd_empty_seek_hack(drv);
451 } else if (!drv->media_validated) {
452 rc = pick_geometry(drv);
453 if (rc) {
454 FLOPPY_DPRINTF("Could not validate floppy drive media");
455 } else {
456 drv->media_validated = true;
457 FLOPPY_DPRINTF("Floppy disk (%d h %d t %d s) %s\n",
458 (drv->flags & FDISK_DBL_SIDES) ? 2 : 1,
459 drv->max_track, drv->last_sect,
460 drv->ro ? "ro" : "rw");
461 }
462 }
463 } else {
464 FLOPPY_DPRINTF("No drive connected\n");
465 drv->last_sect = 0;
466 drv->max_track = 0;
467 drv->flags &= ~FDISK_DBL_SIDES;
468 drv->drive = FLOPPY_DRIVE_TYPE_NONE;
469 drv->disk = FLOPPY_DRIVE_TYPE_NONE;
470 }
471 }
472
473 static void fd_change_cb(void *opaque, bool load, Error **errp)
474 {
475 FDrive *drive = opaque;
476 Error *local_err = NULL;
477
478 if (!load) {
479 blk_set_perm(drive->blk, 0, BLK_PERM_ALL, &error_abort);
480 } else {
481 blkconf_apply_backend_options(drive->conf,
482 blk_is_read_only(drive->blk), false,
483 &local_err);
484 if (local_err) {
485 error_propagate(errp, local_err);
486 return;
487 }
488 }
489
490 drive->media_changed = 1;
491 drive->media_validated = false;
492 fd_revalidate(drive);
493 }
494
495 static const BlockDevOps fd_block_ops = {
496 .change_media_cb = fd_change_cb,
497 };
498
499
500 #define TYPE_FLOPPY_DRIVE "floppy"
501 #define FLOPPY_DRIVE(obj) \
502 OBJECT_CHECK(FloppyDrive, (obj), TYPE_FLOPPY_DRIVE)
503
504 typedef struct FloppyDrive {
505 DeviceState qdev;
506 uint32_t unit;
507 BlockConf conf;
508 FloppyDriveType type;
509 } FloppyDrive;
510
511 static Property floppy_drive_properties[] = {
512 DEFINE_PROP_UINT32("unit", FloppyDrive, unit, -1),
513 DEFINE_BLOCK_PROPERTIES(FloppyDrive, conf),
514 DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type,
515 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
516 FloppyDriveType),
517 DEFINE_PROP_END_OF_LIST(),
518 };
519
520 static int floppy_drive_init(DeviceState *qdev)
521 {
522 FloppyDrive *dev = FLOPPY_DRIVE(qdev);
523 FloppyBus *bus = FLOPPY_BUS(qdev->parent_bus);
524 FDrive *drive;
525 Error *local_err = NULL;
526 int ret;
527
528 if (dev->unit == -1) {
529 for (dev->unit = 0; dev->unit < MAX_FD; dev->unit++) {
530 drive = get_drv(bus->fdc, dev->unit);
531 if (!drive->blk) {
532 break;
533 }
534 }
535 }
536
537 if (dev->unit >= MAX_FD) {
538 error_report("Can't create floppy unit %d, bus supports only %d units",
539 dev->unit, MAX_FD);
540 return -1;
541 }
542
543 drive = get_drv(bus->fdc, dev->unit);
544 if (drive->blk) {
545 error_report("Floppy unit %d is in use", dev->unit);
546 return -1;
547 }
548
549 if (!dev->conf.blk) {
550 /* Anonymous BlockBackend for an empty drive */
551 dev->conf.blk = blk_new(0, BLK_PERM_ALL);
552 ret = blk_attach_dev(dev->conf.blk, qdev);
553 assert(ret == 0);
554 }
555
556 blkconf_blocksizes(&dev->conf);
557 if (dev->conf.logical_block_size != 512 ||
558 dev->conf.physical_block_size != 512)
559 {
560 error_report("Physical and logical block size must be 512 for floppy");
561 return -1;
562 }
563
564 /* rerror/werror aren't supported by fdc and therefore not even registered
565 * with qdev. So set the defaults manually before they are used in
566 * blkconf_apply_backend_options(). */
567 dev->conf.rerror = BLOCKDEV_ON_ERROR_AUTO;
568 dev->conf.werror = BLOCKDEV_ON_ERROR_AUTO;
569
570 blkconf_apply_backend_options(&dev->conf, blk_is_read_only(dev->conf.blk),
571 false, &local_err);
572 if (local_err) {
573 error_report_err(local_err);
574 return -1;
575 }
576
577 /* 'enospc' is the default for -drive, 'report' is what blk_new() gives us
578 * for empty drives. */
579 if (blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_ENOSPC &&
580 blk_get_on_error(dev->conf.blk, 0) != BLOCKDEV_ON_ERROR_REPORT) {
581 error_report("fdc doesn't support drive option werror");
582 return -1;
583 }
584 if (blk_get_on_error(dev->conf.blk, 1) != BLOCKDEV_ON_ERROR_REPORT) {
585 error_report("fdc doesn't support drive option rerror");
586 return -1;
587 }
588
589 drive->conf = &dev->conf;
590 drive->blk = dev->conf.blk;
591 drive->fdctrl = bus->fdc;
592
593 fd_init(drive);
594 blk_set_dev_ops(drive->blk, &fd_block_ops, drive);
595
596 /* Keep 'type' qdev property and FDrive->drive in sync */
597 drive->drive = dev->type;
598 pick_drive_type(drive);
599 dev->type = drive->drive;
600
601 fd_revalidate(drive);
602
603 return 0;
604 }
605
606 static void floppy_drive_class_init(ObjectClass *klass, void *data)
607 {
608 DeviceClass *k = DEVICE_CLASS(klass);
609 k->init = floppy_drive_init;
610 set_bit(DEVICE_CATEGORY_STORAGE, k->categories);
611 k->bus_type = TYPE_FLOPPY_BUS;
612 k->props = floppy_drive_properties;
613 k->desc = "virtual floppy drive";
614 }
615
616 static const TypeInfo floppy_drive_info = {
617 .name = TYPE_FLOPPY_DRIVE,
618 .parent = TYPE_DEVICE,
619 .instance_size = sizeof(FloppyDrive),
620 .class_init = floppy_drive_class_init,
621 };
622
623 /********************************************************/
624 /* Intel 82078 floppy disk controller emulation */
625
626 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq);
627 static void fdctrl_to_command_phase(FDCtrl *fdctrl);
628 static int fdctrl_transfer_handler (void *opaque, int nchan,
629 int dma_pos, int dma_len);
630 static void fdctrl_raise_irq(FDCtrl *fdctrl);
631 static FDrive *get_cur_drv(FDCtrl *fdctrl);
632
633 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl);
634 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl);
635 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl);
636 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value);
637 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl);
638 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value);
639 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl);
640 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value);
641 static uint32_t fdctrl_read_data(FDCtrl *fdctrl);
642 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value);
643 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl);
644 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value);
645
646 enum {
647 FD_DIR_WRITE = 0,
648 FD_DIR_READ = 1,
649 FD_DIR_SCANE = 2,
650 FD_DIR_SCANL = 3,
651 FD_DIR_SCANH = 4,
652 FD_DIR_VERIFY = 5,
653 };
654
655 enum {
656 FD_STATE_MULTI = 0x01, /* multi track flag */
657 FD_STATE_FORMAT = 0x02, /* format flag */
658 };
659
660 enum {
661 FD_REG_SRA = 0x00,
662 FD_REG_SRB = 0x01,
663 FD_REG_DOR = 0x02,
664 FD_REG_TDR = 0x03,
665 FD_REG_MSR = 0x04,
666 FD_REG_DSR = 0x04,
667 FD_REG_FIFO = 0x05,
668 FD_REG_DIR = 0x07,
669 FD_REG_CCR = 0x07,
670 };
671
672 enum {
673 FD_CMD_READ_TRACK = 0x02,
674 FD_CMD_SPECIFY = 0x03,
675 FD_CMD_SENSE_DRIVE_STATUS = 0x04,
676 FD_CMD_WRITE = 0x05,
677 FD_CMD_READ = 0x06,
678 FD_CMD_RECALIBRATE = 0x07,
679 FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
680 FD_CMD_WRITE_DELETED = 0x09,
681 FD_CMD_READ_ID = 0x0a,
682 FD_CMD_READ_DELETED = 0x0c,
683 FD_CMD_FORMAT_TRACK = 0x0d,
684 FD_CMD_DUMPREG = 0x0e,
685 FD_CMD_SEEK = 0x0f,
686 FD_CMD_VERSION = 0x10,
687 FD_CMD_SCAN_EQUAL = 0x11,
688 FD_CMD_PERPENDICULAR_MODE = 0x12,
689 FD_CMD_CONFIGURE = 0x13,
690 FD_CMD_LOCK = 0x14,
691 FD_CMD_VERIFY = 0x16,
692 FD_CMD_POWERDOWN_MODE = 0x17,
693 FD_CMD_PART_ID = 0x18,
694 FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
695 FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
696 FD_CMD_SAVE = 0x2e,
697 FD_CMD_OPTION = 0x33,
698 FD_CMD_RESTORE = 0x4e,
699 FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
700 FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
701 FD_CMD_FORMAT_AND_WRITE = 0xcd,
702 FD_CMD_RELATIVE_SEEK_IN = 0xcf,
703 };
704
705 enum {
706 FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
707 FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
708 FD_CONFIG_POLL = 0x10, /* Poll enabled */
709 FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
710 FD_CONFIG_EIS = 0x40, /* No implied seeks */
711 };
712
713 enum {
714 FD_SR0_DS0 = 0x01,
715 FD_SR0_DS1 = 0x02,
716 FD_SR0_HEAD = 0x04,
717 FD_SR0_EQPMT = 0x10,
718 FD_SR0_SEEK = 0x20,
719 FD_SR0_ABNTERM = 0x40,
720 FD_SR0_INVCMD = 0x80,
721 FD_SR0_RDYCHG = 0xc0,
722 };
723
724 enum {
725 FD_SR1_MA = 0x01, /* Missing address mark */
726 FD_SR1_NW = 0x02, /* Not writable */
727 FD_SR1_EC = 0x80, /* End of cylinder */
728 };
729
730 enum {
731 FD_SR2_SNS = 0x04, /* Scan not satisfied */
732 FD_SR2_SEH = 0x08, /* Scan equal hit */
733 };
734
735 enum {
736 FD_SRA_DIR = 0x01,
737 FD_SRA_nWP = 0x02,
738 FD_SRA_nINDX = 0x04,
739 FD_SRA_HDSEL = 0x08,
740 FD_SRA_nTRK0 = 0x10,
741 FD_SRA_STEP = 0x20,
742 FD_SRA_nDRV2 = 0x40,
743 FD_SRA_INTPEND = 0x80,
744 };
745
746 enum {
747 FD_SRB_MTR0 = 0x01,
748 FD_SRB_MTR1 = 0x02,
749 FD_SRB_WGATE = 0x04,
750 FD_SRB_RDATA = 0x08,
751 FD_SRB_WDATA = 0x10,
752 FD_SRB_DR0 = 0x20,
753 };
754
755 enum {
756 #if MAX_FD == 4
757 FD_DOR_SELMASK = 0x03,
758 #else
759 FD_DOR_SELMASK = 0x01,
760 #endif
761 FD_DOR_nRESET = 0x04,
762 FD_DOR_DMAEN = 0x08,
763 FD_DOR_MOTEN0 = 0x10,
764 FD_DOR_MOTEN1 = 0x20,
765 FD_DOR_MOTEN2 = 0x40,
766 FD_DOR_MOTEN3 = 0x80,
767 };
768
769 enum {
770 #if MAX_FD == 4
771 FD_TDR_BOOTSEL = 0x0c,
772 #else
773 FD_TDR_BOOTSEL = 0x04,
774 #endif
775 };
776
777 enum {
778 FD_DSR_DRATEMASK= 0x03,
779 FD_DSR_PWRDOWN = 0x40,
780 FD_DSR_SWRESET = 0x80,
781 };
782
783 enum {
784 FD_MSR_DRV0BUSY = 0x01,
785 FD_MSR_DRV1BUSY = 0x02,
786 FD_MSR_DRV2BUSY = 0x04,
787 FD_MSR_DRV3BUSY = 0x08,
788 FD_MSR_CMDBUSY = 0x10,
789 FD_MSR_NONDMA = 0x20,
790 FD_MSR_DIO = 0x40,
791 FD_MSR_RQM = 0x80,
792 };
793
794 enum {
795 FD_DIR_DSKCHG = 0x80,
796 };
797
798 /*
799 * See chapter 5.0 "Controller phases" of the spec:
800 *
801 * Command phase:
802 * The host writes a command and its parameters into the FIFO. The command
803 * phase is completed when all parameters for the command have been supplied,
804 * and execution phase is entered.
805 *
806 * Execution phase:
807 * Data transfers, either DMA or non-DMA. For non-DMA transfers, the FIFO
808 * contains the payload now, otherwise it's unused. When all bytes of the
809 * required data have been transferred, the state is switched to either result
810 * phase (if the command produces status bytes) or directly back into the
811 * command phase for the next command.
812 *
813 * Result phase:
814 * The host reads out the FIFO, which contains one or more result bytes now.
815 */
816 enum {
817 /* Only for migration: reconstruct phase from registers like qemu 2.3 */
818 FD_PHASE_RECONSTRUCT = 0,
819
820 FD_PHASE_COMMAND = 1,
821 FD_PHASE_EXECUTION = 2,
822 FD_PHASE_RESULT = 3,
823 };
824
825 #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
826 #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
827
828 struct FDCtrl {
829 MemoryRegion iomem;
830 qemu_irq irq;
831 /* Controller state */
832 QEMUTimer *result_timer;
833 int dma_chann;
834 uint8_t phase;
835 IsaDma *dma;
836 /* Controller's identification */
837 uint8_t version;
838 /* HW */
839 uint8_t sra;
840 uint8_t srb;
841 uint8_t dor;
842 uint8_t dor_vmstate; /* only used as temp during vmstate */
843 uint8_t tdr;
844 uint8_t dsr;
845 uint8_t msr;
846 uint8_t cur_drv;
847 uint8_t status0;
848 uint8_t status1;
849 uint8_t status2;
850 /* Command FIFO */
851 uint8_t *fifo;
852 int32_t fifo_size;
853 uint32_t data_pos;
854 uint32_t data_len;
855 uint8_t data_state;
856 uint8_t data_dir;
857 uint8_t eot; /* last wanted sector */
858 /* States kept only to be returned back */
859 /* precompensation */
860 uint8_t precomp_trk;
861 uint8_t config;
862 uint8_t lock;
863 /* Power down config (also with status regB access mode */
864 uint8_t pwrd;
865 /* Floppy drives */
866 FloppyBus bus;
867 uint8_t num_floppies;
868 FDrive drives[MAX_FD];
869 struct {
870 BlockBackend *blk;
871 FloppyDriveType type;
872 } qdev_for_drives[MAX_FD];
873 int reset_sensei;
874 uint32_t check_media_rate;
875 FloppyDriveType fallback; /* type=auto failure fallback */
876 /* Timers state */
877 uint8_t timer0;
878 uint8_t timer1;
879 PortioList portio_list;
880 };
881
882 static FloppyDriveType get_fallback_drive_type(FDrive *drv)
883 {
884 return drv->fdctrl->fallback;
885 }
886
887 #define TYPE_SYSBUS_FDC "base-sysbus-fdc"
888 #define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)
889
890 typedef struct FDCtrlSysBus {
891 /*< private >*/
892 SysBusDevice parent_obj;
893 /*< public >*/
894
895 struct FDCtrl state;
896 } FDCtrlSysBus;
897
898 #define ISA_FDC(obj) OBJECT_CHECK(FDCtrlISABus, (obj), TYPE_ISA_FDC)
899
900 typedef struct FDCtrlISABus {
901 ISADevice parent_obj;
902
903 uint32_t iobase;
904 uint32_t irq;
905 uint32_t dma;
906 struct FDCtrl state;
907 int32_t bootindexA;
908 int32_t bootindexB;
909 } FDCtrlISABus;
910
911 static uint32_t fdctrl_read (void *opaque, uint32_t reg)
912 {
913 FDCtrl *fdctrl = opaque;
914 uint32_t retval;
915
916 reg &= 7;
917 switch (reg) {
918 case FD_REG_SRA:
919 retval = fdctrl_read_statusA(fdctrl);
920 break;
921 case FD_REG_SRB:
922 retval = fdctrl_read_statusB(fdctrl);
923 break;
924 case FD_REG_DOR:
925 retval = fdctrl_read_dor(fdctrl);
926 break;
927 case FD_REG_TDR:
928 retval = fdctrl_read_tape(fdctrl);
929 break;
930 case FD_REG_MSR:
931 retval = fdctrl_read_main_status(fdctrl);
932 break;
933 case FD_REG_FIFO:
934 retval = fdctrl_read_data(fdctrl);
935 break;
936 case FD_REG_DIR:
937 retval = fdctrl_read_dir(fdctrl);
938 break;
939 default:
940 retval = (uint32_t)(-1);
941 break;
942 }
943 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
944
945 return retval;
946 }
947
948 static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
949 {
950 FDCtrl *fdctrl = opaque;
951
952 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
953
954 reg &= 7;
955 switch (reg) {
956 case FD_REG_DOR:
957 fdctrl_write_dor(fdctrl, value);
958 break;
959 case FD_REG_TDR:
960 fdctrl_write_tape(fdctrl, value);
961 break;
962 case FD_REG_DSR:
963 fdctrl_write_rate(fdctrl, value);
964 break;
965 case FD_REG_FIFO:
966 fdctrl_write_data(fdctrl, value);
967 break;
968 case FD_REG_CCR:
969 fdctrl_write_ccr(fdctrl, value);
970 break;
971 default:
972 break;
973 }
974 }
975
976 static uint64_t fdctrl_read_mem (void *opaque, hwaddr reg,
977 unsigned ize)
978 {
979 return fdctrl_read(opaque, (uint32_t)reg);
980 }
981
982 static void fdctrl_write_mem (void *opaque, hwaddr reg,
983 uint64_t value, unsigned size)
984 {
985 fdctrl_write(opaque, (uint32_t)reg, value);
986 }
987
988 static const MemoryRegionOps fdctrl_mem_ops = {
989 .read = fdctrl_read_mem,
990 .write = fdctrl_write_mem,
991 .endianness = DEVICE_NATIVE_ENDIAN,
992 };
993
994 static const MemoryRegionOps fdctrl_mem_strict_ops = {
995 .read = fdctrl_read_mem,
996 .write = fdctrl_write_mem,
997 .endianness = DEVICE_NATIVE_ENDIAN,
998 .valid = {
999 .min_access_size = 1,
1000 .max_access_size = 1,
1001 },
1002 };
1003
1004 static bool fdrive_media_changed_needed(void *opaque)
1005 {
1006 FDrive *drive = opaque;
1007
1008 return (drive->blk != NULL && drive->media_changed != 1);
1009 }
1010
1011 static const VMStateDescription vmstate_fdrive_media_changed = {
1012 .name = "fdrive/media_changed",
1013 .version_id = 1,
1014 .minimum_version_id = 1,
1015 .needed = fdrive_media_changed_needed,
1016 .fields = (VMStateField[]) {
1017 VMSTATE_UINT8(media_changed, FDrive),
1018 VMSTATE_END_OF_LIST()
1019 }
1020 };
1021
1022 static bool fdrive_media_rate_needed(void *opaque)
1023 {
1024 FDrive *drive = opaque;
1025
1026 return drive->fdctrl->check_media_rate;
1027 }
1028
1029 static const VMStateDescription vmstate_fdrive_media_rate = {
1030 .name = "fdrive/media_rate",
1031 .version_id = 1,
1032 .minimum_version_id = 1,
1033 .needed = fdrive_media_rate_needed,
1034 .fields = (VMStateField[]) {
1035 VMSTATE_UINT8(media_rate, FDrive),
1036 VMSTATE_END_OF_LIST()
1037 }
1038 };
1039
1040 static bool fdrive_perpendicular_needed(void *opaque)
1041 {
1042 FDrive *drive = opaque;
1043
1044 return drive->perpendicular != 0;
1045 }
1046
1047 static const VMStateDescription vmstate_fdrive_perpendicular = {
1048 .name = "fdrive/perpendicular",
1049 .version_id = 1,
1050 .minimum_version_id = 1,
1051 .needed = fdrive_perpendicular_needed,
1052 .fields = (VMStateField[]) {
1053 VMSTATE_UINT8(perpendicular, FDrive),
1054 VMSTATE_END_OF_LIST()
1055 }
1056 };
1057
1058 static int fdrive_post_load(void *opaque, int version_id)
1059 {
1060 fd_revalidate(opaque);
1061 return 0;
1062 }
1063
1064 static const VMStateDescription vmstate_fdrive = {
1065 .name = "fdrive",
1066 .version_id = 1,
1067 .minimum_version_id = 1,
1068 .post_load = fdrive_post_load,
1069 .fields = (VMStateField[]) {
1070 VMSTATE_UINT8(head, FDrive),
1071 VMSTATE_UINT8(track, FDrive),
1072 VMSTATE_UINT8(sect, FDrive),
1073 VMSTATE_END_OF_LIST()
1074 },
1075 .subsections = (const VMStateDescription*[]) {
1076 &vmstate_fdrive_media_changed,
1077 &vmstate_fdrive_media_rate,
1078 &vmstate_fdrive_perpendicular,
1079 NULL
1080 }
1081 };
1082
1083 /*
1084 * Reconstructs the phase from register values according to the logic that was
1085 * implemented in qemu 2.3. This is the default value that is used if the phase
1086 * subsection is not present on migration.
1087 *
1088 * Don't change this function to reflect newer qemu versions, it is part of
1089 * the migration ABI.
1090 */
1091 static int reconstruct_phase(FDCtrl *fdctrl)
1092 {
1093 if (fdctrl->msr & FD_MSR_NONDMA) {
1094 return FD_PHASE_EXECUTION;
1095 } else if ((fdctrl->msr & FD_MSR_RQM) == 0) {
1096 /* qemu 2.3 disabled RQM only during DMA transfers */
1097 return FD_PHASE_EXECUTION;
1098 } else if (fdctrl->msr & FD_MSR_DIO) {
1099 return FD_PHASE_RESULT;
1100 } else {
1101 return FD_PHASE_COMMAND;
1102 }
1103 }
1104
1105 static void fdc_pre_save(void *opaque)
1106 {
1107 FDCtrl *s = opaque;
1108
1109 s->dor_vmstate = s->dor | GET_CUR_DRV(s);
1110 }
1111
1112 static int fdc_pre_load(void *opaque)
1113 {
1114 FDCtrl *s = opaque;
1115 s->phase = FD_PHASE_RECONSTRUCT;
1116 return 0;
1117 }
1118
1119 static int fdc_post_load(void *opaque, int version_id)
1120 {
1121 FDCtrl *s = opaque;
1122
1123 SET_CUR_DRV(s, s->dor_vmstate & FD_DOR_SELMASK);
1124 s->dor = s->dor_vmstate & ~FD_DOR_SELMASK;
1125
1126 if (s->phase == FD_PHASE_RECONSTRUCT) {
1127 s->phase = reconstruct_phase(s);
1128 }
1129
1130 return 0;
1131 }
1132
1133 static bool fdc_reset_sensei_needed(void *opaque)
1134 {
1135 FDCtrl *s = opaque;
1136
1137 return s->reset_sensei != 0;
1138 }
1139
1140 static const VMStateDescription vmstate_fdc_reset_sensei = {
1141 .name = "fdc/reset_sensei",
1142 .version_id = 1,
1143 .minimum_version_id = 1,
1144 .needed = fdc_reset_sensei_needed,
1145 .fields = (VMStateField[]) {
1146 VMSTATE_INT32(reset_sensei, FDCtrl),
1147 VMSTATE_END_OF_LIST()
1148 }
1149 };
1150
1151 static bool fdc_result_timer_needed(void *opaque)
1152 {
1153 FDCtrl *s = opaque;
1154
1155 return timer_pending(s->result_timer);
1156 }
1157
1158 static const VMStateDescription vmstate_fdc_result_timer = {
1159 .name = "fdc/result_timer",
1160 .version_id = 1,
1161 .minimum_version_id = 1,
1162 .needed = fdc_result_timer_needed,
1163 .fields = (VMStateField[]) {
1164 VMSTATE_TIMER_PTR(result_timer, FDCtrl),
1165 VMSTATE_END_OF_LIST()
1166 }
1167 };
1168
1169 static bool fdc_phase_needed(void *opaque)
1170 {
1171 FDCtrl *fdctrl = opaque;
1172
1173 return reconstruct_phase(fdctrl) != fdctrl->phase;
1174 }
1175
1176 static const VMStateDescription vmstate_fdc_phase = {
1177 .name = "fdc/phase",
1178 .version_id = 1,
1179 .minimum_version_id = 1,
1180 .needed = fdc_phase_needed,
1181 .fields = (VMStateField[]) {
1182 VMSTATE_UINT8(phase, FDCtrl),
1183 VMSTATE_END_OF_LIST()
1184 }
1185 };
1186
1187 static const VMStateDescription vmstate_fdc = {
1188 .name = "fdc",
1189 .version_id = 2,
1190 .minimum_version_id = 2,
1191 .pre_save = fdc_pre_save,
1192 .pre_load = fdc_pre_load,
1193 .post_load = fdc_post_load,
1194 .fields = (VMStateField[]) {
1195 /* Controller State */
1196 VMSTATE_UINT8(sra, FDCtrl),
1197 VMSTATE_UINT8(srb, FDCtrl),
1198 VMSTATE_UINT8(dor_vmstate, FDCtrl),
1199 VMSTATE_UINT8(tdr, FDCtrl),
1200 VMSTATE_UINT8(dsr, FDCtrl),
1201 VMSTATE_UINT8(msr, FDCtrl),
1202 VMSTATE_UINT8(status0, FDCtrl),
1203 VMSTATE_UINT8(status1, FDCtrl),
1204 VMSTATE_UINT8(status2, FDCtrl),
1205 /* Command FIFO */
1206 VMSTATE_VARRAY_INT32(fifo, FDCtrl, fifo_size, 0, vmstate_info_uint8,
1207 uint8_t),
1208 VMSTATE_UINT32(data_pos, FDCtrl),
1209 VMSTATE_UINT32(data_len, FDCtrl),
1210 VMSTATE_UINT8(data_state, FDCtrl),
1211 VMSTATE_UINT8(data_dir, FDCtrl),
1212 VMSTATE_UINT8(eot, FDCtrl),
1213 /* States kept only to be returned back */
1214 VMSTATE_UINT8(timer0, FDCtrl),
1215 VMSTATE_UINT8(timer1, FDCtrl),
1216 VMSTATE_UINT8(precomp_trk, FDCtrl),
1217 VMSTATE_UINT8(config, FDCtrl),
1218 VMSTATE_UINT8(lock, FDCtrl),
1219 VMSTATE_UINT8(pwrd, FDCtrl),
1220 VMSTATE_UINT8_EQUAL(num_floppies, FDCtrl, NULL),
1221 VMSTATE_STRUCT_ARRAY(drives, FDCtrl, MAX_FD, 1,
1222 vmstate_fdrive, FDrive),
1223 VMSTATE_END_OF_LIST()
1224 },
1225 .subsections = (const VMStateDescription*[]) {
1226 &vmstate_fdc_reset_sensei,
1227 &vmstate_fdc_result_timer,
1228 &vmstate_fdc_phase,
1229 NULL
1230 }
1231 };
1232
1233 static void fdctrl_external_reset_sysbus(DeviceState *d)
1234 {
1235 FDCtrlSysBus *sys = SYSBUS_FDC(d);
1236 FDCtrl *s = &sys->state;
1237
1238 fdctrl_reset(s, 0);
1239 }
1240
1241 static void fdctrl_external_reset_isa(DeviceState *d)
1242 {
1243 FDCtrlISABus *isa = ISA_FDC(d);
1244 FDCtrl *s = &isa->state;
1245
1246 fdctrl_reset(s, 0);
1247 }
1248
1249 static void fdctrl_handle_tc(void *opaque, int irq, int level)
1250 {
1251 //FDCtrl *s = opaque;
1252
1253 if (level) {
1254 // XXX
1255 FLOPPY_DPRINTF("TC pulsed\n");
1256 }
1257 }
1258
1259 /* Change IRQ state */
1260 static void fdctrl_reset_irq(FDCtrl *fdctrl)
1261 {
1262 fdctrl->status0 = 0;
1263 if (!(fdctrl->sra & FD_SRA_INTPEND))
1264 return;
1265 FLOPPY_DPRINTF("Reset interrupt\n");
1266 qemu_set_irq(fdctrl->irq, 0);
1267 fdctrl->sra &= ~FD_SRA_INTPEND;
1268 }
1269
1270 static void fdctrl_raise_irq(FDCtrl *fdctrl)
1271 {
1272 if (!(fdctrl->sra & FD_SRA_INTPEND)) {
1273 qemu_set_irq(fdctrl->irq, 1);
1274 fdctrl->sra |= FD_SRA_INTPEND;
1275 }
1276
1277 fdctrl->reset_sensei = 0;
1278 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
1279 }
1280
1281 /* Reset controller */
1282 static void fdctrl_reset(FDCtrl *fdctrl, int do_irq)
1283 {
1284 int i;
1285
1286 FLOPPY_DPRINTF("reset controller\n");
1287 fdctrl_reset_irq(fdctrl);
1288 /* Initialise controller */
1289 fdctrl->sra = 0;
1290 fdctrl->srb = 0xc0;
1291 if (!fdctrl->drives[1].blk) {
1292 fdctrl->sra |= FD_SRA_nDRV2;
1293 }
1294 fdctrl->cur_drv = 0;
1295 fdctrl->dor = FD_DOR_nRESET;
1296 fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
1297 fdctrl->msr = FD_MSR_RQM;
1298 fdctrl->reset_sensei = 0;
1299 timer_del(fdctrl->result_timer);
1300 /* FIFO state */
1301 fdctrl->data_pos = 0;
1302 fdctrl->data_len = 0;
1303 fdctrl->data_state = 0;
1304 fdctrl->data_dir = FD_DIR_WRITE;
1305 for (i = 0; i < MAX_FD; i++)
1306 fd_recalibrate(&fdctrl->drives[i]);
1307 fdctrl_to_command_phase(fdctrl);
1308 if (do_irq) {
1309 fdctrl->status0 |= FD_SR0_RDYCHG;
1310 fdctrl_raise_irq(fdctrl);
1311 fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
1312 }
1313 }
1314
1315 static inline FDrive *drv0(FDCtrl *fdctrl)
1316 {
1317 return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
1318 }
1319
1320 static inline FDrive *drv1(FDCtrl *fdctrl)
1321 {
1322 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
1323 return &fdctrl->drives[1];
1324 else
1325 return &fdctrl->drives[0];
1326 }
1327
1328 #if MAX_FD == 4
1329 static inline FDrive *drv2(FDCtrl *fdctrl)
1330 {
1331 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
1332 return &fdctrl->drives[2];
1333 else
1334 return &fdctrl->drives[1];
1335 }
1336
1337 static inline FDrive *drv3(FDCtrl *fdctrl)
1338 {
1339 if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
1340 return &fdctrl->drives[3];
1341 else
1342 return &fdctrl->drives[2];
1343 }
1344 #endif
1345
1346 static FDrive *get_drv(FDCtrl *fdctrl, int unit)
1347 {
1348 switch (unit) {
1349 case 0: return drv0(fdctrl);
1350 case 1: return drv1(fdctrl);
1351 #if MAX_FD == 4
1352 case 2: return drv2(fdctrl);
1353 case 3: return drv3(fdctrl);
1354 #endif
1355 default: return NULL;
1356 }
1357 }
1358
1359 static FDrive *get_cur_drv(FDCtrl *fdctrl)
1360 {
1361 return get_drv(fdctrl, fdctrl->cur_drv);
1362 }
1363
1364 /* Status A register : 0x00 (read-only) */
1365 static uint32_t fdctrl_read_statusA(FDCtrl *fdctrl)
1366 {
1367 uint32_t retval = fdctrl->sra;
1368
1369 FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
1370
1371 return retval;
1372 }
1373
1374 /* Status B register : 0x01 (read-only) */
1375 static uint32_t fdctrl_read_statusB(FDCtrl *fdctrl)
1376 {
1377 uint32_t retval = fdctrl->srb;
1378
1379 FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
1380
1381 return retval;
1382 }
1383
1384 /* Digital output register : 0x02 */
1385 static uint32_t fdctrl_read_dor(FDCtrl *fdctrl)
1386 {
1387 uint32_t retval = fdctrl->dor;
1388
1389 /* Selected drive */
1390 retval |= fdctrl->cur_drv;
1391 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
1392
1393 return retval;
1394 }
1395
1396 static void fdctrl_write_dor(FDCtrl *fdctrl, uint32_t value)
1397 {
1398 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
1399
1400 /* Motors */
1401 if (value & FD_DOR_MOTEN0)
1402 fdctrl->srb |= FD_SRB_MTR0;
1403 else
1404 fdctrl->srb &= ~FD_SRB_MTR0;
1405 if (value & FD_DOR_MOTEN1)
1406 fdctrl->srb |= FD_SRB_MTR1;
1407 else
1408 fdctrl->srb &= ~FD_SRB_MTR1;
1409
1410 /* Drive */
1411 if (value & 1)
1412 fdctrl->srb |= FD_SRB_DR0;
1413 else
1414 fdctrl->srb &= ~FD_SRB_DR0;
1415
1416 /* Reset */
1417 if (!(value & FD_DOR_nRESET)) {
1418 if (fdctrl->dor & FD_DOR_nRESET) {
1419 FLOPPY_DPRINTF("controller enter RESET state\n");
1420 }
1421 } else {
1422 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1423 FLOPPY_DPRINTF("controller out of RESET state\n");
1424 fdctrl_reset(fdctrl, 1);
1425 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1426 }
1427 }
1428 /* Selected drive */
1429 fdctrl->cur_drv = value & FD_DOR_SELMASK;
1430
1431 fdctrl->dor = value;
1432 }
1433
1434 /* Tape drive register : 0x03 */
1435 static uint32_t fdctrl_read_tape(FDCtrl *fdctrl)
1436 {
1437 uint32_t retval = fdctrl->tdr;
1438
1439 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1440
1441 return retval;
1442 }
1443
1444 static void fdctrl_write_tape(FDCtrl *fdctrl, uint32_t value)
1445 {
1446 /* Reset mode */
1447 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1448 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1449 return;
1450 }
1451 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1452 /* Disk boot selection indicator */
1453 fdctrl->tdr = value & FD_TDR_BOOTSEL;
1454 /* Tape indicators: never allow */
1455 }
1456
1457 /* Main status register : 0x04 (read) */
1458 static uint32_t fdctrl_read_main_status(FDCtrl *fdctrl)
1459 {
1460 uint32_t retval = fdctrl->msr;
1461
1462 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1463 fdctrl->dor |= FD_DOR_nRESET;
1464
1465 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1466
1467 return retval;
1468 }
1469
1470 /* Data select rate register : 0x04 (write) */
1471 static void fdctrl_write_rate(FDCtrl *fdctrl, uint32_t value)
1472 {
1473 /* Reset mode */
1474 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1475 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1476 return;
1477 }
1478 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1479 /* Reset: autoclear */
1480 if (value & FD_DSR_SWRESET) {
1481 fdctrl->dor &= ~FD_DOR_nRESET;
1482 fdctrl_reset(fdctrl, 1);
1483 fdctrl->dor |= FD_DOR_nRESET;
1484 }
1485 if (value & FD_DSR_PWRDOWN) {
1486 fdctrl_reset(fdctrl, 1);
1487 }
1488 fdctrl->dsr = value;
1489 }
1490
1491 /* Configuration control register: 0x07 (write) */
1492 static void fdctrl_write_ccr(FDCtrl *fdctrl, uint32_t value)
1493 {
1494 /* Reset mode */
1495 if (!(fdctrl->dor & FD_DOR_nRESET)) {
1496 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1497 return;
1498 }
1499 FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1500
1501 /* Only the rate selection bits used in AT mode, and we
1502 * store those in the DSR.
1503 */
1504 fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) |
1505 (value & FD_DSR_DRATEMASK);
1506 }
1507
1508 static int fdctrl_media_changed(FDrive *drv)
1509 {
1510 return drv->media_changed;
1511 }
1512
1513 /* Digital input register : 0x07 (read-only) */
1514 static uint32_t fdctrl_read_dir(FDCtrl *fdctrl)
1515 {
1516 uint32_t retval = 0;
1517
1518 if (fdctrl_media_changed(get_cur_drv(fdctrl))) {
1519 retval |= FD_DIR_DSKCHG;
1520 }
1521 if (retval != 0) {
1522 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1523 }
1524
1525 return retval;
1526 }
1527
1528 /* Clear the FIFO and update the state for receiving the next command */
1529 static void fdctrl_to_command_phase(FDCtrl *fdctrl)
1530 {
1531 fdctrl->phase = FD_PHASE_COMMAND;
1532 fdctrl->data_dir = FD_DIR_WRITE;
1533 fdctrl->data_pos = 0;
1534 fdctrl->data_len = 1; /* Accept command byte, adjust for params later */
1535 fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1536 fdctrl->msr |= FD_MSR_RQM;
1537 }
1538
1539 /* Update the state to allow the guest to read out the command status.
1540 * @fifo_len is the number of result bytes to be read out. */
1541 static void fdctrl_to_result_phase(FDCtrl *fdctrl, int fifo_len)
1542 {
1543 fdctrl->phase = FD_PHASE_RESULT;
1544 fdctrl->data_dir = FD_DIR_READ;
1545 fdctrl->data_len = fifo_len;
1546 fdctrl->data_pos = 0;
1547 fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1548 }
1549
1550 /* Set an error: unimplemented/unknown command */
1551 static void fdctrl_unimplemented(FDCtrl *fdctrl, int direction)
1552 {
1553 qemu_log_mask(LOG_UNIMP, "fdc: unimplemented command 0x%02x\n",
1554 fdctrl->fifo[0]);
1555 fdctrl->fifo[0] = FD_SR0_INVCMD;
1556 fdctrl_to_result_phase(fdctrl, 1);
1557 }
1558
1559 /* Seek to next sector
1560 * returns 0 when end of track reached (for DBL_SIDES on head 1)
1561 * otherwise returns 1
1562 */
1563 static int fdctrl_seek_to_next_sect(FDCtrl *fdctrl, FDrive *cur_drv)
1564 {
1565 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1566 cur_drv->head, cur_drv->track, cur_drv->sect,
1567 fd_sector(cur_drv));
1568 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1569 error in fact */
1570 uint8_t new_head = cur_drv->head;
1571 uint8_t new_track = cur_drv->track;
1572 uint8_t new_sect = cur_drv->sect;
1573
1574 int ret = 1;
1575
1576 if (new_sect >= cur_drv->last_sect ||
1577 new_sect == fdctrl->eot) {
1578 new_sect = 1;
1579 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1580 if (new_head == 0 &&
1581 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1582 new_head = 1;
1583 } else {
1584 new_head = 0;
1585 new_track++;
1586 fdctrl->status0 |= FD_SR0_SEEK;
1587 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0) {
1588 ret = 0;
1589 }
1590 }
1591 } else {
1592 fdctrl->status0 |= FD_SR0_SEEK;
1593 new_track++;
1594 ret = 0;
1595 }
1596 if (ret == 1) {
1597 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1598 new_head, new_track, new_sect, fd_sector(cur_drv));
1599 }
1600 } else {
1601 new_sect++;
1602 }
1603 fd_seek(cur_drv, new_head, new_track, new_sect, 1);
1604 return ret;
1605 }
1606
1607 /* Callback for transfer end (stop or abort) */
1608 static void fdctrl_stop_transfer(FDCtrl *fdctrl, uint8_t status0,
1609 uint8_t status1, uint8_t status2)
1610 {
1611 FDrive *cur_drv;
1612 cur_drv = get_cur_drv(fdctrl);
1613
1614 fdctrl->status0 &= ~(FD_SR0_DS0 | FD_SR0_DS1 | FD_SR0_HEAD);
1615 fdctrl->status0 |= GET_CUR_DRV(fdctrl);
1616 if (cur_drv->head) {
1617 fdctrl->status0 |= FD_SR0_HEAD;
1618 }
1619 fdctrl->status0 |= status0;
1620
1621 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1622 status0, status1, status2, fdctrl->status0);
1623 fdctrl->fifo[0] = fdctrl->status0;
1624 fdctrl->fifo[1] = status1;
1625 fdctrl->fifo[2] = status2;
1626 fdctrl->fifo[3] = cur_drv->track;
1627 fdctrl->fifo[4] = cur_drv->head;
1628 fdctrl->fifo[5] = cur_drv->sect;
1629 fdctrl->fifo[6] = FD_SECTOR_SC;
1630 fdctrl->data_dir = FD_DIR_READ;
1631 if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1632 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma);
1633 k->release_DREQ(fdctrl->dma, fdctrl->dma_chann);
1634 }
1635 fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1636 fdctrl->msr &= ~FD_MSR_NONDMA;
1637
1638 fdctrl_to_result_phase(fdctrl, 7);
1639 fdctrl_raise_irq(fdctrl);
1640 }
1641
1642 /* Prepare a data transfer (either DMA or FIFO) */
1643 static void fdctrl_start_transfer(FDCtrl *fdctrl, int direction)
1644 {
1645 FDrive *cur_drv;
1646 uint8_t kh, kt, ks;
1647
1648 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1649 cur_drv = get_cur_drv(fdctrl);
1650 kt = fdctrl->fifo[2];
1651 kh = fdctrl->fifo[3];
1652 ks = fdctrl->fifo[4];
1653 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1654 GET_CUR_DRV(fdctrl), kh, kt, ks,
1655 fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
1656 NUM_SIDES(cur_drv)));
1657 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1658 case 2:
1659 /* sect too big */
1660 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1661 fdctrl->fifo[3] = kt;
1662 fdctrl->fifo[4] = kh;
1663 fdctrl->fifo[5] = ks;
1664 return;
1665 case 3:
1666 /* track too big */
1667 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1668 fdctrl->fifo[3] = kt;
1669 fdctrl->fifo[4] = kh;
1670 fdctrl->fifo[5] = ks;
1671 return;
1672 case 4:
1673 /* No seek enabled */
1674 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1675 fdctrl->fifo[3] = kt;
1676 fdctrl->fifo[4] = kh;
1677 fdctrl->fifo[5] = ks;
1678 return;
1679 case 1:
1680 fdctrl->status0 |= FD_SR0_SEEK;
1681 break;
1682 default:
1683 break;
1684 }
1685
1686 /* Check the data rate. If the programmed data rate does not match
1687 * the currently inserted medium, the operation has to fail. */
1688 if (fdctrl->check_media_rate &&
1689 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1690 FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1691 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1692 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1693 fdctrl->fifo[3] = kt;
1694 fdctrl->fifo[4] = kh;
1695 fdctrl->fifo[5] = ks;
1696 return;
1697 }
1698
1699 /* Set the FIFO state */
1700 fdctrl->data_dir = direction;
1701 fdctrl->data_pos = 0;
1702 assert(fdctrl->msr & FD_MSR_CMDBUSY);
1703 if (fdctrl->fifo[0] & 0x80)
1704 fdctrl->data_state |= FD_STATE_MULTI;
1705 else
1706 fdctrl->data_state &= ~FD_STATE_MULTI;
1707 if (fdctrl->fifo[5] == 0) {
1708 fdctrl->data_len = fdctrl->fifo[8];
1709 } else {
1710 int tmp;
1711 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1712 tmp = (fdctrl->fifo[6] - ks + 1);
1713 if (fdctrl->fifo[0] & 0x80)
1714 tmp += fdctrl->fifo[6];
1715 fdctrl->data_len *= tmp;
1716 }
1717 fdctrl->eot = fdctrl->fifo[6];
1718 if (fdctrl->dor & FD_DOR_DMAEN) {
1719 IsaDmaTransferMode dma_mode;
1720 IsaDmaClass *k = ISADMA_GET_CLASS(fdctrl->dma);
1721 bool dma_mode_ok;
1722 /* DMA transfer are enabled. Check if DMA channel is well programmed */
1723 dma_mode = k->get_transfer_mode(fdctrl->dma, fdctrl->dma_chann);
1724 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1725 dma_mode, direction,
1726 (128 << fdctrl->fifo[5]) *
1727 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1728 switch (direction) {
1729 case FD_DIR_SCANE:
1730 case FD_DIR_SCANL:
1731 case FD_DIR_SCANH:
1732 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_VERIFY);
1733 break;
1734 case FD_DIR_WRITE:
1735 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_WRITE);
1736 break;
1737 case FD_DIR_READ:
1738 dma_mode_ok = (dma_mode == ISADMA_TRANSFER_READ);
1739 break;
1740 case FD_DIR_VERIFY:
1741 dma_mode_ok = true;
1742 break;
1743 default:
1744 dma_mode_ok = false;
1745 break;
1746 }
1747 if (dma_mode_ok) {
1748 /* No access is allowed until DMA transfer has completed */
1749 fdctrl->msr &= ~FD_MSR_RQM;
1750 if (direction != FD_DIR_VERIFY) {
1751 /* Now, we just have to wait for the DMA controller to
1752 * recall us...
1753 */
1754 k->hold_DREQ(fdctrl->dma, fdctrl->dma_chann);
1755 k->schedule(fdctrl->dma);
1756 } else {
1757 /* Start transfer */
1758 fdctrl_transfer_handler(fdctrl, fdctrl->dma_chann, 0,
1759 fdctrl->data_len);
1760 }
1761 return;
1762 } else {
1763 FLOPPY_DPRINTF("bad dma_mode=%d direction=%d\n", dma_mode,
1764 direction);
1765 }
1766 }
1767 FLOPPY_DPRINTF("start non-DMA transfer\n");
1768 fdctrl->msr |= FD_MSR_NONDMA | FD_MSR_RQM;
1769 if (direction != FD_DIR_WRITE)
1770 fdctrl->msr |= FD_MSR_DIO;
1771 /* IO based transfer: calculate len */
1772 fdctrl_raise_irq(fdctrl);
1773 }
1774
1775 /* Prepare a transfer of deleted data */
1776 static void fdctrl_start_transfer_del(FDCtrl *fdctrl, int direction)
1777 {
1778 qemu_log_mask(LOG_UNIMP, "fdctrl_start_transfer_del() unimplemented\n");
1779
1780 /* We don't handle deleted data,
1781 * so we don't return *ANYTHING*
1782 */
1783 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1784 }
1785
1786 /* handlers for DMA transfers */
1787 static int fdctrl_transfer_handler (void *opaque, int nchan,
1788 int dma_pos, int dma_len)
1789 {
1790 FDCtrl *fdctrl;
1791 FDrive *cur_drv;
1792 int len, start_pos, rel_pos;
1793 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1794 IsaDmaClass *k;
1795
1796 fdctrl = opaque;
1797 if (fdctrl->msr & FD_MSR_RQM) {
1798 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1799 return 0;
1800 }
1801 k = ISADMA_GET_CLASS(fdctrl->dma);
1802 cur_drv = get_cur_drv(fdctrl);
1803 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1804 fdctrl->data_dir == FD_DIR_SCANH)
1805 status2 = FD_SR2_SNS;
1806 if (dma_len > fdctrl->data_len)
1807 dma_len = fdctrl->data_len;
1808 if (cur_drv->blk == NULL) {
1809 if (fdctrl->data_dir == FD_DIR_WRITE)
1810 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1811 else
1812 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1813 len = 0;
1814 goto transfer_error;
1815 }
1816 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1817 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1818 len = dma_len - fdctrl->data_pos;
1819 if (len + rel_pos > FD_SECTOR_LEN)
1820 len = FD_SECTOR_LEN - rel_pos;
1821 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1822 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1823 fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1824 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1825 fd_sector(cur_drv) * FD_SECTOR_LEN);
1826 if (fdctrl->data_dir != FD_DIR_WRITE ||
1827 len < FD_SECTOR_LEN || rel_pos != 0) {
1828 /* READ & SCAN commands and realign to a sector for WRITE */
1829 if (blk_pread(cur_drv->blk, fd_offset(cur_drv),
1830 fdctrl->fifo, BDRV_SECTOR_SIZE) < 0) {
1831 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1832 fd_sector(cur_drv));
1833 /* Sure, image size is too small... */
1834 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1835 }
1836 }
1837 switch (fdctrl->data_dir) {
1838 case FD_DIR_READ:
1839 /* READ commands */
1840 k->write_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos,
1841 fdctrl->data_pos, len);
1842 break;
1843 case FD_DIR_WRITE:
1844 /* WRITE commands */
1845 if (cur_drv->ro) {
1846 /* Handle readonly medium early, no need to do DMA, touch the
1847 * LED or attempt any writes. A real floppy doesn't attempt
1848 * to write to readonly media either. */
1849 fdctrl_stop_transfer(fdctrl,
1850 FD_SR0_ABNTERM | FD_SR0_SEEK, FD_SR1_NW,
1851 0x00);
1852 goto transfer_error;
1853 }
1854
1855 k->read_memory(fdctrl->dma, nchan, fdctrl->fifo + rel_pos,
1856 fdctrl->data_pos, len);
1857 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv),
1858 fdctrl->fifo, BDRV_SECTOR_SIZE, 0) < 0) {
1859 FLOPPY_DPRINTF("error writing sector %d\n",
1860 fd_sector(cur_drv));
1861 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1862 goto transfer_error;
1863 }
1864 break;
1865 case FD_DIR_VERIFY:
1866 /* VERIFY commands */
1867 break;
1868 default:
1869 /* SCAN commands */
1870 {
1871 uint8_t tmpbuf[FD_SECTOR_LEN];
1872 int ret;
1873 k->read_memory(fdctrl->dma, nchan, tmpbuf, fdctrl->data_pos,
1874 len);
1875 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1876 if (ret == 0) {
1877 status2 = FD_SR2_SEH;
1878 goto end_transfer;
1879 }
1880 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1881 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1882 status2 = 0x00;
1883 goto end_transfer;
1884 }
1885 }
1886 break;
1887 }
1888 fdctrl->data_pos += len;
1889 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1890 if (rel_pos == 0) {
1891 /* Seek to next sector */
1892 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1893 break;
1894 }
1895 }
1896 end_transfer:
1897 len = fdctrl->data_pos - start_pos;
1898 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1899 fdctrl->data_pos, len, fdctrl->data_len);
1900 if (fdctrl->data_dir == FD_DIR_SCANE ||
1901 fdctrl->data_dir == FD_DIR_SCANL ||
1902 fdctrl->data_dir == FD_DIR_SCANH)
1903 status2 = FD_SR2_SEH;
1904 fdctrl->data_len -= len;
1905 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1906 transfer_error:
1907
1908 return len;
1909 }
1910
1911 /* Data register : 0x05 */
1912 static uint32_t fdctrl_read_data(FDCtrl *fdctrl)
1913 {
1914 FDrive *cur_drv;
1915 uint32_t retval = 0;
1916 uint32_t pos;
1917
1918 cur_drv = get_cur_drv(fdctrl);
1919 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1920 if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1921 FLOPPY_DPRINTF("error: controller not ready for reading\n");
1922 return 0;
1923 }
1924
1925 /* If data_len spans multiple sectors, the current position in the FIFO
1926 * wraps around while fdctrl->data_pos is the real position in the whole
1927 * request. */
1928 pos = fdctrl->data_pos;
1929 pos %= FD_SECTOR_LEN;
1930
1931 switch (fdctrl->phase) {
1932 case FD_PHASE_EXECUTION:
1933 assert(fdctrl->msr & FD_MSR_NONDMA);
1934 if (pos == 0) {
1935 if (fdctrl->data_pos != 0)
1936 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1937 FLOPPY_DPRINTF("error seeking to next sector %d\n",
1938 fd_sector(cur_drv));
1939 return 0;
1940 }
1941 if (blk_pread(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
1942 BDRV_SECTOR_SIZE)
1943 < 0) {
1944 FLOPPY_DPRINTF("error getting sector %d\n",
1945 fd_sector(cur_drv));
1946 /* Sure, image size is too small... */
1947 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1948 }
1949 }
1950
1951 if (++fdctrl->data_pos == fdctrl->data_len) {
1952 fdctrl->msr &= ~FD_MSR_RQM;
1953 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1954 }
1955 break;
1956
1957 case FD_PHASE_RESULT:
1958 assert(!(fdctrl->msr & FD_MSR_NONDMA));
1959 if (++fdctrl->data_pos == fdctrl->data_len) {
1960 fdctrl->msr &= ~FD_MSR_RQM;
1961 fdctrl_to_command_phase(fdctrl);
1962 fdctrl_reset_irq(fdctrl);
1963 }
1964 break;
1965
1966 case FD_PHASE_COMMAND:
1967 default:
1968 abort();
1969 }
1970
1971 retval = fdctrl->fifo[pos];
1972 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1973
1974 return retval;
1975 }
1976
1977 static void fdctrl_format_sector(FDCtrl *fdctrl)
1978 {
1979 FDrive *cur_drv;
1980 uint8_t kh, kt, ks;
1981
1982 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1983 cur_drv = get_cur_drv(fdctrl);
1984 kt = fdctrl->fifo[6];
1985 kh = fdctrl->fifo[7];
1986 ks = fdctrl->fifo[8];
1987 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1988 GET_CUR_DRV(fdctrl), kh, kt, ks,
1989 fd_sector_calc(kh, kt, ks, cur_drv->last_sect,
1990 NUM_SIDES(cur_drv)));
1991 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1992 case 2:
1993 /* sect too big */
1994 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1995 fdctrl->fifo[3] = kt;
1996 fdctrl->fifo[4] = kh;
1997 fdctrl->fifo[5] = ks;
1998 return;
1999 case 3:
2000 /* track too big */
2001 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
2002 fdctrl->fifo[3] = kt;
2003 fdctrl->fifo[4] = kh;
2004 fdctrl->fifo[5] = ks;
2005 return;
2006 case 4:
2007 /* No seek enabled */
2008 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2009 fdctrl->fifo[3] = kt;
2010 fdctrl->fifo[4] = kh;
2011 fdctrl->fifo[5] = ks;
2012 return;
2013 case 1:
2014 fdctrl->status0 |= FD_SR0_SEEK;
2015 break;
2016 default:
2017 break;
2018 }
2019 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
2020 if (cur_drv->blk == NULL ||
2021 blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
2022 BDRV_SECTOR_SIZE, 0) < 0) {
2023 FLOPPY_DPRINTF("error formatting sector %d\n", fd_sector(cur_drv));
2024 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
2025 } else {
2026 if (cur_drv->sect == cur_drv->last_sect) {
2027 fdctrl->data_state &= ~FD_STATE_FORMAT;
2028 /* Last sector done */
2029 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2030 } else {
2031 /* More to do */
2032 fdctrl->data_pos = 0;
2033 fdctrl->data_len = 4;
2034 }
2035 }
2036 }
2037
2038 static void fdctrl_handle_lock(FDCtrl *fdctrl, int direction)
2039 {
2040 fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
2041 fdctrl->fifo[0] = fdctrl->lock << 4;
2042 fdctrl_to_result_phase(fdctrl, 1);
2043 }
2044
2045 static void fdctrl_handle_dumpreg(FDCtrl *fdctrl, int direction)
2046 {
2047 FDrive *cur_drv = get_cur_drv(fdctrl);
2048
2049 /* Drives position */
2050 fdctrl->fifo[0] = drv0(fdctrl)->track;
2051 fdctrl->fifo[1] = drv1(fdctrl)->track;
2052 #if MAX_FD == 4
2053 fdctrl->fifo[2] = drv2(fdctrl)->track;
2054 fdctrl->fifo[3] = drv3(fdctrl)->track;
2055 #else
2056 fdctrl->fifo[2] = 0;
2057 fdctrl->fifo[3] = 0;
2058 #endif
2059 /* timers */
2060 fdctrl->fifo[4] = fdctrl->timer0;
2061 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
2062 fdctrl->fifo[6] = cur_drv->last_sect;
2063 fdctrl->fifo[7] = (fdctrl->lock << 7) |
2064 (cur_drv->perpendicular << 2);
2065 fdctrl->fifo[8] = fdctrl->config;
2066 fdctrl->fifo[9] = fdctrl->precomp_trk;
2067 fdctrl_to_result_phase(fdctrl, 10);
2068 }
2069
2070 static void fdctrl_handle_version(FDCtrl *fdctrl, int direction)
2071 {
2072 /* Controller's version */
2073 fdctrl->fifo[0] = fdctrl->version;
2074 fdctrl_to_result_phase(fdctrl, 1);
2075 }
2076
2077 static void fdctrl_handle_partid(FDCtrl *fdctrl, int direction)
2078 {
2079 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
2080 fdctrl_to_result_phase(fdctrl, 1);
2081 }
2082
2083 static void fdctrl_handle_restore(FDCtrl *fdctrl, int direction)
2084 {
2085 FDrive *cur_drv = get_cur_drv(fdctrl);
2086
2087 /* Drives position */
2088 drv0(fdctrl)->track = fdctrl->fifo[3];
2089 drv1(fdctrl)->track = fdctrl->fifo[4];
2090 #if MAX_FD == 4
2091 drv2(fdctrl)->track = fdctrl->fifo[5];
2092 drv3(fdctrl)->track = fdctrl->fifo[6];
2093 #endif
2094 /* timers */
2095 fdctrl->timer0 = fdctrl->fifo[7];
2096 fdctrl->timer1 = fdctrl->fifo[8];
2097 cur_drv->last_sect = fdctrl->fifo[9];
2098 fdctrl->lock = fdctrl->fifo[10] >> 7;
2099 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
2100 fdctrl->config = fdctrl->fifo[11];
2101 fdctrl->precomp_trk = fdctrl->fifo[12];
2102 fdctrl->pwrd = fdctrl->fifo[13];
2103 fdctrl_to_command_phase(fdctrl);
2104 }
2105
2106 static void fdctrl_handle_save(FDCtrl *fdctrl, int direction)
2107 {
2108 FDrive *cur_drv = get_cur_drv(fdctrl);
2109
2110 fdctrl->fifo[0] = 0;
2111 fdctrl->fifo[1] = 0;
2112 /* Drives position */
2113 fdctrl->fifo[2] = drv0(fdctrl)->track;
2114 fdctrl->fifo[3] = drv1(fdctrl)->track;
2115 #if MAX_FD == 4
2116 fdctrl->fifo[4] = drv2(fdctrl)->track;
2117 fdctrl->fifo[5] = drv3(fdctrl)->track;
2118 #else
2119 fdctrl->fifo[4] = 0;
2120 fdctrl->fifo[5] = 0;
2121 #endif
2122 /* timers */
2123 fdctrl->fifo[6] = fdctrl->timer0;
2124 fdctrl->fifo[7] = fdctrl->timer1;
2125 fdctrl->fifo[8] = cur_drv->last_sect;
2126 fdctrl->fifo[9] = (fdctrl->lock << 7) |
2127 (cur_drv->perpendicular << 2);
2128 fdctrl->fifo[10] = fdctrl->config;
2129 fdctrl->fifo[11] = fdctrl->precomp_trk;
2130 fdctrl->fifo[12] = fdctrl->pwrd;
2131 fdctrl->fifo[13] = 0;
2132 fdctrl->fifo[14] = 0;
2133 fdctrl_to_result_phase(fdctrl, 15);
2134 }
2135
2136 static void fdctrl_handle_readid(FDCtrl *fdctrl, int direction)
2137 {
2138 FDrive *cur_drv = get_cur_drv(fdctrl);
2139
2140 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2141 timer_mod(fdctrl->result_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
2142 (NANOSECONDS_PER_SECOND / 50));
2143 }
2144
2145 static void fdctrl_handle_format_track(FDCtrl *fdctrl, int direction)
2146 {
2147 FDrive *cur_drv;
2148
2149 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2150 cur_drv = get_cur_drv(fdctrl);
2151 fdctrl->data_state |= FD_STATE_FORMAT;
2152 if (fdctrl->fifo[0] & 0x80)
2153 fdctrl->data_state |= FD_STATE_MULTI;
2154 else
2155 fdctrl->data_state &= ~FD_STATE_MULTI;
2156 cur_drv->bps =
2157 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
2158 #if 0
2159 cur_drv->last_sect =
2160 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
2161 fdctrl->fifo[3] / 2;
2162 #else
2163 cur_drv->last_sect = fdctrl->fifo[3];
2164 #endif
2165 /* TODO: implement format using DMA expected by the Bochs BIOS
2166 * and Linux fdformat (read 3 bytes per sector via DMA and fill
2167 * the sector with the specified fill byte
2168 */
2169 fdctrl->data_state &= ~FD_STATE_FORMAT;
2170 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2171 }
2172
2173 static void fdctrl_handle_specify(FDCtrl *fdctrl, int direction)
2174 {
2175 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
2176 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
2177 if (fdctrl->fifo[2] & 1)
2178 fdctrl->dor &= ~FD_DOR_DMAEN;
2179 else
2180 fdctrl->dor |= FD_DOR_DMAEN;
2181 /* No result back */
2182 fdctrl_to_command_phase(fdctrl);
2183 }
2184
2185 static void fdctrl_handle_sense_drive_status(FDCtrl *fdctrl, int direction)
2186 {
2187 FDrive *cur_drv;
2188
2189 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2190 cur_drv = get_cur_drv(fdctrl);
2191 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2192 /* 1 Byte status back */
2193 fdctrl->fifo[0] = (cur_drv->ro << 6) |
2194 (cur_drv->track == 0 ? 0x10 : 0x00) |
2195 (cur_drv->head << 2) |
2196 GET_CUR_DRV(fdctrl) |
2197 0x28;
2198 fdctrl_to_result_phase(fdctrl, 1);
2199 }
2200
2201 static void fdctrl_handle_recalibrate(FDCtrl *fdctrl, int direction)
2202 {
2203 FDrive *cur_drv;
2204
2205 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2206 cur_drv = get_cur_drv(fdctrl);
2207 fd_recalibrate(cur_drv);
2208 fdctrl_to_command_phase(fdctrl);
2209 /* Raise Interrupt */
2210 fdctrl->status0 |= FD_SR0_SEEK;
2211 fdctrl_raise_irq(fdctrl);
2212 }
2213
2214 static void fdctrl_handle_sense_interrupt_status(FDCtrl *fdctrl, int direction)
2215 {
2216 FDrive *cur_drv = get_cur_drv(fdctrl);
2217
2218 if (fdctrl->reset_sensei > 0) {
2219 fdctrl->fifo[0] =
2220 FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
2221 fdctrl->reset_sensei--;
2222 } else if (!(fdctrl->sra & FD_SRA_INTPEND)) {
2223 fdctrl->fifo[0] = FD_SR0_INVCMD;
2224 fdctrl_to_result_phase(fdctrl, 1);
2225 return;
2226 } else {
2227 fdctrl->fifo[0] =
2228 (fdctrl->status0 & ~(FD_SR0_HEAD | FD_SR0_DS1 | FD_SR0_DS0))
2229 | GET_CUR_DRV(fdctrl);
2230 }
2231
2232 fdctrl->fifo[1] = cur_drv->track;
2233 fdctrl_to_result_phase(fdctrl, 2);
2234 fdctrl_reset_irq(fdctrl);
2235 fdctrl->status0 = FD_SR0_RDYCHG;
2236 }
2237
2238 static void fdctrl_handle_seek(FDCtrl *fdctrl, int direction)
2239 {
2240 FDrive *cur_drv;
2241
2242 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2243 cur_drv = get_cur_drv(fdctrl);
2244 fdctrl_to_command_phase(fdctrl);
2245 /* The seek command just sends step pulses to the drive and doesn't care if
2246 * there is a medium inserted of if it's banging the head against the drive.
2247 */
2248 fd_seek(cur_drv, cur_drv->head, fdctrl->fifo[2], cur_drv->sect, 1);
2249 /* Raise Interrupt */
2250 fdctrl->status0 |= FD_SR0_SEEK;
2251 fdctrl_raise_irq(fdctrl);
2252 }
2253
2254 static void fdctrl_handle_perpendicular_mode(FDCtrl *fdctrl, int direction)
2255 {
2256 FDrive *cur_drv = get_cur_drv(fdctrl);
2257
2258 if (fdctrl->fifo[1] & 0x80)
2259 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2260 /* No result back */
2261 fdctrl_to_command_phase(fdctrl);
2262 }
2263
2264 static void fdctrl_handle_configure(FDCtrl *fdctrl, int direction)
2265 {
2266 fdctrl->config = fdctrl->fifo[2];
2267 fdctrl->precomp_trk = fdctrl->fifo[3];
2268 /* No result back */
2269 fdctrl_to_command_phase(fdctrl);
2270 }
2271
2272 static void fdctrl_handle_powerdown_mode(FDCtrl *fdctrl, int direction)
2273 {
2274 fdctrl->pwrd = fdctrl->fifo[1];
2275 fdctrl->fifo[0] = fdctrl->fifo[1];
2276 fdctrl_to_result_phase(fdctrl, 1);
2277 }
2278
2279 static void fdctrl_handle_option(FDCtrl *fdctrl, int direction)
2280 {
2281 /* No result back */
2282 fdctrl_to_command_phase(fdctrl);
2283 }
2284
2285 static void fdctrl_handle_drive_specification_command(FDCtrl *fdctrl, int direction)
2286 {
2287 FDrive *cur_drv = get_cur_drv(fdctrl);
2288 uint32_t pos;
2289
2290 pos = fdctrl->data_pos - 1;
2291 pos %= FD_SECTOR_LEN;
2292 if (fdctrl->fifo[pos] & 0x80) {
2293 /* Command parameters done */
2294 if (fdctrl->fifo[pos] & 0x40) {
2295 fdctrl->fifo[0] = fdctrl->fifo[1];
2296 fdctrl->fifo[2] = 0;
2297 fdctrl->fifo[3] = 0;
2298 fdctrl_to_result_phase(fdctrl, 4);
2299 } else {
2300 fdctrl_to_command_phase(fdctrl);
2301 }
2302 } else if (fdctrl->data_len > 7) {
2303 /* ERROR */
2304 fdctrl->fifo[0] = 0x80 |
2305 (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
2306 fdctrl_to_result_phase(fdctrl, 1);
2307 }
2308 }
2309
2310 static void fdctrl_handle_relative_seek_in(FDCtrl *fdctrl, int direction)
2311 {
2312 FDrive *cur_drv;
2313
2314 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2315 cur_drv = get_cur_drv(fdctrl);
2316 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2317 fd_seek(cur_drv, cur_drv->head, cur_drv->max_track - 1,
2318 cur_drv->sect, 1);
2319 } else {
2320 fd_seek(cur_drv, cur_drv->head,
2321 cur_drv->track + fdctrl->fifo[2], cur_drv->sect, 1);
2322 }
2323 fdctrl_to_command_phase(fdctrl);
2324 /* Raise Interrupt */
2325 fdctrl->status0 |= FD_SR0_SEEK;
2326 fdctrl_raise_irq(fdctrl);
2327 }
2328
2329 static void fdctrl_handle_relative_seek_out(FDCtrl *fdctrl, int direction)
2330 {
2331 FDrive *cur_drv;
2332
2333 SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2334 cur_drv = get_cur_drv(fdctrl);
2335 if (fdctrl->fifo[2] > cur_drv->track) {
2336 fd_seek(cur_drv, cur_drv->head, 0, cur_drv->sect, 1);
2337 } else {
2338 fd_seek(cur_drv, cur_drv->head,
2339 cur_drv->track - fdctrl->fifo[2], cur_drv->sect, 1);
2340 }
2341 fdctrl_to_command_phase(fdctrl);
2342 /* Raise Interrupt */
2343 fdctrl->status0 |= FD_SR0_SEEK;
2344 fdctrl_raise_irq(fdctrl);
2345 }
2346
2347 /*
2348 * Handlers for the execution phase of each command
2349 */
2350 typedef struct FDCtrlCommand {
2351 uint8_t value;
2352 uint8_t mask;
2353 const char* name;
2354 int parameters;
2355 void (*handler)(FDCtrl *fdctrl, int direction);
2356 int direction;
2357 } FDCtrlCommand;
2358
2359 static const FDCtrlCommand handlers[] = {
2360 { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2361 { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2362 { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2363 { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2364 { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2365 { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2366 { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2367 { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2368 { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2369 { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2370 { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2371 { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_start_transfer, FD_DIR_VERIFY },
2372 { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2373 { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2374 { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2375 { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2376 { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2377 { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2378 { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2379 { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2380 { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2381 { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2382 { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
2383 { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2384 { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2385 { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2386 { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2387 { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2388 { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2389 { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2390 { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2391 { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2392 };
2393 /* Associate command to an index in the 'handlers' array */
2394 static uint8_t command_to_handler[256];
2395
2396 static const FDCtrlCommand *get_command(uint8_t cmd)
2397 {
2398 int idx;
2399
2400 idx = command_to_handler[cmd];
2401 FLOPPY_DPRINTF("%s command\n", handlers[idx].name);
2402 return &handlers[idx];
2403 }
2404
2405 static void fdctrl_write_data(FDCtrl *fdctrl, uint32_t value)
2406 {
2407 FDrive *cur_drv;
2408 const FDCtrlCommand *cmd;
2409 uint32_t pos;
2410
2411 /* Reset mode */
2412 if (!(fdctrl->dor & FD_DOR_nRESET)) {
2413 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2414 return;
2415 }
2416 if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
2417 FLOPPY_DPRINTF("error: controller not ready for writing\n");
2418 return;
2419 }
2420 fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2421
2422 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
2423
2424 /* If data_len spans multiple sectors, the current position in the FIFO
2425 * wraps around while fdctrl->data_pos is the real position in the whole
2426 * request. */
2427 pos = fdctrl->data_pos++;
2428 pos %= FD_SECTOR_LEN;
2429 fdctrl->fifo[pos] = value;
2430
2431 if (fdctrl->data_pos == fdctrl->data_len) {
2432 fdctrl->msr &= ~FD_MSR_RQM;
2433 }
2434
2435 switch (fdctrl->phase) {
2436 case FD_PHASE_EXECUTION:
2437 /* For DMA requests, RQM should be cleared during execution phase, so
2438 * we would have errored out above. */
2439 assert(fdctrl->msr & FD_MSR_NONDMA);
2440
2441 /* FIFO data write */
2442 if (pos == FD_SECTOR_LEN - 1 ||
2443 fdctrl->data_pos == fdctrl->data_len) {
2444 cur_drv = get_cur_drv(fdctrl);
2445 if (blk_pwrite(cur_drv->blk, fd_offset(cur_drv), fdctrl->fifo,
2446 BDRV_SECTOR_SIZE, 0) < 0) {
2447 FLOPPY_DPRINTF("error writing sector %d\n",
2448 fd_sector(cur_drv));
2449 break;
2450 }
2451 if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
2452 FLOPPY_DPRINTF("error seeking to next sector %d\n",
2453 fd_sector(cur_drv));
2454 break;
2455 }
2456 }
2457
2458 /* Switch to result phase when done with the transfer */
2459 if (fdctrl->data_pos == fdctrl->data_len) {
2460 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2461 }
2462 break;
2463
2464 case FD_PHASE_COMMAND:
2465 assert(!(fdctrl->msr & FD_MSR_NONDMA));
2466 assert(fdctrl->data_pos < FD_SECTOR_LEN);
2467
2468 if (pos == 0) {
2469 /* The first byte specifies the command. Now we start reading
2470 * as many parameters as this command requires. */
2471 cmd = get_command(value);
2472 fdctrl->data_len = cmd->parameters + 1;
2473 if (cmd->parameters) {
2474 fdctrl->msr |= FD_MSR_RQM;
2475 }
2476 fdctrl->msr |= FD_MSR_CMDBUSY;
2477 }
2478
2479 if (fdctrl->data_pos == fdctrl->data_len) {
2480 /* We have all parameters now, execute the command */
2481 fdctrl->phase = FD_PHASE_EXECUTION;
2482
2483 if (fdctrl->data_state & FD_STATE_FORMAT) {
2484 fdctrl_format_sector(fdctrl);
2485 break;
2486 }
2487
2488 cmd = get_command(fdctrl->fifo[0]);
2489 FLOPPY_DPRINTF("Calling handler for '%s'\n", cmd->name);
2490 cmd->handler(fdctrl, cmd->direction);
2491 }
2492 break;
2493
2494 case FD_PHASE_RESULT:
2495 default:
2496 abort();
2497 }
2498 }
2499
2500 static void fdctrl_result_timer(void *opaque)
2501 {
2502 FDCtrl *fdctrl = opaque;
2503 FDrive *cur_drv = get_cur_drv(fdctrl);
2504
2505 /* Pretend we are spinning.
2506 * This is needed for Coherent, which uses READ ID to check for
2507 * sector interleaving.
2508 */
2509 if (cur_drv->last_sect != 0) {
2510 cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2511 }
2512 /* READ_ID can't automatically succeed! */
2513 if (fdctrl->check_media_rate &&
2514 (fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2515 FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2516 fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2517 fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
2518 } else {
2519 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
2520 }
2521 }
2522
2523 /* Init functions */
2524 static void fdctrl_connect_drives(FDCtrl *fdctrl, DeviceState *fdc_dev,
2525 Error **errp)
2526 {
2527 unsigned int i;
2528 FDrive *drive;
2529 DeviceState *dev;
2530 BlockBackend *blk;
2531 Error *local_err = NULL;
2532
2533 for (i = 0; i < MAX_FD; i++) {
2534 drive = &fdctrl->drives[i];
2535 drive->fdctrl = fdctrl;
2536
2537 /* If the drive is not present, we skip creating the qdev device, but
2538 * still have to initialise the controller. */
2539 blk = fdctrl->qdev_for_drives[i].blk;
2540 if (!blk) {
2541 fd_init(drive);
2542 fd_revalidate(drive);
2543 continue;
2544 }
2545
2546 dev = qdev_create(&fdctrl->bus.bus, "floppy");
2547 qdev_prop_set_uint32(dev, "unit", i);
2548 qdev_prop_set_enum(dev, "drive-type", fdctrl->qdev_for_drives[i].type);
2549
2550 blk_ref(blk);
2551 blk_detach_dev(blk, fdc_dev);
2552 fdctrl->qdev_for_drives[i].blk = NULL;
2553 qdev_prop_set_drive(dev, "drive", blk, &local_err);
2554 blk_unref(blk);
2555
2556 if (local_err) {
2557 error_propagate(errp, local_err);
2558 return;
2559 }
2560
2561 object_property_set_bool(OBJECT(dev), true, "realized", &local_err);
2562 if (local_err) {
2563 error_propagate(errp, local_err);
2564 return;
2565 }
2566 }
2567 }
2568
2569 ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds)
2570 {
2571 DeviceState *dev;
2572 ISADevice *isadev;
2573
2574 isadev = isa_try_create(bus, TYPE_ISA_FDC);
2575 if (!isadev) {
2576 return NULL;
2577 }
2578 dev = DEVICE(isadev);
2579
2580 if (fds[0]) {
2581 qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fds[0]),
2582 &error_fatal);
2583 }
2584 if (fds[1]) {
2585 qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]),
2586 &error_fatal);
2587 }
2588 qdev_init_nofail(dev);
2589
2590 return isadev;
2591 }
2592
2593 void fdctrl_init_sysbus(qemu_irq irq, int dma_chann,
2594 hwaddr mmio_base, DriveInfo **fds)
2595 {
2596 FDCtrl *fdctrl;
2597 DeviceState *dev;
2598 SysBusDevice *sbd;
2599 FDCtrlSysBus *sys;
2600
2601 dev = qdev_create(NULL, "sysbus-fdc");
2602 sys = SYSBUS_FDC(dev);
2603 fdctrl = &sys->state;
2604 fdctrl->dma_chann = dma_chann; /* FIXME */
2605 if (fds[0]) {
2606 qdev_prop_set_drive(dev, "driveA", blk_by_legacy_dinfo(fds[0]),
2607 &error_fatal);
2608 }
2609 if (fds[1]) {
2610 qdev_prop_set_drive(dev, "driveB", blk_by_legacy_dinfo(fds[1]),
2611 &error_fatal);
2612 }
2613 qdev_init_nofail(dev);
2614 sbd = SYS_BUS_DEVICE(dev);
2615 sysbus_connect_irq(sbd, 0, irq);
2616 sysbus_mmio_map(sbd, 0, mmio_base);
2617 }
2618
2619 void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
2620 DriveInfo **fds, qemu_irq *fdc_tc)
2621 {
2622 DeviceState *dev;
2623 FDCtrlSysBus *sys;
2624
2625 dev = qdev_create(NULL, "SUNW,fdtwo");
2626 if (fds[0]) {
2627 qdev_prop_set_drive(dev, "drive", blk_by_legacy_dinfo(fds[0]),
2628 &error_fatal);
2629 }
2630 qdev_init_nofail(dev);
2631 sys = SYSBUS_FDC(dev);
2632 sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);
2633 sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);
2634 *fdc_tc = qdev_get_gpio_in(dev, 0);
2635 }
2636
2637 static void fdctrl_realize_common(DeviceState *dev, FDCtrl *fdctrl,
2638 Error **errp)
2639 {
2640 int i, j;
2641 static int command_tables_inited = 0;
2642
2643 if (fdctrl->fallback == FLOPPY_DRIVE_TYPE_AUTO) {
2644 error_setg(errp, "Cannot choose a fallback FDrive type of 'auto'");
2645 }
2646
2647 /* Fill 'command_to_handler' lookup table */
2648 if (!command_tables_inited) {
2649 command_tables_inited = 1;
2650 for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
2651 for (j = 0; j < sizeof(command_to_handler); j++) {
2652 if ((j & handlers[i].mask) == handlers[i].value) {
2653 command_to_handler[j] = i;
2654 }
2655 }
2656 }
2657 }
2658
2659 FLOPPY_DPRINTF("init controller\n");
2660 fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
2661 fdctrl->fifo_size = 512;
2662 fdctrl->result_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL,
2663 fdctrl_result_timer, fdctrl);
2664
2665 fdctrl->version = 0x90; /* Intel 82078 controller */
2666 fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2667 fdctrl->num_floppies = MAX_FD;
2668
2669 if (fdctrl->dma_chann != -1) {
2670 IsaDmaClass *k;
2671 assert(fdctrl->dma);
2672 k = ISADMA_GET_CLASS(fdctrl->dma);
2673 k->register_channel(fdctrl->dma, fdctrl->dma_chann,
2674 &fdctrl_transfer_handler, fdctrl);
2675 }
2676
2677 floppy_bus_create(fdctrl, &fdctrl->bus, dev);
2678 fdctrl_connect_drives(fdctrl, dev, errp);
2679 }
2680
2681 static const MemoryRegionPortio fdc_portio_list[] = {
2682 { 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
2683 { 7, 1, 1, .read = fdctrl_read, .write = fdctrl_write },
2684 PORTIO_END_OF_LIST(),
2685 };
2686
2687 static void isabus_fdc_realize(DeviceState *dev, Error **errp)
2688 {
2689 ISADevice *isadev = ISA_DEVICE(dev);
2690 FDCtrlISABus *isa = ISA_FDC(dev);
2691 FDCtrl *fdctrl = &isa->state;
2692 Error *err = NULL;
2693
2694 isa_register_portio_list(isadev, &fdctrl->portio_list,
2695 isa->iobase, fdc_portio_list, fdctrl,
2696 "fdc");
2697
2698 isa_init_irq(isadev, &fdctrl->irq, isa->irq);
2699 fdctrl->dma_chann = isa->dma;
2700 if (fdctrl->dma_chann != -1) {
2701 fdctrl->dma = isa_get_dma(isa_bus_from_device(isadev), isa->dma);
2702 assert(fdctrl->dma);
2703 }
2704
2705 qdev_set_legacy_instance_id(dev, isa->iobase, 2);
2706 fdctrl_realize_common(dev, fdctrl, &err);
2707 if (err != NULL) {
2708 error_propagate(errp, err);
2709 return;
2710 }
2711 }
2712
2713 static void sysbus_fdc_initfn(Object *obj)
2714 {
2715 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
2716 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2717 FDCtrl *fdctrl = &sys->state;
2718
2719 fdctrl->dma_chann = -1;
2720
2721 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_ops, fdctrl,
2722 "fdc", 0x08);
2723 sysbus_init_mmio(sbd, &fdctrl->iomem);
2724 }
2725
2726 static void sun4m_fdc_initfn(Object *obj)
2727 {
2728 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
2729 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2730 FDCtrl *fdctrl = &sys->state;
2731
2732 fdctrl->dma_chann = -1;
2733
2734 memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_strict_ops,
2735 fdctrl, "fdctrl", 0x08);
2736 sysbus_init_mmio(sbd, &fdctrl->iomem);
2737 }
2738
2739 static void sysbus_fdc_common_initfn(Object *obj)
2740 {
2741 DeviceState *dev = DEVICE(obj);
2742 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
2743 FDCtrlSysBus *sys = SYSBUS_FDC(obj);
2744 FDCtrl *fdctrl = &sys->state;
2745
2746 qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */
2747
2748 sysbus_init_irq(sbd, &fdctrl->irq);
2749 qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);
2750 }
2751
2752 static void sysbus_fdc_common_realize(DeviceState *dev, Error **errp)
2753 {
2754 FDCtrlSysBus *sys = SYSBUS_FDC(dev);
2755 FDCtrl *fdctrl = &sys->state;
2756
2757 fdctrl_realize_common(dev, fdctrl, errp);
2758 }
2759
2760 FloppyDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i)
2761 {
2762 FDCtrlISABus *isa = ISA_FDC(fdc);
2763
2764 return isa->state.drives[i].drive;
2765 }
2766
2767 void isa_fdc_get_drive_max_chs(FloppyDriveType type,
2768 uint8_t *maxc, uint8_t *maxh, uint8_t *maxs)
2769 {
2770 const FDFormat *fdf;
2771
2772 *maxc = *maxh = *maxs = 0;
2773 for (fdf = fd_formats; fdf->drive != FLOPPY_DRIVE_TYPE_NONE; fdf++) {
2774 if (fdf->drive != type) {
2775 continue;
2776 }
2777 if (*maxc < fdf->max_track) {
2778 *maxc = fdf->max_track;
2779 }
2780 if (*maxh < fdf->max_head) {
2781 *maxh = fdf->max_head;
2782 }
2783 if (*maxs < fdf->last_sect) {
2784 *maxs = fdf->last_sect;
2785 }
2786 }
2787 (*maxc)--;
2788 }
2789
2790 static const VMStateDescription vmstate_isa_fdc ={
2791 .name = "fdc",
2792 .version_id = 2,
2793 .minimum_version_id = 2,
2794 .fields = (VMStateField[]) {
2795 VMSTATE_STRUCT(state, FDCtrlISABus, 0, vmstate_fdc, FDCtrl),
2796 VMSTATE_END_OF_LIST()
2797 }
2798 };
2799
2800 static Property isa_fdc_properties[] = {
2801 DEFINE_PROP_UINT32("iobase", FDCtrlISABus, iobase, 0x3f0),
2802 DEFINE_PROP_UINT32("irq", FDCtrlISABus, irq, 6),
2803 DEFINE_PROP_UINT32("dma", FDCtrlISABus, dma, 2),
2804 DEFINE_PROP_DRIVE("driveA", FDCtrlISABus, state.qdev_for_drives[0].blk),
2805 DEFINE_PROP_DRIVE("driveB", FDCtrlISABus, state.qdev_for_drives[1].blk),
2806 DEFINE_PROP_BIT("check_media_rate", FDCtrlISABus, state.check_media_rate,
2807 0, true),
2808 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlISABus, state.qdev_for_drives[0].type,
2809 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2810 FloppyDriveType),
2811 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlISABus, state.qdev_for_drives[1].type,
2812 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2813 FloppyDriveType),
2814 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2815 FLOPPY_DRIVE_TYPE_288, qdev_prop_fdc_drive_type,
2816 FloppyDriveType),
2817 DEFINE_PROP_END_OF_LIST(),
2818 };
2819
2820 static void isabus_fdc_class_init(ObjectClass *klass, void *data)
2821 {
2822 DeviceClass *dc = DEVICE_CLASS(klass);
2823
2824 dc->realize = isabus_fdc_realize;
2825 dc->fw_name = "fdc";
2826 dc->reset = fdctrl_external_reset_isa;
2827 dc->vmsd = &vmstate_isa_fdc;
2828 dc->props = isa_fdc_properties;
2829 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2830 }
2831
2832 static void isabus_fdc_instance_init(Object *obj)
2833 {
2834 FDCtrlISABus *isa = ISA_FDC(obj);
2835
2836 device_add_bootindex_property(obj, &isa->bootindexA,
2837 "bootindexA", "/floppy@0",
2838 DEVICE(obj), NULL);
2839 device_add_bootindex_property(obj, &isa->bootindexB,
2840 "bootindexB", "/floppy@1",
2841 DEVICE(obj), NULL);
2842 }
2843
2844 static const TypeInfo isa_fdc_info = {
2845 .name = TYPE_ISA_FDC,
2846 .parent = TYPE_ISA_DEVICE,
2847 .instance_size = sizeof(FDCtrlISABus),
2848 .class_init = isabus_fdc_class_init,
2849 .instance_init = isabus_fdc_instance_init,
2850 };
2851
2852 static const VMStateDescription vmstate_sysbus_fdc ={
2853 .name = "fdc",
2854 .version_id = 2,
2855 .minimum_version_id = 2,
2856 .fields = (VMStateField[]) {
2857 VMSTATE_STRUCT(state, FDCtrlSysBus, 0, vmstate_fdc, FDCtrl),
2858 VMSTATE_END_OF_LIST()
2859 }
2860 };
2861
2862 static Property sysbus_fdc_properties[] = {
2863 DEFINE_PROP_DRIVE("driveA", FDCtrlSysBus, state.qdev_for_drives[0].blk),
2864 DEFINE_PROP_DRIVE("driveB", FDCtrlSysBus, state.qdev_for_drives[1].blk),
2865 DEFINE_PROP_SIGNED("fdtypeA", FDCtrlSysBus, state.qdev_for_drives[0].type,
2866 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2867 FloppyDriveType),
2868 DEFINE_PROP_SIGNED("fdtypeB", FDCtrlSysBus, state.qdev_for_drives[1].type,
2869 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2870 FloppyDriveType),
2871 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2872 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
2873 FloppyDriveType),
2874 DEFINE_PROP_END_OF_LIST(),
2875 };
2876
2877 static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
2878 {
2879 DeviceClass *dc = DEVICE_CLASS(klass);
2880
2881 dc->props = sysbus_fdc_properties;
2882 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2883 }
2884
2885 static const TypeInfo sysbus_fdc_info = {
2886 .name = "sysbus-fdc",
2887 .parent = TYPE_SYSBUS_FDC,
2888 .instance_init = sysbus_fdc_initfn,
2889 .class_init = sysbus_fdc_class_init,
2890 };
2891
2892 static Property sun4m_fdc_properties[] = {
2893 DEFINE_PROP_DRIVE("drive", FDCtrlSysBus, state.qdev_for_drives[0].blk),
2894 DEFINE_PROP_SIGNED("fdtype", FDCtrlSysBus, state.qdev_for_drives[0].type,
2895 FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
2896 FloppyDriveType),
2897 DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
2898 FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
2899 FloppyDriveType),
2900 DEFINE_PROP_END_OF_LIST(),
2901 };
2902
2903 static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
2904 {
2905 DeviceClass *dc = DEVICE_CLASS(klass);
2906
2907 dc->props = sun4m_fdc_properties;
2908 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
2909 }
2910
2911 static const TypeInfo sun4m_fdc_info = {
2912 .name = "SUNW,fdtwo",
2913 .parent = TYPE_SYSBUS_FDC,
2914 .instance_init = sun4m_fdc_initfn,
2915 .class_init = sun4m_fdc_class_init,
2916 };
2917
2918 static void sysbus_fdc_common_class_init(ObjectClass *klass, void *data)
2919 {
2920 DeviceClass *dc = DEVICE_CLASS(klass);
2921
2922 dc->realize = sysbus_fdc_common_realize;
2923 dc->reset = fdctrl_external_reset_sysbus;
2924 dc->vmsd = &vmstate_sysbus_fdc;
2925 }
2926
2927 static const TypeInfo sysbus_fdc_type_info = {
2928 .name = TYPE_SYSBUS_FDC,
2929 .parent = TYPE_SYS_BUS_DEVICE,
2930 .instance_size = sizeof(FDCtrlSysBus),
2931 .instance_init = sysbus_fdc_common_initfn,
2932 .abstract = true,
2933 .class_init = sysbus_fdc_common_class_init,
2934 };
2935
2936 static void fdc_register_types(void)
2937 {
2938 type_register_static(&isa_fdc_info);
2939 type_register_static(&sysbus_fdc_type_info);
2940 type_register_static(&sysbus_fdc_info);
2941 type_register_static(&sun4m_fdc_info);
2942 type_register_static(&floppy_bus_info);
2943 type_register_static(&floppy_drive_info);
2944 }
2945
2946 type_init(fdc_register_types)
AR7 emulation for QEMU