target-alpha/gdbstub.c

   1 /*
   2  * Alpha gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  * Copyright (c) 2013 SUSE LINUX Products GmbH
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #include "qemu/osdep.h"
  21 #include "qemu-common.h"
  22 #include "cpu.h"
  23 #include "exec/gdbstub.h"
  24
  25 int alpha_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n)
  26 {
  27     AlphaCPU *cpu = ALPHA_CPU(cs);
  28     CPUAlphaState *env = &cpu->env;
  29     uint64_t val;
  30     CPU_DoubleU d;
  31
  32     switch (n) {
  33     case 0 ... 30:
  34         val = cpu_alpha_load_gr(env, n);
  35         break;
  36     case 32 ... 62:
  37         d.d = env->fir[n - 32];
  38         val = d.ll;
  39         break;
  40     case 63:
  41         val = cpu_alpha_load_fpcr(env);
  42         break;
  43     case 64:
  44         val = env->pc;
  45         break;
  46     case 66:
  47         val = env->unique;
  48         break;
  49     case 31:
  50     case 65:
  51         /* 31 really is the zero register; 65 is unassigned in the
  52            gdb protocol, but is still required to occupy 8 bytes. */
  53         val = 0;
  54         break;
  55     default:
  56         return 0;
  57     }
  58     return gdb_get_regl(mem_buf, val);
  59 }
  60
  61 int alpha_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
  62 {
  63     AlphaCPU *cpu = ALPHA_CPU(cs);
  64     CPUAlphaState *env = &cpu->env;
  65     target_ulong tmp = ldtul_p(mem_buf);
  66     CPU_DoubleU d;
  67
  68     switch (n) {
  69     case 0 ... 30:
  70         cpu_alpha_store_gr(env, n, tmp);
  71         break;
  72     case 32 ... 62:
  73         d.ll = tmp;
  74         env->fir[n - 32] = d.d;
  75         break;
  76     case 63:
  77         cpu_alpha_store_fpcr(env, tmp);
  78         break;
  79     case 64:
  80         env->pc = tmp;
  81         break;
  82     case 66:
  83         env->unique = tmp;
  84         break;
  85     case 31:
  86     case 65:
  87         /* 31 really is the zero register; 65 is unassigned in the
  88            gdb protocol, but is still required to occupy 8 bytes. */
  89         break;
  90     default:
  91         return 0;
  92     }
  93     return 8;
  94 }