2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "sysemu/sysemu.h"
28 #include "sysemu/numa.h"
30 #include "hw/fw-path-provider.h"
33 #include "sysemu/block-backend.h"
34 #include "sysemu/cpus.h"
35 #include "sysemu/kvm.h"
37 #include "mmu-hash64.h"
40 #include "hw/boards.h"
41 #include "hw/ppc/ppc.h"
42 #include "hw/loader.h"
44 #include "hw/ppc/spapr.h"
45 #include "hw/ppc/spapr_vio.h"
46 #include "hw/pci-host/spapr.h"
47 #include "hw/ppc/xics.h"
48 #include "hw/pci/msi.h"
50 #include "hw/pci/pci.h"
51 #include "hw/scsi/scsi.h"
52 #include "hw/virtio/virtio-scsi.h"
54 #include "exec/address-spaces.h"
56 #include "qemu/config-file.h"
57 #include "qemu/error-report.h"
61 #include "hw/compat.h"
65 /* SLOF memory layout:
67 * SLOF raw image loaded at 0, copies its romfs right below the flat
68 * device-tree, then position SLOF itself 31M below that
70 * So we set FW_OVERHEAD to 40MB which should account for all of that
73 * We load our kernel at 4M, leaving space for SLOF initial image
75 #define FDT_MAX_SIZE 0x40000
76 #define RTAS_MAX_SIZE 0x10000
77 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
78 #define FW_MAX_SIZE 0x400000
79 #define FW_FILE_NAME "slof.bin"
80 #define FW_OVERHEAD 0x2800000
81 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
83 #define MIN_RMA_SLOF 128UL
85 #define TIMEBASE_FREQ 512000000ULL
89 #define PHANDLE_XICP 0x00001111
91 #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift))
93 typedef struct sPAPRMachineState sPAPRMachineState
;
95 #define TYPE_SPAPR_MACHINE "spapr-machine"
96 #define SPAPR_MACHINE(obj) \
97 OBJECT_CHECK(sPAPRMachineState, (obj), TYPE_SPAPR_MACHINE)
102 struct sPAPRMachineState
{
104 MachineState parent_obj
;
110 sPAPREnvironment
*spapr
;
112 static XICSState
*try_create_xics(const char *type
, int nr_servers
,
113 int nr_irqs
, Error
**errp
)
118 dev
= qdev_create(NULL
, type
);
119 qdev_prop_set_uint32(dev
, "nr_servers", nr_servers
);
120 qdev_prop_set_uint32(dev
, "nr_irqs", nr_irqs
);
121 object_property_set_bool(OBJECT(dev
), true, "realized", &err
);
123 error_propagate(errp
, err
);
124 object_unparent(OBJECT(dev
));
127 return XICS_COMMON(dev
);
130 static XICSState
*xics_system_init(MachineState
*machine
,
131 int nr_servers
, int nr_irqs
)
133 XICSState
*icp
= NULL
;
138 if (machine_kernel_irqchip_allowed(machine
)) {
139 icp
= try_create_xics(TYPE_KVM_XICS
, nr_servers
, nr_irqs
, &err
);
141 if (machine_kernel_irqchip_required(machine
) && !icp
) {
142 error_report("kernel_irqchip requested but unavailable: %s",
143 error_get_pretty(err
));
148 icp
= try_create_xics(TYPE_XICS
, nr_servers
, nr_irqs
, &error_abort
);
154 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
158 uint32_t servers_prop
[smt_threads
];
159 uint32_t gservers_prop
[smt_threads
* 2];
160 int index
= ppc_get_vcpu_dt_id(cpu
);
162 if (cpu
->cpu_version
) {
163 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->cpu_version
);
169 /* Build interrupt servers and gservers properties */
170 for (i
= 0; i
< smt_threads
; i
++) {
171 servers_prop
[i
] = cpu_to_be32(index
+ i
);
172 /* Hack, direct the group queues back to cpu 0 */
173 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
174 gservers_prop
[i
*2 + 1] = 0;
176 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
177 servers_prop
, sizeof(servers_prop
));
181 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
182 gservers_prop
, sizeof(gservers_prop
));
187 static int spapr_fixup_cpu_dt(void *fdt
, sPAPREnvironment
*spapr
)
189 int ret
= 0, offset
, cpus_offset
;
192 int smt
= kvmppc_smt_threads();
193 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
196 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
197 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
198 int index
= ppc_get_vcpu_dt_id(cpu
);
199 uint32_t associativity
[] = {cpu_to_be32(0x5),
203 cpu_to_be32(cs
->numa_node
),
206 if ((index
% smt
) != 0) {
210 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
212 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
213 if (cpus_offset
< 0) {
214 cpus_offset
= fdt_add_subnode(fdt
, fdt_path_offset(fdt
, "/"),
216 if (cpus_offset
< 0) {
220 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
222 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
228 if (nb_numa_nodes
> 1) {
229 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
230 sizeof(associativity
));
236 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
237 pft_size_prop
, sizeof(pft_size_prop
));
242 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
,
243 ppc_get_compat_smt_threads(cpu
));
252 static size_t create_page_sizes_prop(CPUPPCState
*env
, uint32_t *prop
,
255 size_t maxcells
= maxsize
/ sizeof(uint32_t);
259 for (i
= 0; i
< PPC_PAGE_SIZES_MAX_SZ
; i
++) {
260 struct ppc_one_seg_page_size
*sps
= &env
->sps
.sps
[i
];
262 if (!sps
->page_shift
) {
265 for (count
= 0; count
< PPC_PAGE_SIZES_MAX_SZ
; count
++) {
266 if (sps
->enc
[count
].page_shift
== 0) {
270 if ((p
- prop
) >= (maxcells
- 3 - count
* 2)) {
273 *(p
++) = cpu_to_be32(sps
->page_shift
);
274 *(p
++) = cpu_to_be32(sps
->slb_enc
);
275 *(p
++) = cpu_to_be32(count
);
276 for (j
= 0; j
< count
; j
++) {
277 *(p
++) = cpu_to_be32(sps
->enc
[j
].page_shift
);
278 *(p
++) = cpu_to_be32(sps
->enc
[j
].pte_enc
);
282 return (p
- prop
) * sizeof(uint32_t);
285 static hwaddr
spapr_node0_size(void)
289 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
290 if (numa_info
[i
].node_mem
) {
291 return MIN(pow2floor(numa_info
[i
].node_mem
), ram_size
);
302 fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
303 #exp, fdt_strerror(ret)); \
308 static void add_str(GString
*s
, const gchar
*s1
)
310 g_string_append_len(s
, s1
, strlen(s1
) + 1);
313 static void *spapr_create_fdt_skel(hwaddr initrd_base
,
317 const char *kernel_cmdline
,
322 uint32_t start_prop
= cpu_to_be32(initrd_base
);
323 uint32_t end_prop
= cpu_to_be32(initrd_base
+ initrd_size
);
324 GString
*hypertas
= g_string_sized_new(256);
325 GString
*qemu_hypertas
= g_string_sized_new(256);
326 uint32_t refpoints
[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)};
327 uint32_t interrupt_server_ranges_prop
[] = {0, cpu_to_be32(smp_cpus
)};
328 int smt
= kvmppc_smt_threads();
329 unsigned char vec5
[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80};
330 QemuOpts
*opts
= qemu_opts_find(qemu_find_opts("smp-opts"), NULL
);
331 unsigned sockets
= opts
? qemu_opt_get_number(opts
, "sockets", 0) : 0;
332 uint32_t cpus_per_socket
= sockets
? (smp_cpus
/ sockets
) : 1;
335 add_str(hypertas
, "hcall-pft");
336 add_str(hypertas
, "hcall-term");
337 add_str(hypertas
, "hcall-dabr");
338 add_str(hypertas
, "hcall-interrupt");
339 add_str(hypertas
, "hcall-tce");
340 add_str(hypertas
, "hcall-vio");
341 add_str(hypertas
, "hcall-splpar");
342 add_str(hypertas
, "hcall-bulk");
343 add_str(hypertas
, "hcall-set-mode");
344 add_str(qemu_hypertas
, "hcall-memop1");
346 fdt
= g_malloc0(FDT_MAX_SIZE
);
347 _FDT((fdt_create(fdt
, FDT_MAX_SIZE
)));
350 _FDT((fdt_add_reservemap_entry(fdt
, KERNEL_LOAD_ADDR
, kernel_size
)));
353 _FDT((fdt_add_reservemap_entry(fdt
, initrd_base
, initrd_size
)));
355 _FDT((fdt_finish_reservemap(fdt
)));
358 _FDT((fdt_begin_node(fdt
, "")));
359 _FDT((fdt_property_string(fdt
, "device_type", "chrp")));
360 _FDT((fdt_property_string(fdt
, "model", "IBM pSeries (emulated by qemu)")));
361 _FDT((fdt_property_string(fdt
, "compatible", "qemu,pseries")));
364 * Add info to guest to indentify which host is it being run on
365 * and what is the uuid of the guest
367 if (kvmppc_get_host_model(&buf
)) {
368 _FDT((fdt_property_string(fdt
, "host-model", buf
)));
371 if (kvmppc_get_host_serial(&buf
)) {
372 _FDT((fdt_property_string(fdt
, "host-serial", buf
)));
376 buf
= g_strdup_printf(UUID_FMT
, qemu_uuid
[0], qemu_uuid
[1],
377 qemu_uuid
[2], qemu_uuid
[3], qemu_uuid
[4],
378 qemu_uuid
[5], qemu_uuid
[6], qemu_uuid
[7],
379 qemu_uuid
[8], qemu_uuid
[9], qemu_uuid
[10],
380 qemu_uuid
[11], qemu_uuid
[12], qemu_uuid
[13],
381 qemu_uuid
[14], qemu_uuid
[15]);
383 _FDT((fdt_property_string(fdt
, "vm,uuid", buf
)));
386 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x2)));
387 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x2)));
390 _FDT((fdt_begin_node(fdt
, "chosen")));
392 /* Set Form1_affinity */
393 _FDT((fdt_property(fdt
, "ibm,architecture-vec-5", vec5
, sizeof(vec5
))));
395 _FDT((fdt_property_string(fdt
, "bootargs", kernel_cmdline
)));
396 _FDT((fdt_property(fdt
, "linux,initrd-start",
397 &start_prop
, sizeof(start_prop
))));
398 _FDT((fdt_property(fdt
, "linux,initrd-end",
399 &end_prop
, sizeof(end_prop
))));
401 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
402 cpu_to_be64(kernel_size
) };
404 _FDT((fdt_property(fdt
, "qemu,boot-kernel", &kprop
, sizeof(kprop
))));
406 _FDT((fdt_property(fdt
, "qemu,boot-kernel-le", NULL
, 0)));
410 _FDT((fdt_property_cell(fdt
, "qemu,boot-menu", boot_menu
)));
412 _FDT((fdt_property_cell(fdt
, "qemu,graphic-width", graphic_width
)));
413 _FDT((fdt_property_cell(fdt
, "qemu,graphic-height", graphic_height
)));
414 _FDT((fdt_property_cell(fdt
, "qemu,graphic-depth", graphic_depth
)));
416 _FDT((fdt_end_node(fdt
)));
419 _FDT((fdt_begin_node(fdt
, "cpus")));
421 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
422 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
425 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
426 CPUPPCState
*env
= &cpu
->env
;
427 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
428 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
429 int index
= ppc_get_vcpu_dt_id(cpu
);
431 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
432 0xffffffff, 0xffffffff};
433 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ
;
434 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
435 uint32_t page_sizes_prop
[64];
436 size_t page_sizes_prop_size
;
438 if ((index
% smt
) != 0) {
442 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
444 _FDT((fdt_begin_node(fdt
, nodename
)));
448 _FDT((fdt_property_cell(fdt
, "reg", index
)));
449 _FDT((fdt_property_string(fdt
, "device_type", "cpu")));
451 _FDT((fdt_property_cell(fdt
, "cpu-version", env
->spr
[SPR_PVR
])));
452 _FDT((fdt_property_cell(fdt
, "d-cache-block-size",
453 env
->dcache_line_size
)));
454 _FDT((fdt_property_cell(fdt
, "d-cache-line-size",
455 env
->dcache_line_size
)));
456 _FDT((fdt_property_cell(fdt
, "i-cache-block-size",
457 env
->icache_line_size
)));
458 _FDT((fdt_property_cell(fdt
, "i-cache-line-size",
459 env
->icache_line_size
)));
461 if (pcc
->l1_dcache_size
) {
462 _FDT((fdt_property_cell(fdt
, "d-cache-size", pcc
->l1_dcache_size
)));
464 fprintf(stderr
, "Warning: Unknown L1 dcache size for cpu\n");
466 if (pcc
->l1_icache_size
) {
467 _FDT((fdt_property_cell(fdt
, "i-cache-size", pcc
->l1_icache_size
)));
469 fprintf(stderr
, "Warning: Unknown L1 icache size for cpu\n");
472 _FDT((fdt_property_cell(fdt
, "timebase-frequency", tbfreq
)));
473 _FDT((fdt_property_cell(fdt
, "clock-frequency", cpufreq
)));
474 _FDT((fdt_property_cell(fdt
, "ibm,slb-size", env
->slb_nr
)));
475 _FDT((fdt_property_string(fdt
, "status", "okay")));
476 _FDT((fdt_property(fdt
, "64-bit", NULL
, 0)));
478 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
479 _FDT((fdt_property(fdt
, "ibm,purr", NULL
, 0)));
482 if (env
->mmu_model
& POWERPC_MMU_1TSEG
) {
483 _FDT((fdt_property(fdt
, "ibm,processor-segment-sizes",
484 segs
, sizeof(segs
))));
487 /* Advertise VMX/VSX (vector extensions) if available
488 * 0 / no property == no vector extensions
489 * 1 == VMX / Altivec available
490 * 2 == VSX available */
491 if (env
->insns_flags
& PPC_ALTIVEC
) {
492 uint32_t vmx
= (env
->insns_flags2
& PPC2_VSX
) ? 2 : 1;
494 _FDT((fdt_property_cell(fdt
, "ibm,vmx", vmx
)));
497 /* Advertise DFP (Decimal Floating Point) if available
498 * 0 / no property == no DFP
499 * 1 == DFP available */
500 if (env
->insns_flags2
& PPC2_DFP
) {
501 _FDT((fdt_property_cell(fdt
, "ibm,dfp", 1)));
504 page_sizes_prop_size
= create_page_sizes_prop(env
, page_sizes_prop
,
505 sizeof(page_sizes_prop
));
506 if (page_sizes_prop_size
) {
507 _FDT((fdt_property(fdt
, "ibm,segment-page-sizes",
508 page_sizes_prop
, page_sizes_prop_size
)));
511 _FDT((fdt_property_cell(fdt
, "ibm,chip-id",
512 cs
->cpu_index
/ cpus_per_socket
)));
514 _FDT((fdt_end_node(fdt
)));
517 _FDT((fdt_end_node(fdt
)));
520 _FDT((fdt_begin_node(fdt
, "rtas")));
522 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
523 add_str(hypertas
, "hcall-multi-tce");
525 _FDT((fdt_property(fdt
, "ibm,hypertas-functions", hypertas
->str
,
527 g_string_free(hypertas
, TRUE
);
528 _FDT((fdt_property(fdt
, "qemu,hypertas-functions", qemu_hypertas
->str
,
529 qemu_hypertas
->len
)));
530 g_string_free(qemu_hypertas
, TRUE
);
532 _FDT((fdt_property(fdt
, "ibm,associativity-reference-points",
533 refpoints
, sizeof(refpoints
))));
535 _FDT((fdt_property_cell(fdt
, "rtas-error-log-max", RTAS_ERROR_LOG_MAX
)));
536 _FDT((fdt_property_cell(fdt
, "rtas-event-scan-rate",
537 RTAS_EVENT_SCAN_RATE
)));
540 * According to PAPR, rtas ibm,os-term does not guarantee a return
541 * back to the guest cpu.
543 * While an additional ibm,extended-os-term property indicates that
544 * rtas call return will always occur. Set this property.
546 _FDT((fdt_property(fdt
, "ibm,extended-os-term", NULL
, 0)));
548 _FDT((fdt_end_node(fdt
)));
550 /* interrupt controller */
551 _FDT((fdt_begin_node(fdt
, "interrupt-controller")));
553 _FDT((fdt_property_string(fdt
, "device_type",
554 "PowerPC-External-Interrupt-Presentation")));
555 _FDT((fdt_property_string(fdt
, "compatible", "IBM,ppc-xicp")));
556 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
557 _FDT((fdt_property(fdt
, "ibm,interrupt-server-ranges",
558 interrupt_server_ranges_prop
,
559 sizeof(interrupt_server_ranges_prop
))));
560 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 2)));
561 _FDT((fdt_property_cell(fdt
, "linux,phandle", PHANDLE_XICP
)));
562 _FDT((fdt_property_cell(fdt
, "phandle", PHANDLE_XICP
)));
564 _FDT((fdt_end_node(fdt
)));
567 _FDT((fdt_begin_node(fdt
, "vdevice")));
569 _FDT((fdt_property_string(fdt
, "device_type", "vdevice")));
570 _FDT((fdt_property_string(fdt
, "compatible", "IBM,vdevice")));
571 _FDT((fdt_property_cell(fdt
, "#address-cells", 0x1)));
572 _FDT((fdt_property_cell(fdt
, "#size-cells", 0x0)));
573 _FDT((fdt_property_cell(fdt
, "#interrupt-cells", 0x2)));
574 _FDT((fdt_property(fdt
, "interrupt-controller", NULL
, 0)));
576 _FDT((fdt_end_node(fdt
)));
579 spapr_events_fdt_skel(fdt
, epow_irq
);
581 /* /hypervisor node */
583 uint8_t hypercall
[16];
585 /* indicate KVM hypercall interface */
586 _FDT((fdt_begin_node(fdt
, "hypervisor")));
587 _FDT((fdt_property_string(fdt
, "compatible", "linux,kvm")));
588 if (kvmppc_has_cap_fixup_hcalls()) {
590 * Older KVM versions with older guest kernels were broken with the
591 * magic page, don't allow the guest to map it.
593 kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
595 _FDT((fdt_property(fdt
, "hcall-instructions", hypercall
,
596 sizeof(hypercall
))));
598 _FDT((fdt_end_node(fdt
)));
601 _FDT((fdt_end_node(fdt
))); /* close root node */
602 _FDT((fdt_finish(fdt
)));
607 int spapr_h_cas_compose_response(target_ulong addr
, target_ulong size
)
609 void *fdt
, *fdt_skel
;
610 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
614 /* Create sceleton */
615 fdt_skel
= g_malloc0(size
);
616 _FDT((fdt_create(fdt_skel
, size
)));
617 _FDT((fdt_begin_node(fdt_skel
, "")));
618 _FDT((fdt_end_node(fdt_skel
)));
619 _FDT((fdt_finish(fdt_skel
)));
620 fdt
= g_malloc0(size
);
621 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
624 /* Fix skeleton up */
625 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
627 /* Pack resulting tree */
628 _FDT((fdt_pack(fdt
)));
630 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
631 trace_spapr_cas_failed(size
);
635 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
636 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
637 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
643 static void spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
646 uint32_t associativity
[] = {
647 cpu_to_be32(0x4), /* length */
648 cpu_to_be32(0x0), cpu_to_be32(0x0),
649 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
652 uint64_t mem_reg_property
[2];
655 mem_reg_property
[0] = cpu_to_be64(start
);
656 mem_reg_property
[1] = cpu_to_be64(size
);
658 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
659 off
= fdt_add_subnode(fdt
, 0, mem_name
);
661 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
662 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
663 sizeof(mem_reg_property
))));
664 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
665 sizeof(associativity
))));
668 static int spapr_populate_memory(sPAPREnvironment
*spapr
, void *fdt
)
670 hwaddr mem_start
, node_size
;
671 int i
, nb_nodes
= nb_numa_nodes
;
672 NodeInfo
*nodes
= numa_info
;
675 /* No NUMA nodes, assume there is just one node with whole RAM */
676 if (!nb_numa_nodes
) {
678 ramnode
.node_mem
= ram_size
;
682 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
683 if (!nodes
[i
].node_mem
) {
686 if (mem_start
>= ram_size
) {
689 node_size
= nodes
[i
].node_mem
;
690 if (node_size
> ram_size
- mem_start
) {
691 node_size
= ram_size
- mem_start
;
695 /* ppc_spapr_init() checks for rma_size <= node0_size already */
696 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
697 mem_start
+= spapr
->rma_size
;
698 node_size
-= spapr
->rma_size
;
700 for ( ; node_size
; ) {
701 hwaddr sizetmp
= pow2floor(node_size
);
703 /* mem_start != 0 here */
704 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
705 sizetmp
= 1ULL << ctzl(mem_start
);
708 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
709 node_size
-= sizetmp
;
710 mem_start
+= sizetmp
;
717 static void spapr_finalize_fdt(sPAPREnvironment
*spapr
,
722 MachineState
*machine
= MACHINE(qdev_get_machine());
723 const char *boot_device
= machine
->boot_order
;
730 fdt
= g_malloc(FDT_MAX_SIZE
);
732 /* open out the base tree into a temp buffer for the final tweaks */
733 _FDT((fdt_open_into(spapr
->fdt_skel
, fdt
, FDT_MAX_SIZE
)));
735 ret
= spapr_populate_memory(spapr
, fdt
);
737 fprintf(stderr
, "couldn't setup memory nodes in fdt\n");
741 ret
= spapr_populate_vdevice(spapr
->vio_bus
, fdt
);
743 fprintf(stderr
, "couldn't setup vio devices in fdt\n");
747 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
748 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
752 fprintf(stderr
, "couldn't setup PCI devices in fdt\n");
757 ret
= spapr_rtas_device_tree_setup(fdt
, rtas_addr
, rtas_size
);
759 fprintf(stderr
, "Couldn't set up RTAS device tree properties\n");
762 /* Advertise NUMA via ibm,associativity */
763 ret
= spapr_fixup_cpu_dt(fdt
, spapr
);
765 fprintf(stderr
, "Couldn't finalize CPU device tree properties\n");
768 bootlist
= get_boot_devices_list(&cb
, true);
769 if (cb
&& bootlist
) {
770 int offset
= fdt_path_offset(fdt
, "/chosen");
774 for (i
= 0; i
< cb
; i
++) {
775 if (bootlist
[i
] == '\n') {
780 ret
= fdt_setprop_string(fdt
, offset
, "qemu,boot-list", bootlist
);
783 if (boot_device
&& strlen(boot_device
)) {
784 int offset
= fdt_path_offset(fdt
, "/chosen");
789 fdt_setprop_string(fdt
, offset
, "qemu,boot-device", boot_device
);
792 if (!spapr
->has_graphics
) {
793 spapr_populate_chosen_stdout(fdt
, spapr
->vio_bus
);
796 _FDT((fdt_pack(fdt
)));
798 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
799 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
800 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
804 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
810 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
812 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
815 static void emulate_spapr_hypercall(PowerPCCPU
*cpu
)
817 CPUPPCState
*env
= &cpu
->env
;
820 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
821 env
->gpr
[3] = H_PRIVILEGE
;
823 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
827 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
828 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
829 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
830 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
831 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
833 static void spapr_reset_htab(sPAPREnvironment
*spapr
)
838 /* allocate hash page table. For now we always make this 16mb,
839 * later we should probably make it scale to the size of guest
842 shift
= kvmppc_reset_htab(spapr
->htab_shift
);
845 /* Kernel handles htab, we don't need to allocate one */
846 spapr
->htab_shift
= shift
;
847 kvmppc_kern_htab
= true;
849 /* Tell readers to update their file descriptor */
850 if (spapr
->htab_fd
>= 0) {
851 spapr
->htab_fd_stale
= true;
855 /* Allocate an htab if we don't yet have one */
856 spapr
->htab
= qemu_memalign(HTAB_SIZE(spapr
), HTAB_SIZE(spapr
));
860 memset(spapr
->htab
, 0, HTAB_SIZE(spapr
));
862 for (index
= 0; index
< HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
; index
++) {
863 DIRTY_HPTE(HPTE(spapr
->htab
, index
));
867 /* Update the RMA size if necessary */
868 if (spapr
->vrma_adjust
) {
869 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(),
874 static int find_unknown_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
876 bool matched
= false;
878 if (object_dynamic_cast(OBJECT(sbdev
), TYPE_SPAPR_PCI_HOST_BRIDGE
)) {
883 error_report("Device %s is not supported by this machine yet.",
884 qdev_fw_name(DEVICE(sbdev
)));
892 * A guest reset will cause spapr->htab_fd to become stale if being used.
893 * Reopen the file descriptor to make sure the whole HTAB is properly read.
895 static int spapr_check_htab_fd(sPAPREnvironment
*spapr
)
899 if (spapr
->htab_fd_stale
) {
900 close(spapr
->htab_fd
);
901 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
902 if (spapr
->htab_fd
< 0) {
903 error_report("Unable to open fd for reading hash table from KVM: "
904 "%s", strerror(errno
));
907 spapr
->htab_fd_stale
= false;
913 static void ppc_spapr_reset(void)
915 PowerPCCPU
*first_ppc_cpu
;
918 /* Check for unknown sysbus devices */
919 foreach_dynamic_sysbus_device(find_unknown_sysbus_device
, NULL
);
921 /* Reset the hash table & recalc the RMA */
922 spapr_reset_htab(spapr
);
924 qemu_devices_reset();
927 * We place the device tree and RTAS just below either the top of the RMA,
928 * or just below 2GB, whichever is lowere, so that it can be
929 * processed with 32-bit real mode code if necessary
931 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
932 spapr
->rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
933 spapr
->fdt_addr
= spapr
->rtas_addr
- FDT_MAX_SIZE
;
936 spapr_finalize_fdt(spapr
, spapr
->fdt_addr
, spapr
->rtas_addr
,
940 cpu_physical_memory_write(spapr
->rtas_addr
, spapr
->rtas_blob
,
943 /* Set up the entry state */
944 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
945 first_ppc_cpu
->env
.gpr
[3] = spapr
->fdt_addr
;
946 first_ppc_cpu
->env
.gpr
[5] = 0;
947 first_cpu
->halted
= 0;
948 first_ppc_cpu
->env
.nip
= spapr
->entry_point
;
952 static void spapr_cpu_reset(void *opaque
)
954 PowerPCCPU
*cpu
= opaque
;
955 CPUState
*cs
= CPU(cpu
);
956 CPUPPCState
*env
= &cpu
->env
;
960 /* All CPUs start halted. CPU0 is unhalted from the machine level
961 * reset code and the rest are explicitly started up by the guest
962 * using an RTAS call */
965 env
->spr
[SPR_HIOR
] = 0;
967 env
->external_htab
= (uint8_t *)spapr
->htab
;
968 if (kvm_enabled() && !env
->external_htab
) {
970 * HV KVM, set external_htab to 1 so our ppc_hash64_load_hpte*
971 * functions do the right thing.
973 env
->external_htab
= (void *)1;
977 * htab_mask is the mask used to normalize hash value to PTEG index.
978 * htab_shift is log2 of hash table size.
979 * We have 8 hpte per group, and each hpte is 16 bytes.
980 * ie have 128 bytes per hpte entry.
982 env
->htab_mask
= (1ULL << ((spapr
)->htab_shift
- 7)) - 1;
983 env
->spr
[SPR_SDR1
] = (target_ulong
)(uintptr_t)spapr
->htab
|
984 (spapr
->htab_shift
- 18);
987 static void spapr_create_nvram(sPAPREnvironment
*spapr
)
989 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
990 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
993 qdev_prop_set_drive_nofail(dev
, "drive", blk_by_legacy_dinfo(dinfo
));
996 qdev_init_nofail(dev
);
998 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1001 static void spapr_rtc_create(sPAPREnvironment
*spapr
)
1003 DeviceState
*dev
= qdev_create(NULL
, TYPE_SPAPR_RTC
);
1005 qdev_init_nofail(dev
);
1008 object_property_add_alias(qdev_get_machine(), "rtc-time",
1009 OBJECT(spapr
->rtc
), "date", NULL
);
1012 /* Returns whether we want to use VGA or not */
1013 static int spapr_vga_init(PCIBus
*pci_bus
)
1015 switch (vga_interface_type
) {
1021 return pci_vga_init(pci_bus
) != NULL
;
1023 fprintf(stderr
, "This vga model is not supported,"
1024 "currently it only supports -vga std\n");
1029 static int spapr_post_load(void *opaque
, int version_id
)
1031 sPAPREnvironment
*spapr
= (sPAPREnvironment
*)opaque
;
1034 /* In earlier versions, there was no separate qdev for the PAPR
1035 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1036 * So when migrating from those versions, poke the incoming offset
1037 * value into the RTC device */
1038 if (version_id
< 3) {
1039 err
= spapr_rtc_import_offset(spapr
->rtc
, spapr
->rtc_offset
);
1045 static bool version_before_3(void *opaque
, int version_id
)
1047 return version_id
< 3;
1050 static const VMStateDescription vmstate_spapr
= {
1053 .minimum_version_id
= 1,
1054 .post_load
= spapr_post_load
,
1055 .fields
= (VMStateField
[]) {
1056 /* used to be @next_irq */
1057 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1060 VMSTATE_UINT64_TEST(rtc_offset
, sPAPREnvironment
, version_before_3
),
1062 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPREnvironment
, 2),
1063 VMSTATE_END_OF_LIST()
1067 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1069 sPAPREnvironment
*spapr
= opaque
;
1071 /* "Iteration" header */
1072 qemu_put_be32(f
, spapr
->htab_shift
);
1075 spapr
->htab_save_index
= 0;
1076 spapr
->htab_first_pass
= true;
1078 assert(kvm_enabled());
1080 spapr
->htab_fd
= kvmppc_get_htab_fd(false);
1081 spapr
->htab_fd_stale
= false;
1082 if (spapr
->htab_fd
< 0) {
1083 fprintf(stderr
, "Unable to open fd for reading hash table from KVM: %s\n",
1093 static void htab_save_first_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
1096 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1097 int index
= spapr
->htab_save_index
;
1098 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1100 assert(spapr
->htab_first_pass
);
1105 /* Consume invalid HPTEs */
1106 while ((index
< htabslots
)
1107 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1109 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1112 /* Consume valid HPTEs */
1114 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1115 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1117 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1120 if (index
> chunkstart
) {
1121 int n_valid
= index
- chunkstart
;
1123 qemu_put_be32(f
, chunkstart
);
1124 qemu_put_be16(f
, n_valid
);
1125 qemu_put_be16(f
, 0);
1126 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1127 HASH_PTE_SIZE_64
* n_valid
);
1129 if ((qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1133 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
1135 if (index
>= htabslots
) {
1136 assert(index
== htabslots
);
1138 spapr
->htab_first_pass
= false;
1140 spapr
->htab_save_index
= index
;
1143 static int htab_save_later_pass(QEMUFile
*f
, sPAPREnvironment
*spapr
,
1146 bool final
= max_ns
< 0;
1147 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1148 int examined
= 0, sent
= 0;
1149 int index
= spapr
->htab_save_index
;
1150 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1152 assert(!spapr
->htab_first_pass
);
1155 int chunkstart
, invalidstart
;
1157 /* Consume non-dirty HPTEs */
1158 while ((index
< htabslots
)
1159 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
1165 /* Consume valid dirty HPTEs */
1166 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
1167 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1168 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1169 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1174 invalidstart
= index
;
1175 /* Consume invalid dirty HPTEs */
1176 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
1177 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
1178 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1179 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1184 if (index
> chunkstart
) {
1185 int n_valid
= invalidstart
- chunkstart
;
1186 int n_invalid
= index
- invalidstart
;
1188 qemu_put_be32(f
, chunkstart
);
1189 qemu_put_be16(f
, n_valid
);
1190 qemu_put_be16(f
, n_invalid
);
1191 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1192 HASH_PTE_SIZE_64
* n_valid
);
1193 sent
+= index
- chunkstart
;
1195 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
1200 if (examined
>= htabslots
) {
1204 if (index
>= htabslots
) {
1205 assert(index
== htabslots
);
1208 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
1210 if (index
>= htabslots
) {
1211 assert(index
== htabslots
);
1215 spapr
->htab_save_index
= index
;
1217 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
1220 #define MAX_ITERATION_NS 5000000 /* 5 ms */
1221 #define MAX_KVM_BUF_SIZE 2048
1223 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
1225 sPAPREnvironment
*spapr
= opaque
;
1228 /* Iteration header */
1229 qemu_put_be32(f
, 0);
1232 assert(kvm_enabled());
1234 rc
= spapr_check_htab_fd(spapr
);
1239 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
,
1240 MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
1244 } else if (spapr
->htab_first_pass
) {
1245 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
1247 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
1251 qemu_put_be32(f
, 0);
1252 qemu_put_be16(f
, 0);
1253 qemu_put_be16(f
, 0);
1258 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
1260 sPAPREnvironment
*spapr
= opaque
;
1262 /* Iteration header */
1263 qemu_put_be32(f
, 0);
1268 assert(kvm_enabled());
1270 rc
= spapr_check_htab_fd(spapr
);
1275 rc
= kvmppc_save_htab(f
, spapr
->htab_fd
, MAX_KVM_BUF_SIZE
, -1);
1279 close(spapr
->htab_fd
);
1280 spapr
->htab_fd
= -1;
1282 htab_save_later_pass(f
, spapr
, -1);
1286 qemu_put_be32(f
, 0);
1287 qemu_put_be16(f
, 0);
1288 qemu_put_be16(f
, 0);
1293 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
1295 sPAPREnvironment
*spapr
= opaque
;
1296 uint32_t section_hdr
;
1299 if (version_id
< 1 || version_id
> 1) {
1300 fprintf(stderr
, "htab_load() bad version\n");
1304 section_hdr
= qemu_get_be32(f
);
1307 /* First section, just the hash shift */
1308 if (spapr
->htab_shift
!= section_hdr
) {
1315 assert(kvm_enabled());
1317 fd
= kvmppc_get_htab_fd(true);
1319 fprintf(stderr
, "Unable to open fd to restore KVM hash table: %s\n",
1326 uint16_t n_valid
, n_invalid
;
1328 index
= qemu_get_be32(f
);
1329 n_valid
= qemu_get_be16(f
);
1330 n_invalid
= qemu_get_be16(f
);
1332 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
1337 if ((index
+ n_valid
+ n_invalid
) >
1338 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
1339 /* Bad index in stream */
1340 fprintf(stderr
, "htab_load() bad index %d (%hd+%hd entries) "
1341 "in htab stream (htab_shift=%d)\n", index
, n_valid
, n_invalid
,
1348 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
1349 HASH_PTE_SIZE_64
* n_valid
);
1352 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
1353 HASH_PTE_SIZE_64
* n_invalid
);
1360 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
1375 static SaveVMHandlers savevm_htab_handlers
= {
1376 .save_live_setup
= htab_save_setup
,
1377 .save_live_iterate
= htab_save_iterate
,
1378 .save_live_complete
= htab_save_complete
,
1379 .load_state
= htab_load
,
1382 static void spapr_boot_set(void *opaque
, const char *boot_device
,
1385 MachineState
*machine
= MACHINE(qdev_get_machine());
1386 machine
->boot_order
= g_strdup(boot_device
);
1389 /* pSeries LPAR / sPAPR hardware init */
1390 static void ppc_spapr_init(MachineState
*machine
)
1392 ram_addr_t ram_size
= machine
->ram_size
;
1393 const char *cpu_model
= machine
->cpu_model
;
1394 const char *kernel_filename
= machine
->kernel_filename
;
1395 const char *kernel_cmdline
= machine
->kernel_cmdline
;
1396 const char *initrd_filename
= machine
->initrd_filename
;
1401 MemoryRegion
*sysmem
= get_system_memory();
1402 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
1403 MemoryRegion
*rma_region
;
1405 hwaddr rma_alloc_size
;
1406 hwaddr node0_size
= spapr_node0_size();
1407 uint32_t initrd_base
= 0;
1408 long kernel_size
= 0, initrd_size
= 0;
1409 long load_limit
, fw_size
;
1410 bool kernel_le
= false;
1413 msi_supported
= true;
1415 spapr
= g_malloc0(sizeof(*spapr
));
1416 QLIST_INIT(&spapr
->phbs
);
1418 cpu_ppc_hypercall
= emulate_spapr_hypercall
;
1420 /* Allocate RMA if necessary */
1421 rma_alloc_size
= kvmppc_alloc_rma(&rma
);
1423 if (rma_alloc_size
== -1) {
1424 error_report("Unable to create RMA");
1428 if (rma_alloc_size
&& (rma_alloc_size
< node0_size
)) {
1429 spapr
->rma_size
= rma_alloc_size
;
1431 spapr
->rma_size
= node0_size
;
1433 /* With KVM, we don't actually know whether KVM supports an
1434 * unbounded RMA (PR KVM) or is limited by the hash table size
1435 * (HV KVM using VRMA), so we always assume the latter
1437 * In that case, we also limit the initial allocations for RTAS
1438 * etc... to 256M since we have no way to know what the VRMA size
1439 * is going to be as it depends on the size of the hash table
1440 * isn't determined yet.
1442 if (kvm_enabled()) {
1443 spapr
->vrma_adjust
= 1;
1444 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
1448 if (spapr
->rma_size
> node0_size
) {
1449 fprintf(stderr
, "Error: Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")\n",
1454 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
1455 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
1457 /* We aim for a hash table of size 1/128 the size of RAM. The
1458 * normal rule of thumb is 1/64 the size of RAM, but that's much
1459 * more than needed for the Linux guests we support. */
1460 spapr
->htab_shift
= 18; /* Minimum architected size */
1461 while (spapr
->htab_shift
<= 46) {
1462 if ((1ULL << (spapr
->htab_shift
+ 7)) >= ram_size
) {
1465 spapr
->htab_shift
++;
1468 /* Set up Interrupt Controller before we create the VCPUs */
1469 spapr
->icp
= xics_system_init(machine
,
1470 smp_cpus
* kvmppc_smt_threads() / smp_threads
,
1474 if (cpu_model
== NULL
) {
1475 cpu_model
= kvm_enabled() ? "host" : "POWER7";
1477 for (i
= 0; i
< smp_cpus
; i
++) {
1478 cpu
= cpu_ppc_init(cpu_model
);
1480 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
1485 /* Set time-base frequency to 512 MHz */
1486 cpu_ppc_tb_init(env
, TIMEBASE_FREQ
);
1488 /* PAPR always has exception vectors in RAM not ROM. To ensure this,
1489 * MSR[IP] should never be set.
1491 env
->msr_mask
&= ~(1 << 6);
1493 /* Tell KVM that we're in PAPR mode */
1494 if (kvm_enabled()) {
1495 kvmppc_set_papr(cpu
);
1498 if (cpu
->max_compat
) {
1499 if (ppc_set_compat(cpu
, cpu
->max_compat
) < 0) {
1504 xics_cpu_setup(spapr
->icp
, cpu
);
1506 qemu_register_reset(spapr_cpu_reset
, cpu
);
1509 if (kvm_enabled()) {
1510 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
1511 kvmppc_enable_logical_ci_hcalls();
1515 spapr
->ram_limit
= ram_size
;
1516 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
1518 memory_region_add_subregion(sysmem
, 0, ram
);
1520 if (rma_alloc_size
&& rma
) {
1521 rma_region
= g_new(MemoryRegion
, 1);
1522 memory_region_init_ram_ptr(rma_region
, NULL
, "ppc_spapr.rma",
1523 rma_alloc_size
, rma
);
1524 vmstate_register_ram_global(rma_region
);
1525 memory_region_add_subregion(sysmem
, 0, rma_region
);
1528 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
1530 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
1533 spapr
->rtas_size
= get_image_size(filename
);
1534 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
1535 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
1536 error_report("Could not load LPAR rtas '%s'", filename
);
1539 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
1540 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
1541 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
1546 /* Set up EPOW events infrastructure */
1547 spapr_events_init(spapr
);
1549 /* Set up the RTC RTAS interfaces */
1550 spapr_rtc_create(spapr
);
1552 /* Set up VIO bus */
1553 spapr
->vio_bus
= spapr_vio_bus_init();
1555 for (i
= 0; i
< MAX_SERIAL_PORTS
; i
++) {
1556 if (serial_hds
[i
]) {
1557 spapr_vty_create(spapr
->vio_bus
, serial_hds
[i
]);
1561 /* We always have at least the nvram device on VIO */
1562 spapr_create_nvram(spapr
);
1565 spapr_pci_rtas_init();
1567 phb
= spapr_create_phb(spapr
, 0);
1569 for (i
= 0; i
< nb_nics
; i
++) {
1570 NICInfo
*nd
= &nd_table
[i
];
1573 nd
->model
= g_strdup("ibmveth");
1576 if (strcmp(nd
->model
, "ibmveth") == 0) {
1577 spapr_vlan_create(spapr
->vio_bus
, nd
);
1579 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
1583 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
1584 spapr_vscsi_create(spapr
->vio_bus
);
1588 if (spapr_vga_init(phb
->bus
)) {
1589 spapr
->has_graphics
= true;
1590 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
1594 pci_create_simple(phb
->bus
, -1, "pci-ohci");
1596 if (spapr
->has_graphics
) {
1597 USBBus
*usb_bus
= usb_bus_find(-1);
1599 usb_create_simple(usb_bus
, "usb-kbd");
1600 usb_create_simple(usb_bus
, "usb-mouse");
1604 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
1605 fprintf(stderr
, "qemu: pSeries SLOF firmware requires >= "
1606 "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF
);
1610 if (kernel_filename
) {
1611 uint64_t lowaddr
= 0;
1613 kernel_size
= load_elf(kernel_filename
, translate_kernel_address
, NULL
,
1614 NULL
, &lowaddr
, NULL
, 1, ELF_MACHINE
, 0);
1615 if (kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
1616 kernel_size
= load_elf(kernel_filename
,
1617 translate_kernel_address
, NULL
,
1618 NULL
, &lowaddr
, NULL
, 0, ELF_MACHINE
, 0);
1619 kernel_le
= kernel_size
> 0;
1621 if (kernel_size
< 0) {
1622 fprintf(stderr
, "qemu: error loading %s: %s\n",
1623 kernel_filename
, load_elf_strerror(kernel_size
));
1628 if (initrd_filename
) {
1629 /* Try to locate the initrd in the gap between the kernel
1630 * and the firmware. Add a bit of space just in case
1632 initrd_base
= (KERNEL_LOAD_ADDR
+ kernel_size
+ 0x1ffff) & ~0xffff;
1633 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
1634 load_limit
- initrd_base
);
1635 if (initrd_size
< 0) {
1636 fprintf(stderr
, "qemu: could not load initial ram disk '%s'\n",
1646 if (bios_name
== NULL
) {
1647 bios_name
= FW_FILE_NAME
;
1649 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
1651 error_report("Could not find LPAR firmware '%s'", bios_name
);
1654 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
1656 error_report("Could not load LPAR firmware '%s'", filename
);
1661 spapr
->entry_point
= 0x100;
1663 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
1664 register_savevm_live(NULL
, "spapr/htab", -1, 1,
1665 &savevm_htab_handlers
, spapr
);
1667 /* Prepare the device tree */
1668 spapr
->fdt_skel
= spapr_create_fdt_skel(initrd_base
, initrd_size
,
1669 kernel_size
, kernel_le
,
1671 spapr
->check_exception_irq
);
1672 assert(spapr
->fdt_skel
!= NULL
);
1675 QTAILQ_INIT(&spapr
->ccs_list
);
1676 qemu_register_reset(spapr_ccs_reset_hook
, spapr
);
1678 qemu_register_boot_set(spapr_boot_set
, spapr
);
1681 static int spapr_kvm_type(const char *vm_type
)
1687 if (!strcmp(vm_type
, "HV")) {
1691 if (!strcmp(vm_type
, "PR")) {
1695 error_report("Unknown kvm-type specified '%s'", vm_type
);
1700 * Implementation of an interface to adjust firmware path
1701 * for the bootindex property handling.
1703 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
1706 #define CAST(type, obj, name) \
1707 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
1708 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
1709 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
1712 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
1713 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
1714 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
1718 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
1719 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
1720 * in the top 16 bits of the 64-bit LUN
1722 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
1723 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1724 (uint64_t)id
<< 48);
1725 } else if (virtio
) {
1727 * We use SRP luns of the form 01000000 | (target << 8) | lun
1728 * in the top 32 bits of the 64-bit LUN
1729 * Note: the quote above is from SLOF and it is wrong,
1730 * the actual binding is:
1731 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
1733 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
1734 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1735 (uint64_t)id
<< 32);
1738 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
1739 * in the top 32 bits of the 64-bit LUN
1741 unsigned usb_port
= atoi(usb
->port
->path
);
1742 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
1743 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
1744 (uint64_t)id
<< 32);
1749 /* Replace "pci" with "pci@800000020000000" */
1750 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
1756 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
1758 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1760 return g_strdup(sm
->kvm_type
);
1763 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
1765 sPAPRMachineState
*sm
= SPAPR_MACHINE(obj
);
1767 g_free(sm
->kvm_type
);
1768 sm
->kvm_type
= g_strdup(value
);
1771 static void spapr_machine_initfn(Object
*obj
)
1773 object_property_add_str(obj
, "kvm-type",
1774 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
1775 object_property_set_description(obj
, "kvm-type",
1776 "Specifies the KVM virtualization mode (HV, PR)",
1780 static void ppc_cpu_do_nmi_on_cpu(void *arg
)
1784 cpu_synchronize_state(cs
);
1785 ppc_cpu_do_system_reset(cs
);
1788 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
1793 async_run_on_cpu(cs
, ppc_cpu_do_nmi_on_cpu
, cs
);
1797 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
1799 MachineClass
*mc
= MACHINE_CLASS(oc
);
1800 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
1801 NMIClass
*nc
= NMI_CLASS(oc
);
1803 mc
->init
= ppc_spapr_init
;
1804 mc
->reset
= ppc_spapr_reset
;
1805 mc
->block_default_type
= IF_SCSI
;
1806 mc
->max_cpus
= MAX_CPUS
;
1807 mc
->no_parallel
= 1;
1808 mc
->default_boot_order
= "";
1809 mc
->default_ram_size
= 512 * M_BYTE
;
1810 mc
->kvm_type
= spapr_kvm_type
;
1811 mc
->has_dynamic_sysbus
= true;
1813 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
1814 nc
->nmi_monitor_handler
= spapr_nmi
;
1817 static const TypeInfo spapr_machine_info
= {
1818 .name
= TYPE_SPAPR_MACHINE
,
1819 .parent
= TYPE_MACHINE
,
1821 .instance_size
= sizeof(sPAPRMachineState
),
1822 .instance_init
= spapr_machine_initfn
,
1823 .class_init
= spapr_machine_class_init
,
1824 .interfaces
= (InterfaceInfo
[]) {
1825 { TYPE_FW_PATH_PROVIDER
},
1831 #define SPAPR_COMPAT_2_3 \
1834 .driver = "spapr-pci-host-bridge",\
1835 .property = "dynamic-reconfiguration",\
1839 #define SPAPR_COMPAT_2_2 \
1843 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
1844 .property = "mem_win_size",\
1845 .value = "0x20000000",\
1848 #define SPAPR_COMPAT_2_1 \
1852 static void spapr_compat_2_3(Object
*obj
)
1856 static void spapr_compat_2_2(Object
*obj
)
1858 spapr_compat_2_3(obj
);
1861 static void spapr_compat_2_1(Object
*obj
)
1863 spapr_compat_2_2(obj
);
1866 static void spapr_machine_2_3_instance_init(Object
*obj
)
1868 spapr_compat_2_3(obj
);
1869 spapr_machine_initfn(obj
);
1872 static void spapr_machine_2_2_instance_init(Object
*obj
)
1874 spapr_compat_2_2(obj
);
1875 spapr_machine_initfn(obj
);
1878 static void spapr_machine_2_1_instance_init(Object
*obj
)
1880 spapr_compat_2_1(obj
);
1881 spapr_machine_initfn(obj
);
1884 static void spapr_machine_2_1_class_init(ObjectClass
*oc
, void *data
)
1886 MachineClass
*mc
= MACHINE_CLASS(oc
);
1887 static GlobalProperty compat_props
[] = {
1889 { /* end of list */ }
1892 mc
->name
= "pseries-2.1";
1893 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.1";
1894 mc
->compat_props
= compat_props
;
1897 static const TypeInfo spapr_machine_2_1_info
= {
1898 .name
= TYPE_SPAPR_MACHINE
"2.1",
1899 .parent
= TYPE_SPAPR_MACHINE
,
1900 .class_init
= spapr_machine_2_1_class_init
,
1901 .instance_init
= spapr_machine_2_1_instance_init
,
1904 static void spapr_machine_2_2_class_init(ObjectClass
*oc
, void *data
)
1906 static GlobalProperty compat_props
[] = {
1908 { /* end of list */ }
1910 MachineClass
*mc
= MACHINE_CLASS(oc
);
1912 mc
->name
= "pseries-2.2";
1913 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.2";
1914 mc
->compat_props
= compat_props
;
1917 static const TypeInfo spapr_machine_2_2_info
= {
1918 .name
= TYPE_SPAPR_MACHINE
"2.2",
1919 .parent
= TYPE_SPAPR_MACHINE
,
1920 .class_init
= spapr_machine_2_2_class_init
,
1921 .instance_init
= spapr_machine_2_2_instance_init
,
1924 static void spapr_machine_2_3_class_init(ObjectClass
*oc
, void *data
)
1926 static GlobalProperty compat_props
[] = {
1928 { /* end of list */ }
1930 MachineClass
*mc
= MACHINE_CLASS(oc
);
1932 mc
->name
= "pseries-2.3";
1933 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.3";
1934 mc
->compat_props
= compat_props
;
1937 static const TypeInfo spapr_machine_2_3_info
= {
1938 .name
= TYPE_SPAPR_MACHINE
"2.3",
1939 .parent
= TYPE_SPAPR_MACHINE
,
1940 .class_init
= spapr_machine_2_3_class_init
,
1941 .instance_init
= spapr_machine_2_3_instance_init
,
1944 static void spapr_machine_2_4_class_init(ObjectClass
*oc
, void *data
)
1946 MachineClass
*mc
= MACHINE_CLASS(oc
);
1948 mc
->name
= "pseries-2.4";
1949 mc
->desc
= "pSeries Logical Partition (PAPR compliant) v2.4";
1950 mc
->alias
= "pseries";
1954 static const TypeInfo spapr_machine_2_4_info
= {
1955 .name
= TYPE_SPAPR_MACHINE
"2.4",
1956 .parent
= TYPE_SPAPR_MACHINE
,
1957 .class_init
= spapr_machine_2_4_class_init
,
1960 static void spapr_machine_register_types(void)
1962 type_register_static(&spapr_machine_info
);
1963 type_register_static(&spapr_machine_2_1_info
);
1964 type_register_static(&spapr_machine_2_2_info
);
1965 type_register_static(&spapr_machine_2_3_info
);
1966 type_register_static(&spapr_machine_2_4_info
);
1969 type_init(spapr_machine_register_types
)