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Merge remote-tracking branch 'qemu/master'
[qemu/ar7.git] / memory.c
blobe31c9c250b599257278262912e109a071e20de26
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 static unsigned memory_region_transaction_depth;
30 static bool memory_region_update_pending;
31 static bool ioeventfd_update_pending;
32 static bool global_dirty_log = false;
33
34 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
35 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
36
37 static QTAILQ_HEAD(, AddressSpace) address_spaces
38 = QTAILQ_HEAD_INITIALIZER(address_spaces);
39
40 typedef struct AddrRange AddrRange;
41
42 /*
43 * Note that signed integers are needed for negative offsetting in aliases
44 * (large MemoryRegion::alias_offset).
45 */
46 struct AddrRange {
47 Int128 start;
48 Int128 size;
49 };
50
51 static AddrRange addrrange_make(Int128 start, Int128 size)
52 {
53 return (AddrRange) { start, size };
54 }
55
56 static bool addrrange_equal(AddrRange r1, AddrRange r2)
57 {
58 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
59 }
60
61 static Int128 addrrange_end(AddrRange r)
62 {
63 return int128_add(r.start, r.size);
64 }
65
66 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
67 {
68 int128_addto(&range.start, delta);
69 return range;
70 }
71
72 static bool addrrange_contains(AddrRange range, Int128 addr)
73 {
74 return int128_ge(addr, range.start)
75 && int128_lt(addr, addrrange_end(range));
76 }
77
78 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
79 {
80 return addrrange_contains(r1, r2.start)
81 || addrrange_contains(r2, r1.start);
82 }
83
84 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
85 {
86 Int128 start = int128_max(r1.start, r2.start);
87 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
88 return addrrange_make(start, int128_sub(end, start));
89 }
90
91 enum ListenerDirection { Forward, Reverse };
92
93 static bool memory_listener_match(MemoryListener *listener,
94 MemoryRegionSection *section)
95 {
96 return !listener->address_space_filter
97 || listener->address_space_filter == section->address_space;
98 }
99
100 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
101 do { \
102 MemoryListener *_listener; \
103 \
104 switch (_direction) { \
105 case Forward: \
106 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
107 if (_listener->_callback) { \
108 _listener->_callback(_listener, ##_args); \
109 } \
110 } \
111 break; \
112 case Reverse: \
113 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
114 memory_listeners, link) { \
115 if (_listener->_callback) { \
116 _listener->_callback(_listener, ##_args); \
117 } \
118 } \
119 break; \
120 default: \
121 abort(); \
122 } \
123 } while (0)
124
125 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
126 do { \
127 MemoryListener *_listener; \
128 \
129 switch (_direction) { \
130 case Forward: \
131 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
132 if (_listener->_callback \
133 && memory_listener_match(_listener, _section)) { \
134 _listener->_callback(_listener, _section, ##_args); \
135 } \
136 } \
137 break; \
138 case Reverse: \
139 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
140 memory_listeners, link) { \
141 if (_listener->_callback \
142 && memory_listener_match(_listener, _section)) { \
143 _listener->_callback(_listener, _section, ##_args); \
144 } \
145 } \
146 break; \
147 default: \
148 abort(); \
149 } \
150 } while (0)
151
152 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
153 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
154 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
155 .mr = (fr)->mr, \
156 .address_space = (as), \
157 .offset_within_region = (fr)->offset_in_region, \
158 .size = (fr)->addr.size, \
159 .offset_within_address_space = int128_get64((fr)->addr.start), \
160 .readonly = (fr)->readonly, \
161 }))
162
163 struct CoalescedMemoryRange {
164 AddrRange addr;
165 QTAILQ_ENTRY(CoalescedMemoryRange) link;
166 };
167
168 struct MemoryRegionIoeventfd {
169 AddrRange addr;
170 bool match_data;
171 uint64_t data;
172 EventNotifier *e;
173 };
174
175 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
176 MemoryRegionIoeventfd b)
177 {
178 if (int128_lt(a.addr.start, b.addr.start)) {
179 return true;
180 } else if (int128_gt(a.addr.start, b.addr.start)) {
181 return false;
182 } else if (int128_lt(a.addr.size, b.addr.size)) {
183 return true;
184 } else if (int128_gt(a.addr.size, b.addr.size)) {
185 return false;
186 } else if (a.match_data < b.match_data) {
187 return true;
188 } else if (a.match_data > b.match_data) {
189 return false;
190 } else if (a.match_data) {
191 if (a.data < b.data) {
192 return true;
193 } else if (a.data > b.data) {
194 return false;
195 }
196 }
197 if (a.e < b.e) {
198 return true;
199 } else if (a.e > b.e) {
200 return false;
201 }
202 return false;
203 }
204
205 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
206 MemoryRegionIoeventfd b)
207 {
208 return !memory_region_ioeventfd_before(a, b)
209 && !memory_region_ioeventfd_before(b, a);
210 }
211
212 typedef struct FlatRange FlatRange;
213 typedef struct FlatView FlatView;
214
215 /* Range of memory in the global map. Addresses are absolute. */
216 struct FlatRange {
217 MemoryRegion *mr;
218 hwaddr offset_in_region;
219 AddrRange addr;
220 uint8_t dirty_log_mask;
221 bool romd_mode;
222 bool readonly;
223 };
224
225 /* Flattened global view of current active memory hierarchy. Kept in sorted
226 * order.
227 */
228 struct FlatView {
229 struct rcu_head rcu;
230 unsigned ref;
231 FlatRange *ranges;
232 unsigned nr;
233 unsigned nr_allocated;
234 };
235
236 typedef struct AddressSpaceOps AddressSpaceOps;
237
238 #define FOR_EACH_FLAT_RANGE(var, view) \
239 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
240
241 static bool flatrange_equal(FlatRange *a, FlatRange *b)
242 {
243 return a->mr == b->mr
244 && addrrange_equal(a->addr, b->addr)
245 && a->offset_in_region == b->offset_in_region
246 && a->romd_mode == b->romd_mode
247 && a->readonly == b->readonly;
248 }
249
250 static void flatview_init(FlatView *view)
251 {
252 view->ref = 1;
253 view->ranges = NULL;
254 view->nr = 0;
255 view->nr_allocated = 0;
256 }
257
258 /* Insert a range into a given position. Caller is responsible for maintaining
259 * sorting order.
260 */
261 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
262 {
263 if (view->nr == view->nr_allocated) {
264 view->nr_allocated = MAX(2 * view->nr, 10);
265 view->ranges = g_realloc(view->ranges,
266 view->nr_allocated * sizeof(*view->ranges));
267 }
268 memmove(view->ranges + pos + 1, view->ranges + pos,
269 (view->nr - pos) * sizeof(FlatRange));
270 view->ranges[pos] = *range;
271 memory_region_ref(range->mr);
272 ++view->nr;
273 }
274
275 static void flatview_destroy(FlatView *view)
276 {
277 int i;
278
279 for (i = 0; i < view->nr; i++) {
280 memory_region_unref(view->ranges[i].mr);
281 }
282 g_free(view->ranges);
283 g_free(view);
284 }
285
286 static void flatview_ref(FlatView *view)
287 {
288 atomic_inc(&view->ref);
289 }
290
291 static void flatview_unref(FlatView *view)
292 {
293 if (atomic_fetch_dec(&view->ref) == 1) {
294 flatview_destroy(view);
295 }
296 }
297
298 static bool can_merge(FlatRange *r1, FlatRange *r2)
299 {
300 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
301 && r1->mr == r2->mr
302 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
303 r1->addr.size),
304 int128_make64(r2->offset_in_region))
305 && r1->dirty_log_mask == r2->dirty_log_mask
306 && r1->romd_mode == r2->romd_mode
307 && r1->readonly == r2->readonly;
308 }
309
310 /* Attempt to simplify a view by merging adjacent ranges */
311 static void flatview_simplify(FlatView *view)
312 {
313 unsigned i, j;
314
315 i = 0;
316 while (i < view->nr) {
317 j = i + 1;
318 while (j < view->nr
319 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
320 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
321 ++j;
322 }
323 ++i;
324 memmove(&view->ranges[i], &view->ranges[j],
325 (view->nr - j) * sizeof(view->ranges[j]));
326 view->nr -= j - i;
327 }
328 }
329
330 static bool memory_region_big_endian(MemoryRegion *mr)
331 {
332 #ifdef TARGET_WORDS_BIGENDIAN
333 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
334 #else
335 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
336 #endif
337 }
338
339 static bool memory_region_wrong_endianness(MemoryRegion *mr)
340 {
341 #ifdef TARGET_WORDS_BIGENDIAN
342 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
343 #else
344 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
345 #endif
346 }
347
348 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
349 {
350 if (memory_region_wrong_endianness(mr)) {
351 switch (size) {
352 case 1:
353 break;
354 case 2:
355 *data = bswap16(*data);
356 break;
357 case 4:
358 *data = bswap32(*data);
359 break;
360 case 8:
361 *data = bswap64(*data);
362 break;
363 default:
364 abort();
365 }
366 }
367 }
368
369 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
370 hwaddr addr,
371 uint64_t *value,
372 unsigned size,
373 unsigned shift,
374 uint64_t mask,
375 MemTxAttrs attrs)
376 {
377 uint64_t tmp;
378
379 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
380 trace_memory_region_ops_read(mr, addr, tmp, size);
381 *value |= (tmp & mask) << shift;
382 return MEMTX_OK;
383 }
384
385 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
386 hwaddr addr,
387 uint64_t *value,
388 unsigned size,
389 unsigned shift,
390 uint64_t mask,
391 MemTxAttrs attrs)
392 {
393 uint64_t tmp;
394
395 if (mr->flush_coalesced_mmio) {
396 qemu_flush_coalesced_mmio_buffer();
397 }
398 tmp = mr->ops->read(mr->opaque, addr, size);
399 trace_memory_region_ops_read(mr, addr, tmp, size);
400 *value |= (tmp & mask) << shift;
401 return MEMTX_OK;
402 }
403
404 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
405 hwaddr addr,
406 uint64_t *value,
407 unsigned size,
408 unsigned shift,
409 uint64_t mask,
410 MemTxAttrs attrs)
411 {
412 uint64_t tmp = 0;
413 MemTxResult r;
414
415 if (mr->flush_coalesced_mmio) {
416 qemu_flush_coalesced_mmio_buffer();
417 }
418 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
419 trace_memory_region_ops_read(mr, addr, tmp, size);
420 *value |= (tmp & mask) << shift;
421 return r;
422 }
423
424 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
429 uint64_t mask,
430 MemTxAttrs attrs)
431 {
432 uint64_t tmp;
433
434 tmp = (*value >> shift) & mask;
435 trace_memory_region_ops_write(mr, addr, tmp, size);
436 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
437 return MEMTX_OK;
438 }
439
440 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
441 hwaddr addr,
442 uint64_t *value,
443 unsigned size,
444 unsigned shift,
445 uint64_t mask,
446 MemTxAttrs attrs)
447 {
448 uint64_t tmp;
449
450 if (mr->flush_coalesced_mmio) {
451 qemu_flush_coalesced_mmio_buffer();
452 }
453 tmp = (*value >> shift) & mask;
454 trace_memory_region_ops_write(mr, addr, tmp, size);
455 mr->ops->write(mr->opaque, addr, tmp, size);
456 return MEMTX_OK;
457 }
458
459 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
460 hwaddr addr,
461 uint64_t *value,
462 unsigned size,
463 unsigned shift,
464 uint64_t mask,
465 MemTxAttrs attrs)
466 {
467 uint64_t tmp;
468
469 if (mr->flush_coalesced_mmio) {
470 qemu_flush_coalesced_mmio_buffer();
471 }
472 tmp = (*value >> shift) & mask;
473 trace_memory_region_ops_write(mr, addr, tmp, size);
474 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
475 }
476
477 static MemTxResult access_with_adjusted_size(hwaddr addr,
478 uint64_t *value,
479 unsigned size,
480 unsigned access_size_min,
481 unsigned access_size_max,
482 MemTxResult (*access)(MemoryRegion *mr,
483 hwaddr addr,
484 uint64_t *value,
485 unsigned size,
486 unsigned shift,
487 uint64_t mask,
488 MemTxAttrs attrs),
489 MemoryRegion *mr,
490 MemTxAttrs attrs)
491 {
492 uint64_t access_mask;
493 unsigned access_size;
494 unsigned i;
495 MemTxResult r = MEMTX_OK;
496
497 if (!access_size_min) {
498 access_size_min = 1;
499 }
500 if (!access_size_max) {
501 access_size_max = 4;
502 }
503
504 /* FIXME: support unaligned access? */
505 access_size = MAX(MIN(size, access_size_max), access_size_min);
506 access_mask = -1ULL >> (64 - access_size * 8);
507 if (memory_region_big_endian(mr)) {
508 for (i = 0; i < size; i += access_size) {
509 r |= access(mr, addr + i, value, access_size,
510 (size - access_size - i) * 8, access_mask, attrs);
511 }
512 } else {
513 for (i = 0; i < size; i += access_size) {
514 r |= access(mr, addr + i, value, access_size, i * 8,
515 access_mask, attrs);
516 }
517 }
518 return r;
519 }
520
521 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
522 {
523 AddressSpace *as;
524
525 while (mr->container) {
526 mr = mr->container;
527 }
528 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
529 if (mr == as->root) {
530 return as;
531 }
532 }
533 return NULL;
534 }
535
536 /* Render a memory region into the global view. Ranges in @view obscure
537 * ranges in @mr.
538 */
539 static void render_memory_region(FlatView *view,
540 MemoryRegion *mr,
541 Int128 base,
542 AddrRange clip,
543 bool readonly)
544 {
545 MemoryRegion *subregion;
546 unsigned i;
547 hwaddr offset_in_region;
548 Int128 remain;
549 Int128 now;
550 FlatRange fr;
551 AddrRange tmp;
552
553 if (!mr->enabled) {
554 return;
555 }
556
557 int128_addto(&base, int128_make64(mr->addr));
558 readonly |= mr->readonly;
559
560 tmp = addrrange_make(base, mr->size);
561
562 if (!addrrange_intersects(tmp, clip)) {
563 return;
564 }
565
566 clip = addrrange_intersection(tmp, clip);
567
568 if (mr->alias) {
569 int128_subfrom(&base, int128_make64(mr->alias->addr));
570 int128_subfrom(&base, int128_make64(mr->alias_offset));
571 render_memory_region(view, mr->alias, base, clip, readonly);
572 return;
573 }
574
575 /* Render subregions in priority order. */
576 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
577 render_memory_region(view, subregion, base, clip, readonly);
578 }
579
580 if (!mr->terminates) {
581 return;
582 }
583
584 offset_in_region = int128_get64(int128_sub(clip.start, base));
585 base = clip.start;
586 remain = clip.size;
587
588 fr.mr = mr;
589 fr.dirty_log_mask = mr->dirty_log_mask;
590 fr.romd_mode = mr->romd_mode;
591 fr.readonly = readonly;
592
593 /* Render the region itself into any gaps left by the current view. */
594 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
595 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
596 continue;
597 }
598 if (int128_lt(base, view->ranges[i].addr.start)) {
599 now = int128_min(remain,
600 int128_sub(view->ranges[i].addr.start, base));
601 fr.offset_in_region = offset_in_region;
602 fr.addr = addrrange_make(base, now);
603 flatview_insert(view, i, &fr);
604 ++i;
605 int128_addto(&base, now);
606 offset_in_region += int128_get64(now);
607 int128_subfrom(&remain, now);
608 }
609 now = int128_sub(int128_min(int128_add(base, remain),
610 addrrange_end(view->ranges[i].addr)),
611 base);
612 int128_addto(&base, now);
613 offset_in_region += int128_get64(now);
614 int128_subfrom(&remain, now);
615 }
616 if (int128_nz(remain)) {
617 fr.offset_in_region = offset_in_region;
618 fr.addr = addrrange_make(base, remain);
619 flatview_insert(view, i, &fr);
620 }
621 }
622
623 /* Render a memory topology into a list of disjoint absolute ranges. */
624 static FlatView *generate_memory_topology(MemoryRegion *mr)
625 {
626 FlatView *view;
627
628 view = g_new(FlatView, 1);
629 flatview_init(view);
630
631 if (mr) {
632 render_memory_region(view, mr, int128_zero(),
633 addrrange_make(int128_zero(), int128_2_64()), false);
634 }
635 flatview_simplify(view);
636
637 return view;
638 }
639
640 static void address_space_add_del_ioeventfds(AddressSpace *as,
641 MemoryRegionIoeventfd *fds_new,
642 unsigned fds_new_nb,
643 MemoryRegionIoeventfd *fds_old,
644 unsigned fds_old_nb)
645 {
646 unsigned iold, inew;
647 MemoryRegionIoeventfd *fd;
648 MemoryRegionSection section;
649
650 /* Generate a symmetric difference of the old and new fd sets, adding
651 * and deleting as necessary.
652 */
653
654 iold = inew = 0;
655 while (iold < fds_old_nb || inew < fds_new_nb) {
656 if (iold < fds_old_nb
657 && (inew == fds_new_nb
658 || memory_region_ioeventfd_before(fds_old[iold],
659 fds_new[inew]))) {
660 fd = &fds_old[iold];
661 section = (MemoryRegionSection) {
662 .address_space = as,
663 .offset_within_address_space = int128_get64(fd->addr.start),
664 .size = fd->addr.size,
665 };
666 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
667 fd->match_data, fd->data, fd->e);
668 ++iold;
669 } else if (inew < fds_new_nb
670 && (iold == fds_old_nb
671 || memory_region_ioeventfd_before(fds_new[inew],
672 fds_old[iold]))) {
673 fd = &fds_new[inew];
674 section = (MemoryRegionSection) {
675 .address_space = as,
676 .offset_within_address_space = int128_get64(fd->addr.start),
677 .size = fd->addr.size,
678 };
679 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
680 fd->match_data, fd->data, fd->e);
681 ++inew;
682 } else {
683 ++iold;
684 ++inew;
685 }
686 }
687 }
688
689 static FlatView *address_space_get_flatview(AddressSpace *as)
690 {
691 FlatView *view;
692
693 rcu_read_lock();
694 view = atomic_rcu_read(&as->current_map);
695 flatview_ref(view);
696 rcu_read_unlock();
697 return view;
698 }
699
700 static void address_space_update_ioeventfds(AddressSpace *as)
701 {
702 FlatView *view;
703 FlatRange *fr;
704 unsigned ioeventfd_nb = 0;
705 MemoryRegionIoeventfd *ioeventfds = NULL;
706 AddrRange tmp;
707 unsigned i;
708
709 view = address_space_get_flatview(as);
710 FOR_EACH_FLAT_RANGE(fr, view) {
711 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
712 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
713 int128_sub(fr->addr.start,
714 int128_make64(fr->offset_in_region)));
715 if (addrrange_intersects(fr->addr, tmp)) {
716 ++ioeventfd_nb;
717 ioeventfds = g_realloc(ioeventfds,
718 ioeventfd_nb * sizeof(*ioeventfds));
719 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
720 ioeventfds[ioeventfd_nb-1].addr = tmp;
721 }
722 }
723 }
724
725 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
726 as->ioeventfds, as->ioeventfd_nb);
727
728 g_free(as->ioeventfds);
729 as->ioeventfds = ioeventfds;
730 as->ioeventfd_nb = ioeventfd_nb;
731 flatview_unref(view);
732 }
733
734 static void address_space_update_topology_pass(AddressSpace *as,
735 const FlatView *old_view,
736 const FlatView *new_view,
737 bool adding)
738 {
739 unsigned iold, inew;
740 FlatRange *frold, *frnew;
741
742 /* Generate a symmetric difference of the old and new memory maps.
743 * Kill ranges in the old map, and instantiate ranges in the new map.
744 */
745 iold = inew = 0;
746 while (iold < old_view->nr || inew < new_view->nr) {
747 if (iold < old_view->nr) {
748 frold = &old_view->ranges[iold];
749 } else {
750 frold = NULL;
751 }
752 if (inew < new_view->nr) {
753 frnew = &new_view->ranges[inew];
754 } else {
755 frnew = NULL;
756 }
757
758 if (frold
759 && (!frnew
760 || int128_lt(frold->addr.start, frnew->addr.start)
761 || (int128_eq(frold->addr.start, frnew->addr.start)
762 && !flatrange_equal(frold, frnew)))) {
763 /* In old but not in new, or in both but attributes changed. */
764
765 if (!adding) {
766 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
767 }
768
769 ++iold;
770 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
771 /* In both and unchanged (except logging may have changed) */
772
773 if (adding) {
774 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
775 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
776 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
777 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
778 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
779 }
780 }
781
782 ++iold;
783 ++inew;
784 } else {
785 /* In new */
786
787 if (adding) {
788 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
789 }
790
791 ++inew;
792 }
793 }
794 }
795
796
797 static void address_space_update_topology(AddressSpace *as)
798 {
799 FlatView *old_view = address_space_get_flatview(as);
800 FlatView *new_view = generate_memory_topology(as->root);
801
802 address_space_update_topology_pass(as, old_view, new_view, false);
803 address_space_update_topology_pass(as, old_view, new_view, true);
804
805 /* Writes are protected by the BQL. */
806 atomic_rcu_set(&as->current_map, new_view);
807 call_rcu(old_view, flatview_unref, rcu);
808
809 /* Note that all the old MemoryRegions are still alive up to this
810 * point. This relieves most MemoryListeners from the need to
811 * ref/unref the MemoryRegions they get---unless they use them
812 * outside the iothread mutex, in which case precise reference
813 * counting is necessary.
814 */
815 flatview_unref(old_view);
816
817 address_space_update_ioeventfds(as);
818 }
819
820 void memory_region_transaction_begin(void)
821 {
822 qemu_flush_coalesced_mmio_buffer();
823 ++memory_region_transaction_depth;
824 }
825
826 static void memory_region_clear_pending(void)
827 {
828 memory_region_update_pending = false;
829 ioeventfd_update_pending = false;
830 }
831
832 void memory_region_transaction_commit(void)
833 {
834 AddressSpace *as;
835
836 assert(memory_region_transaction_depth);
837 --memory_region_transaction_depth;
838 if (!memory_region_transaction_depth) {
839 if (memory_region_update_pending) {
840 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
841
842 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
843 address_space_update_topology(as);
844 }
845
846 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
847 } else if (ioeventfd_update_pending) {
848 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
849 address_space_update_ioeventfds(as);
850 }
851 }
852 memory_region_clear_pending();
853 }
854 }
855
856 static void memory_region_destructor_none(MemoryRegion *mr)
857 {
858 }
859
860 static void memory_region_destructor_ram(MemoryRegion *mr)
861 {
862 qemu_ram_free(mr->ram_addr);
863 }
864
865 static void memory_region_destructor_alias(MemoryRegion *mr)
866 {
867 memory_region_unref(mr->alias);
868 }
869
870 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
871 {
872 qemu_ram_free_from_ptr(mr->ram_addr);
873 }
874
875 static void memory_region_destructor_rom_device(MemoryRegion *mr)
876 {
877 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
878 }
879
880 static bool memory_region_need_escape(char c)
881 {
882 return c == '/' || c == '[' || c == '\\' || c == ']';
883 }
884
885 static char *memory_region_escape_name(const char *name)
886 {
887 const char *p;
888 char *escaped, *q;
889 uint8_t c;
890 size_t bytes = 0;
891
892 for (p = name; *p; p++) {
893 bytes += memory_region_need_escape(*p) ? 4 : 1;
894 }
895 if (bytes == p - name) {
896 return g_memdup(name, bytes + 1);
897 }
898
899 escaped = g_malloc(bytes + 1);
900 for (p = name, q = escaped; *p; p++) {
901 c = *p;
902 if (unlikely(memory_region_need_escape(c))) {
903 *q++ = '\\';
904 *q++ = 'x';
905 *q++ = "0123456789abcdef"[c >> 4];
906 c = "0123456789abcdef"[c & 15];
907 }
908 *q++ = c;
909 }
910 *q = 0;
911 return escaped;
912 }
913
914 void memory_region_init(MemoryRegion *mr,
915 Object *owner,
916 const char *name,
917 uint64_t size)
918 {
919 if (!owner) {
920 owner = container_get(qdev_get_machine(), "/unattached");
921 }
922
923 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
924 mr->size = int128_make64(size);
925 if (size == UINT64_MAX) {
926 mr->size = int128_2_64();
927 }
928 mr->name = g_strdup(name);
929
930 if (name) {
931 char *escaped_name = memory_region_escape_name(name);
932 char *name_array = g_strdup_printf("%s[*]", escaped_name);
933 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
934 object_unref(OBJECT(mr));
935 g_free(name_array);
936 g_free(escaped_name);
937 }
938 }
939
940 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
941 const char *name, Error **errp)
942 {
943 MemoryRegion *mr = MEMORY_REGION(obj);
944 uint64_t value = mr->addr;
945
946 visit_type_uint64(v, &value, name, errp);
947 }
948
949 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
950 const char *name, Error **errp)
951 {
952 MemoryRegion *mr = MEMORY_REGION(obj);
953 gchar *path = (gchar *)"";
954
955 if (mr->container) {
956 path = object_get_canonical_path(OBJECT(mr->container));
957 }
958 visit_type_str(v, &path, name, errp);
959 if (mr->container) {
960 g_free(path);
961 }
962 }
963
964 static Object *memory_region_resolve_container(Object *obj, void *opaque,
965 const char *part)
966 {
967 MemoryRegion *mr = MEMORY_REGION(obj);
968
969 return OBJECT(mr->container);
970 }
971
972 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
973 const char *name, Error **errp)
974 {
975 MemoryRegion *mr = MEMORY_REGION(obj);
976 int32_t value = mr->priority;
977
978 visit_type_int32(v, &value, name, errp);
979 }
980
981 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
982 {
983 MemoryRegion *mr = MEMORY_REGION(obj);
984
985 return mr->may_overlap;
986 }
987
988 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
989 const char *name, Error **errp)
990 {
991 MemoryRegion *mr = MEMORY_REGION(obj);
992 uint64_t value = memory_region_size(mr);
993
994 visit_type_uint64(v, &value, name, errp);
995 }
996
997 static void memory_region_initfn(Object *obj)
998 {
999 MemoryRegion *mr = MEMORY_REGION(obj);
1000 ObjectProperty *op;
1001
1002 mr->ops = &unassigned_mem_ops;
1003 mr->enabled = true;
1004 mr->romd_mode = true;
1005 mr->destructor = memory_region_destructor_none;
1006 QTAILQ_INIT(&mr->subregions);
1007 QTAILQ_INIT(&mr->coalesced);
1008
1009 op = object_property_add(OBJECT(mr), "container",
1010 "link<" TYPE_MEMORY_REGION ">",
1011 memory_region_get_container,
1012 NULL, /* memory_region_set_container */
1013 NULL, NULL, &error_abort);
1014 op->resolve = memory_region_resolve_container;
1015
1016 object_property_add(OBJECT(mr), "addr", "uint64",
1017 memory_region_get_addr,
1018 NULL, /* memory_region_set_addr */
1019 NULL, NULL, &error_abort);
1020 object_property_add(OBJECT(mr), "priority", "uint32",
1021 memory_region_get_priority,
1022 NULL, /* memory_region_set_priority */
1023 NULL, NULL, &error_abort);
1024 object_property_add_bool(OBJECT(mr), "may-overlap",
1025 memory_region_get_may_overlap,
1026 NULL, /* memory_region_set_may_overlap */
1027 &error_abort);
1028 object_property_add(OBJECT(mr), "size", "uint64",
1029 memory_region_get_size,
1030 NULL, /* memory_region_set_size, */
1031 NULL, NULL, &error_abort);
1032 }
1033
1034 static int qemu_target_backtrace(target_ulong *array, size_t size)
1035 {
1036 int n = 0;
1037 if (size >= 2) {
1038 #if defined(TARGET_ARM)
1039 CPUArchState *env = current_cpu->env_ptr;
1040 array[0] = env->regs[15];
1041 array[1] = env->regs[14];
1042 #elif defined(TARGET_MIPS)
1043 CPUArchState *env = current_cpu->env_ptr;
1044 array[0] = env->active_tc.PC;
1045 array[1] = env->active_tc.gpr[31];
1046 #else
1047 array[0] = 0;
1048 array[1] = 0;
1049 #endif
1050 n = 2;
1051 }
1052 return n;
1053 }
1054
1055 #include "disas/disas.h"
1056 const char *qemu_sprint_backtrace(char *buffer, size_t length)
1057 {
1058 char *p = buffer;
1059 if (current_cpu) {
1060 target_ulong caller[2];
1061 const char *symbol;
1062 qemu_target_backtrace(caller, 2);
1063 symbol = lookup_symbol(caller[0]);
1064 p += sprintf(p, "[%s]", symbol);
1065 symbol = lookup_symbol(caller[1]);
1066 p += sprintf(p, "[%s]", symbol);
1067 } else {
1068 p += sprintf(p, "[cpu not running]");
1069 }
1070 assert((p - buffer) < length);
1071 return buffer;
1072 }
1073
1074 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1075 unsigned size)
1076 {
1077 if (trace_unassigned) {
1078 char buffer[256];
1079 fprintf(stderr, "Unassigned mem read " TARGET_FMT_plx " %s\n",
1080 addr, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1081 }
1082 //~ vm_stop(0);
1083 if (current_cpu != NULL) {
1084 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1085 }
1086 return 0;
1087 }
1088
1089 static void unassigned_mem_write(void *opaque, hwaddr addr,
1090 uint64_t val, unsigned size)
1091 {
1092 if (trace_unassigned) {
1093 char buffer[256];
1094 fprintf(stderr, "Unassigned mem write " TARGET_FMT_plx
1095 " = 0x%" PRIx64 " %s\n",
1096 addr, val, qemu_sprint_backtrace(buffer, sizeof(buffer)));
1097 }
1098 if (current_cpu != NULL) {
1099 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1100 }
1101 }
1102
1103 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1104 unsigned size, bool is_write)
1105 {
1106 return false;
1107 }
1108
1109 const MemoryRegionOps unassigned_mem_ops = {
1110 .valid.accepts = unassigned_mem_accepts,
1111 .endianness = DEVICE_NATIVE_ENDIAN,
1112 };
1113
1114 bool memory_region_access_valid(MemoryRegion *mr,
1115 hwaddr addr,
1116 unsigned size,
1117 bool is_write)
1118 {
1119 int access_size_min, access_size_max;
1120 int access_size, i;
1121
1122 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1123 fprintf(stderr, "Misaligned i/o with size %u for memory region %s\n",
1124 size, mr->name);
1125 return false;
1126 }
1127
1128 if (!mr->ops->valid.accepts) {
1129 return true;
1130 }
1131
1132 access_size_min = mr->ops->valid.min_access_size;
1133 if (!mr->ops->valid.min_access_size) {
1134 access_size_min = 1;
1135 }
1136
1137 access_size_max = mr->ops->valid.max_access_size;
1138 if (!mr->ops->valid.max_access_size) {
1139 access_size_max = 4;
1140 }
1141
1142 access_size = MAX(MIN(size, access_size_max), access_size_min);
1143 for (i = 0; i < size; i += access_size) {
1144 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1145 is_write)) {
1146 return false;
1147 }
1148 }
1149
1150 return true;
1151 }
1152
1153 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1154 hwaddr addr,
1155 uint64_t *pval,
1156 unsigned size,
1157 MemTxAttrs attrs)
1158 {
1159 *pval = 0;
1160
1161 if (mr->ops->read) {
1162 return access_with_adjusted_size(addr, pval, size,
1163 mr->ops->impl.min_access_size,
1164 mr->ops->impl.max_access_size,
1165 memory_region_read_accessor,
1166 mr, attrs);
1167 } else if (mr->ops->read_with_attrs) {
1168 return access_with_adjusted_size(addr, pval, size,
1169 mr->ops->impl.min_access_size,
1170 mr->ops->impl.max_access_size,
1171 memory_region_read_with_attrs_accessor,
1172 mr, attrs);
1173 } else {
1174 return access_with_adjusted_size(addr, pval, size, 1, 4,
1175 memory_region_oldmmio_read_accessor,
1176 mr, attrs);
1177 }
1178 }
1179
1180 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1181 hwaddr addr,
1182 uint64_t *pval,
1183 unsigned size,
1184 MemTxAttrs attrs)
1185 {
1186 MemTxResult r;
1187
1188 if (!memory_region_access_valid(mr, addr, size, false)) {
1189 *pval = unassigned_mem_read(mr, addr, size);
1190 return MEMTX_DECODE_ERROR;
1191 }
1192
1193 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1194 adjust_endianness(mr, pval, size);
1195 return r;
1196 }
1197
1198 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1199 hwaddr addr,
1200 uint64_t data,
1201 unsigned size,
1202 MemTxAttrs attrs)
1203 {
1204 if (!memory_region_access_valid(mr, addr, size, true)) {
1205 unassigned_mem_write(mr, addr, data, size);
1206 return MEMTX_DECODE_ERROR;
1207 }
1208
1209 adjust_endianness(mr, &data, size);
1210
1211 if (mr->ops->write) {
1212 return access_with_adjusted_size(addr, &data, size,
1213 mr->ops->impl.min_access_size,
1214 mr->ops->impl.max_access_size,
1215 memory_region_write_accessor, mr,
1216 attrs);
1217 } else if (mr->ops->write_with_attrs) {
1218 return
1219 access_with_adjusted_size(addr, &data, size,
1220 mr->ops->impl.min_access_size,
1221 mr->ops->impl.max_access_size,
1222 memory_region_write_with_attrs_accessor,
1223 mr, attrs);
1224 } else {
1225 return access_with_adjusted_size(addr, &data, size, 1, 4,
1226 memory_region_oldmmio_write_accessor,
1227 mr, attrs);
1228 }
1229 }
1230
1231 void memory_region_init_io(MemoryRegion *mr,
1232 Object *owner,
1233 const MemoryRegionOps *ops,
1234 void *opaque,
1235 const char *name,
1236 uint64_t size)
1237 {
1238 memory_region_init(mr, owner, name, size);
1239 mr->ops = ops;
1240 mr->opaque = opaque;
1241 mr->terminates = true;
1242 mr->ram_addr = ~(ram_addr_t)0;
1243 }
1244
1245 void memory_region_init_ram(MemoryRegion *mr,
1246 Object *owner,
1247 const char *name,
1248 uint64_t size,
1249 Error **errp)
1250 {
1251 memory_region_init(mr, owner, name, size);
1252 mr->ram = true;
1253 mr->terminates = true;
1254 mr->destructor = memory_region_destructor_ram;
1255 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1256 }
1257
1258 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1259 Object *owner,
1260 const char *name,
1261 uint64_t size,
1262 uint64_t max_size,
1263 void (*resized)(const char*,
1264 uint64_t length,
1265 void *host),
1266 Error **errp)
1267 {
1268 memory_region_init(mr, owner, name, size);
1269 mr->ram = true;
1270 mr->terminates = true;
1271 mr->destructor = memory_region_destructor_ram;
1272 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1273 }
1274
1275 #ifdef __linux__
1276 void memory_region_init_ram_from_file(MemoryRegion *mr,
1277 struct Object *owner,
1278 const char *name,
1279 uint64_t size,
1280 bool share,
1281 const char *path,
1282 Error **errp)
1283 {
1284 memory_region_init(mr, owner, name, size);
1285 mr->ram = true;
1286 mr->terminates = true;
1287 mr->destructor = memory_region_destructor_ram;
1288 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1289 }
1290 #endif
1291
1292 void memory_region_init_ram_ptr(MemoryRegion *mr,
1293 Object *owner,
1294 const char *name,
1295 uint64_t size,
1296 void *ptr)
1297 {
1298 memory_region_init(mr, owner, name, size);
1299 mr->ram = true;
1300 mr->terminates = true;
1301 mr->destructor = memory_region_destructor_ram_from_ptr;
1302
1303 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1304 assert(ptr != NULL);
1305 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1306 }
1307
1308 void memory_region_set_skip_dump(MemoryRegion *mr)
1309 {
1310 mr->skip_dump = true;
1311 }
1312
1313 void memory_region_init_alias(MemoryRegion *mr,
1314 Object *owner,
1315 const char *name,
1316 MemoryRegion *orig,
1317 hwaddr offset,
1318 uint64_t size)
1319 {
1320 memory_region_init(mr, owner, name, size);
1321 memory_region_ref(orig);
1322 mr->destructor = memory_region_destructor_alias;
1323 mr->alias = orig;
1324 mr->alias_offset = offset;
1325 }
1326
1327 void memory_region_init_rom_device(MemoryRegion *mr,
1328 Object *owner,
1329 const MemoryRegionOps *ops,
1330 void *opaque,
1331 const char *name,
1332 uint64_t size,
1333 Error **errp)
1334 {
1335 memory_region_init(mr, owner, name, size);
1336 mr->ops = ops;
1337 mr->opaque = opaque;
1338 mr->terminates = true;
1339 mr->rom_device = true;
1340 mr->destructor = memory_region_destructor_rom_device;
1341 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1342 }
1343
1344 void memory_region_init_iommu(MemoryRegion *mr,
1345 Object *owner,
1346 const MemoryRegionIOMMUOps *ops,
1347 const char *name,
1348 uint64_t size)
1349 {
1350 memory_region_init(mr, owner, name, size);
1351 mr->iommu_ops = ops,
1352 mr->terminates = true; /* then re-forwards */
1353 notifier_list_init(&mr->iommu_notify);
1354 }
1355
1356 void memory_region_init_reservation(MemoryRegion *mr,
1357 Object *owner,
1358 const char *name,
1359 uint64_t size)
1360 {
1361 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1362 }
1363
1364 static void memory_region_finalize(Object *obj)
1365 {
1366 MemoryRegion *mr = MEMORY_REGION(obj);
1367
1368 assert(QTAILQ_EMPTY(&mr->subregions));
1369 mr->destructor(mr);
1370 memory_region_clear_coalescing(mr);
1371 g_free((char *)mr->name);
1372 g_free(mr->ioeventfds);
1373 }
1374
1375 Object *memory_region_owner(MemoryRegion *mr)
1376 {
1377 Object *obj = OBJECT(mr);
1378 return obj->parent;
1379 }
1380
1381 void memory_region_ref(MemoryRegion *mr)
1382 {
1383 /* MMIO callbacks most likely will access data that belongs
1384 * to the owner, hence the need to ref/unref the owner whenever
1385 * the memory region is in use.
1386 *
1387 * The memory region is a child of its owner. As long as the
1388 * owner doesn't call unparent itself on the memory region,
1389 * ref-ing the owner will also keep the memory region alive.
1390 * Memory regions without an owner are supposed to never go away,
1391 * but we still ref/unref them for debugging purposes.
1392 */
1393 Object *obj = OBJECT(mr);
1394 if (obj && obj->parent) {
1395 object_ref(obj->parent);
1396 } else {
1397 object_ref(obj);
1398 }
1399 }
1400
1401 void memory_region_unref(MemoryRegion *mr)
1402 {
1403 Object *obj = OBJECT(mr);
1404 if (obj && obj->parent) {
1405 object_unref(obj->parent);
1406 } else {
1407 object_unref(obj);
1408 }
1409 }
1410
1411 uint64_t memory_region_size(MemoryRegion *mr)
1412 {
1413 if (int128_eq(mr->size, int128_2_64())) {
1414 return UINT64_MAX;
1415 }
1416 return int128_get64(mr->size);
1417 }
1418
1419 const char *memory_region_name(const MemoryRegion *mr)
1420 {
1421 if (!mr->name) {
1422 ((MemoryRegion *)mr)->name =
1423 object_get_canonical_path_component(OBJECT(mr));
1424 }
1425 return mr->name;
1426 }
1427
1428 bool memory_region_is_ram(MemoryRegion *mr)
1429 {
1430 return mr->ram;
1431 }
1432
1433 bool memory_region_is_skip_dump(MemoryRegion *mr)
1434 {
1435 return mr->skip_dump;
1436 }
1437
1438 bool memory_region_is_logging(MemoryRegion *mr)
1439 {
1440 return mr->dirty_log_mask;
1441 }
1442
1443 bool memory_region_is_rom(MemoryRegion *mr)
1444 {
1445 return mr->ram && mr->readonly;
1446 }
1447
1448 bool memory_region_is_iommu(MemoryRegion *mr)
1449 {
1450 return mr->iommu_ops;
1451 }
1452
1453 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1454 {
1455 notifier_list_add(&mr->iommu_notify, n);
1456 }
1457
1458 void memory_region_unregister_iommu_notifier(Notifier *n)
1459 {
1460 notifier_remove(n);
1461 }
1462
1463 void memory_region_notify_iommu(MemoryRegion *mr,
1464 IOMMUTLBEntry entry)
1465 {
1466 assert(memory_region_is_iommu(mr));
1467 notifier_list_notify(&mr->iommu_notify, &entry);
1468 }
1469
1470 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1471 {
1472 uint8_t mask = 1 << client;
1473
1474 memory_region_transaction_begin();
1475 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1476 memory_region_update_pending |= mr->enabled;
1477 memory_region_transaction_commit();
1478 }
1479
1480 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1481 hwaddr size, unsigned client)
1482 {
1483 assert(mr->terminates);
1484 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1485 }
1486
1487 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1488 hwaddr size)
1489 {
1490 assert(mr->terminates);
1491 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
1492 }
1493
1494 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1495 hwaddr size, unsigned client)
1496 {
1497 bool ret;
1498 assert(mr->terminates);
1499 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1500 if (ret) {
1501 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1502 }
1503 return ret;
1504 }
1505
1506
1507 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1508 {
1509 AddressSpace *as;
1510 FlatRange *fr;
1511
1512 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1513 FlatView *view = address_space_get_flatview(as);
1514 FOR_EACH_FLAT_RANGE(fr, view) {
1515 if (fr->mr == mr) {
1516 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1517 }
1518 }
1519 flatview_unref(view);
1520 }
1521 }
1522
1523 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1524 {
1525 if (mr->readonly != readonly) {
1526 memory_region_transaction_begin();
1527 mr->readonly = readonly;
1528 memory_region_update_pending |= mr->enabled;
1529 memory_region_transaction_commit();
1530 }
1531 }
1532
1533 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1534 {
1535 if (mr->romd_mode != romd_mode) {
1536 memory_region_transaction_begin();
1537 mr->romd_mode = romd_mode;
1538 memory_region_update_pending |= mr->enabled;
1539 memory_region_transaction_commit();
1540 }
1541 }
1542
1543 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1544 hwaddr size, unsigned client)
1545 {
1546 assert(mr->terminates);
1547 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1548 }
1549
1550 int memory_region_get_fd(MemoryRegion *mr)
1551 {
1552 if (mr->alias) {
1553 return memory_region_get_fd(mr->alias);
1554 }
1555
1556 assert(mr->terminates);
1557
1558 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1559 }
1560
1561 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1562 {
1563 if (mr->alias) {
1564 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1565 }
1566
1567 assert(mr->terminates);
1568
1569 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1570 }
1571
1572 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1573 {
1574 assert(mr->terminates);
1575
1576 qemu_ram_resize(mr->ram_addr, newsize, errp);
1577 }
1578
1579 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1580 {
1581 FlatView *view;
1582 FlatRange *fr;
1583 CoalescedMemoryRange *cmr;
1584 AddrRange tmp;
1585 MemoryRegionSection section;
1586
1587 view = address_space_get_flatview(as);
1588 FOR_EACH_FLAT_RANGE(fr, view) {
1589 if (fr->mr == mr) {
1590 section = (MemoryRegionSection) {
1591 .address_space = as,
1592 .offset_within_address_space = int128_get64(fr->addr.start),
1593 .size = fr->addr.size,
1594 };
1595
1596 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1597 int128_get64(fr->addr.start),
1598 int128_get64(fr->addr.size));
1599 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1600 tmp = addrrange_shift(cmr->addr,
1601 int128_sub(fr->addr.start,
1602 int128_make64(fr->offset_in_region)));
1603 if (!addrrange_intersects(tmp, fr->addr)) {
1604 continue;
1605 }
1606 tmp = addrrange_intersection(tmp, fr->addr);
1607 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1608 int128_get64(tmp.start),
1609 int128_get64(tmp.size));
1610 }
1611 }
1612 }
1613 flatview_unref(view);
1614 }
1615
1616 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1617 {
1618 AddressSpace *as;
1619
1620 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1621 memory_region_update_coalesced_range_as(mr, as);
1622 }
1623 }
1624
1625 void memory_region_set_coalescing(MemoryRegion *mr)
1626 {
1627 memory_region_clear_coalescing(mr);
1628 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1629 }
1630
1631 void memory_region_add_coalescing(MemoryRegion *mr,
1632 hwaddr offset,
1633 uint64_t size)
1634 {
1635 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1636
1637 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1638 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1639 memory_region_update_coalesced_range(mr);
1640 memory_region_set_flush_coalesced(mr);
1641 }
1642
1643 void memory_region_clear_coalescing(MemoryRegion *mr)
1644 {
1645 CoalescedMemoryRange *cmr;
1646 bool updated = false;
1647
1648 qemu_flush_coalesced_mmio_buffer();
1649 mr->flush_coalesced_mmio = false;
1650
1651 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1652 cmr = QTAILQ_FIRST(&mr->coalesced);
1653 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1654 g_free(cmr);
1655 updated = true;
1656 }
1657
1658 if (updated) {
1659 memory_region_update_coalesced_range(mr);
1660 }
1661 }
1662
1663 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1664 {
1665 mr->flush_coalesced_mmio = true;
1666 }
1667
1668 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1669 {
1670 qemu_flush_coalesced_mmio_buffer();
1671 if (QTAILQ_EMPTY(&mr->coalesced)) {
1672 mr->flush_coalesced_mmio = false;
1673 }
1674 }
1675
1676 void memory_region_add_eventfd(MemoryRegion *mr,
1677 hwaddr addr,
1678 unsigned size,
1679 bool match_data,
1680 uint64_t data,
1681 EventNotifier *e)
1682 {
1683 MemoryRegionIoeventfd mrfd = {
1684 .addr.start = int128_make64(addr),
1685 .addr.size = int128_make64(size),
1686 .match_data = match_data,
1687 .data = data,
1688 .e = e,
1689 };
1690 unsigned i;
1691
1692 adjust_endianness(mr, &mrfd.data, size);
1693 memory_region_transaction_begin();
1694 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1695 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1696 break;
1697 }
1698 }
1699 ++mr->ioeventfd_nb;
1700 mr->ioeventfds = g_realloc(mr->ioeventfds,
1701 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1702 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1703 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1704 mr->ioeventfds[i] = mrfd;
1705 ioeventfd_update_pending |= mr->enabled;
1706 memory_region_transaction_commit();
1707 }
1708
1709 void memory_region_del_eventfd(MemoryRegion *mr,
1710 hwaddr addr,
1711 unsigned size,
1712 bool match_data,
1713 uint64_t data,
1714 EventNotifier *e)
1715 {
1716 MemoryRegionIoeventfd mrfd = {
1717 .addr.start = int128_make64(addr),
1718 .addr.size = int128_make64(size),
1719 .match_data = match_data,
1720 .data = data,
1721 .e = e,
1722 };
1723 unsigned i;
1724
1725 adjust_endianness(mr, &mrfd.data, size);
1726 memory_region_transaction_begin();
1727 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1728 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1729 break;
1730 }
1731 }
1732 assert(i != mr->ioeventfd_nb);
1733 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1734 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1735 --mr->ioeventfd_nb;
1736 mr->ioeventfds = g_realloc(mr->ioeventfds,
1737 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1738 ioeventfd_update_pending |= mr->enabled;
1739 memory_region_transaction_commit();
1740 }
1741
1742 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1743 {
1744 hwaddr offset = subregion->addr;
1745 MemoryRegion *mr = subregion->container;
1746 MemoryRegion *other;
1747
1748 memory_region_transaction_begin();
1749
1750 memory_region_ref(subregion);
1751 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1752 if (subregion->may_overlap || other->may_overlap) {
1753 continue;
1754 }
1755 if (int128_ge(int128_make64(offset),
1756 int128_add(int128_make64(other->addr), other->size))
1757 || int128_le(int128_add(int128_make64(offset), subregion->size),
1758 int128_make64(other->addr))) {
1759 continue;
1760 }
1761 #if 0
1762 printf("warning: subregion collision %llx/%llx (%s) "
1763 "vs %llx/%llx (%s)\n",
1764 (unsigned long long)offset,
1765 (unsigned long long)int128_get64(subregion->size),
1766 subregion->name,
1767 (unsigned long long)other->addr,
1768 (unsigned long long)int128_get64(other->size),
1769 other->name);
1770 #endif
1771 }
1772 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1773 if (subregion->priority >= other->priority) {
1774 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1775 goto done;
1776 }
1777 }
1778 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1779 done:
1780 memory_region_update_pending |= mr->enabled && subregion->enabled;
1781 memory_region_transaction_commit();
1782 }
1783
1784 static void memory_region_add_subregion_common(MemoryRegion *mr,
1785 hwaddr offset,
1786 MemoryRegion *subregion)
1787 {
1788 assert(!subregion->container);
1789 subregion->container = mr;
1790 subregion->addr = offset;
1791 memory_region_update_container_subregions(subregion);
1792 }
1793
1794 void memory_region_add_subregion(MemoryRegion *mr,
1795 hwaddr offset,
1796 MemoryRegion *subregion)
1797 {
1798 subregion->may_overlap = false;
1799 subregion->priority = 0;
1800 memory_region_add_subregion_common(mr, offset, subregion);
1801 }
1802
1803 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1804 hwaddr offset,
1805 MemoryRegion *subregion,
1806 int priority)
1807 {
1808 subregion->may_overlap = true;
1809 subregion->priority = priority;
1810 memory_region_add_subregion_common(mr, offset, subregion);
1811 }
1812
1813 void memory_region_del_subregion(MemoryRegion *mr,
1814 MemoryRegion *subregion)
1815 {
1816 memory_region_transaction_begin();
1817 assert(subregion->container == mr);
1818 subregion->container = NULL;
1819 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1820 memory_region_unref(subregion);
1821 memory_region_update_pending |= mr->enabled && subregion->enabled;
1822 memory_region_transaction_commit();
1823 }
1824
1825 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1826 {
1827 if (enabled == mr->enabled) {
1828 return;
1829 }
1830 memory_region_transaction_begin();
1831 mr->enabled = enabled;
1832 memory_region_update_pending = true;
1833 memory_region_transaction_commit();
1834 }
1835
1836 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1837 {
1838 Int128 s = int128_make64(size);
1839
1840 if (size == UINT64_MAX) {
1841 s = int128_2_64();
1842 }
1843 if (int128_eq(s, mr->size)) {
1844 return;
1845 }
1846 memory_region_transaction_begin();
1847 mr->size = s;
1848 memory_region_update_pending = true;
1849 memory_region_transaction_commit();
1850 }
1851
1852 static void memory_region_readd_subregion(MemoryRegion *mr)
1853 {
1854 MemoryRegion *container = mr->container;
1855
1856 if (container) {
1857 memory_region_transaction_begin();
1858 memory_region_ref(mr);
1859 memory_region_del_subregion(container, mr);
1860 mr->container = container;
1861 memory_region_update_container_subregions(mr);
1862 memory_region_unref(mr);
1863 memory_region_transaction_commit();
1864 }
1865 }
1866
1867 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1868 {
1869 if (addr != mr->addr) {
1870 mr->addr = addr;
1871 memory_region_readd_subregion(mr);
1872 }
1873 }
1874
1875 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1876 {
1877 assert(mr->alias);
1878
1879 if (offset == mr->alias_offset) {
1880 return;
1881 }
1882
1883 memory_region_transaction_begin();
1884 mr->alias_offset = offset;
1885 memory_region_update_pending |= mr->enabled;
1886 memory_region_transaction_commit();
1887 }
1888
1889 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1890 {
1891 return mr->ram_addr;
1892 }
1893
1894 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1895 {
1896 return mr->align;
1897 }
1898
1899 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1900 {
1901 const AddrRange *addr = addr_;
1902 const FlatRange *fr = fr_;
1903
1904 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1905 return -1;
1906 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1907 return 1;
1908 }
1909 return 0;
1910 }
1911
1912 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1913 {
1914 return bsearch(&addr, view->ranges, view->nr,
1915 sizeof(FlatRange), cmp_flatrange_addr);
1916 }
1917
1918 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1919 {
1920 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1921 if (!mr || (mr == container)) {
1922 return false;
1923 }
1924 memory_region_unref(mr);
1925 return true;
1926 }
1927
1928 bool memory_region_is_mapped(MemoryRegion *mr)
1929 {
1930 return mr->container ? true : false;
1931 }
1932
1933 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1934 hwaddr addr, uint64_t size)
1935 {
1936 MemoryRegionSection ret = { .mr = NULL };
1937 MemoryRegion *root;
1938 AddressSpace *as;
1939 AddrRange range;
1940 FlatView *view;
1941 FlatRange *fr;
1942
1943 addr += mr->addr;
1944 for (root = mr; root->container; ) {
1945 root = root->container;
1946 addr += root->addr;
1947 }
1948
1949 as = memory_region_to_address_space(root);
1950 if (!as) {
1951 return ret;
1952 }
1953 range = addrrange_make(int128_make64(addr), int128_make64(size));
1954
1955 rcu_read_lock();
1956 view = atomic_rcu_read(&as->current_map);
1957 fr = flatview_lookup(view, range);
1958 if (!fr) {
1959 goto out;
1960 }
1961
1962 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1963 --fr;
1964 }
1965
1966 ret.mr = fr->mr;
1967 ret.address_space = as;
1968 range = addrrange_intersection(range, fr->addr);
1969 ret.offset_within_region = fr->offset_in_region;
1970 ret.offset_within_region += int128_get64(int128_sub(range.start,
1971 fr->addr.start));
1972 ret.size = range.size;
1973 ret.offset_within_address_space = int128_get64(range.start);
1974 ret.readonly = fr->readonly;
1975 memory_region_ref(ret.mr);
1976 out:
1977 rcu_read_unlock();
1978 return ret;
1979 }
1980
1981 void address_space_sync_dirty_bitmap(AddressSpace *as)
1982 {
1983 FlatView *view;
1984 FlatRange *fr;
1985
1986 view = address_space_get_flatview(as);
1987 FOR_EACH_FLAT_RANGE(fr, view) {
1988 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1989 }
1990 flatview_unref(view);
1991 }
1992
1993 void memory_global_dirty_log_start(void)
1994 {
1995 global_dirty_log = true;
1996 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1997 }
1998
1999 void memory_global_dirty_log_stop(void)
2000 {
2001 global_dirty_log = false;
2002 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2003 }
2004
2005 static void listener_add_address_space(MemoryListener *listener,
2006 AddressSpace *as)
2007 {
2008 FlatView *view;
2009 FlatRange *fr;
2010
2011 if (listener->address_space_filter
2012 && listener->address_space_filter != as) {
2013 return;
2014 }
2015
2016 if (global_dirty_log) {
2017 if (listener->log_global_start) {
2018 listener->log_global_start(listener);
2019 }
2020 }
2021
2022 view = address_space_get_flatview(as);
2023 FOR_EACH_FLAT_RANGE(fr, view) {
2024 MemoryRegionSection section = {
2025 .mr = fr->mr,
2026 .address_space = as,
2027 .offset_within_region = fr->offset_in_region,
2028 .size = fr->addr.size,
2029 .offset_within_address_space = int128_get64(fr->addr.start),
2030 .readonly = fr->readonly,
2031 };
2032 if (listener->region_add) {
2033 listener->region_add(listener, &section);
2034 }
2035 }
2036 flatview_unref(view);
2037 }
2038
2039 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2040 {
2041 MemoryListener *other = NULL;
2042 AddressSpace *as;
2043
2044 listener->address_space_filter = filter;
2045 if (QTAILQ_EMPTY(&memory_listeners)
2046 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2047 memory_listeners)->priority) {
2048 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2049 } else {
2050 QTAILQ_FOREACH(other, &memory_listeners, link) {
2051 if (listener->priority < other->priority) {
2052 break;
2053 }
2054 }
2055 QTAILQ_INSERT_BEFORE(other, listener, link);
2056 }
2057
2058 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2059 listener_add_address_space(listener, as);
2060 }
2061 }
2062
2063 void memory_listener_unregister(MemoryListener *listener)
2064 {
2065 QTAILQ_REMOVE(&memory_listeners, listener, link);
2066 }
2067
2068 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2069 {
2070 memory_region_ref(root);
2071 memory_region_transaction_begin();
2072 as->root = root;
2073 as->current_map = g_new(FlatView, 1);
2074 flatview_init(as->current_map);
2075 as->ioeventfd_nb = 0;
2076 as->ioeventfds = NULL;
2077 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2078 as->name = g_strdup(name ? name : "anonymous");
2079 address_space_init_dispatch(as);
2080 memory_region_update_pending |= root->enabled;
2081 memory_region_transaction_commit();
2082 }
2083
2084 static void do_address_space_destroy(AddressSpace *as)
2085 {
2086 MemoryListener *listener;
2087
2088 address_space_destroy_dispatch(as);
2089
2090 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2091 assert(listener->address_space_filter != as);
2092 }
2093
2094 flatview_unref(as->current_map);
2095 g_free(as->name);
2096 g_free(as->ioeventfds);
2097 memory_region_unref(as->root);
2098 }
2099
2100 void address_space_destroy(AddressSpace *as)
2101 {
2102 MemoryRegion *root = as->root;
2103
2104 /* Flush out anything from MemoryListeners listening in on this */
2105 memory_region_transaction_begin();
2106 as->root = NULL;
2107 memory_region_transaction_commit();
2108 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2109 address_space_unregister(as);
2110
2111 /* At this point, as->dispatch and as->current_map are dummy
2112 * entries that the guest should never use. Wait for the old
2113 * values to expire before freeing the data.
2114 */
2115 as->root = root;
2116 call_rcu(as, do_address_space_destroy, rcu);
2117 }
2118
2119 typedef struct MemoryRegionList MemoryRegionList;
2120
2121 struct MemoryRegionList {
2122 const MemoryRegion *mr;
2123 QTAILQ_ENTRY(MemoryRegionList) queue;
2124 };
2125
2126 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2127
2128 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2129 const MemoryRegion *mr, unsigned int level,
2130 hwaddr base,
2131 MemoryRegionListHead *alias_print_queue)
2132 {
2133 MemoryRegionList *new_ml, *ml, *next_ml;
2134 MemoryRegionListHead submr_print_queue;
2135 const MemoryRegion *submr;
2136 unsigned int i;
2137
2138 if (!mr) {
2139 return;
2140 }
2141
2142 for (i = 0; i < level; i++) {
2143 mon_printf(f, " ");
2144 }
2145
2146 if (mr->alias) {
2147 MemoryRegionList *ml;
2148 bool found = false;
2149
2150 /* check if the alias is already in the queue */
2151 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2152 if (ml->mr == mr->alias) {
2153 found = true;
2154 }
2155 }
2156
2157 if (!found) {
2158 ml = g_new(MemoryRegionList, 1);
2159 ml->mr = mr->alias;
2160 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2161 }
2162 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2163 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2164 "-" TARGET_FMT_plx "%s\n",
2165 base + mr->addr,
2166 base + mr->addr
2167 + (int128_nz(mr->size) ?
2168 (hwaddr)int128_get64(int128_sub(mr->size,
2169 int128_one())) : 0),
2170 mr->priority,
2171 mr->romd_mode ? 'R' : '-',
2172 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2173 : '-',
2174 memory_region_name(mr),
2175 memory_region_name(mr->alias),
2176 mr->alias_offset,
2177 mr->alias_offset
2178 + (int128_nz(mr->size) ?
2179 (hwaddr)int128_get64(int128_sub(mr->size,
2180 int128_one())) : 0),
2181 mr->enabled ? "" : " [disabled]");
2182 } else {
2183 mon_printf(f,
2184 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2185 base + mr->addr,
2186 base + mr->addr
2187 + (int128_nz(mr->size) ?
2188 (hwaddr)int128_get64(int128_sub(mr->size,
2189 int128_one())) : 0),
2190 mr->priority,
2191 mr->romd_mode ? 'R' : '-',
2192 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2193 : '-',
2194 memory_region_name(mr),
2195 mr->enabled ? "" : " [disabled]");
2196 }
2197
2198 QTAILQ_INIT(&submr_print_queue);
2199
2200 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2201 new_ml = g_new(MemoryRegionList, 1);
2202 new_ml->mr = submr;
2203 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2204 if (new_ml->mr->addr < ml->mr->addr ||
2205 (new_ml->mr->addr == ml->mr->addr &&
2206 new_ml->mr->priority > ml->mr->priority)) {
2207 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2208 new_ml = NULL;
2209 break;
2210 }
2211 }
2212 if (new_ml) {
2213 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2214 }
2215 }
2216
2217 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2218 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2219 alias_print_queue);
2220 }
2221
2222 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2223 g_free(ml);
2224 }
2225 }
2226
2227 void mtree_info(fprintf_function mon_printf, void *f)
2228 {
2229 MemoryRegionListHead ml_head;
2230 MemoryRegionList *ml, *ml2;
2231 AddressSpace *as;
2232
2233 QTAILQ_INIT(&ml_head);
2234
2235 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2236 mon_printf(f, "address-space: %s\n", as->name);
2237 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2238 mon_printf(f, "\n");
2239 }
2240
2241 /* print aliased regions */
2242 QTAILQ_FOREACH(ml, &ml_head, queue) {
2243 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2244 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2245 mon_printf(f, "\n");
2246 }
2247
2248 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2249 g_free(ml);
2250 }
2251 }
2252
2253 static const TypeInfo memory_region_info = {
2254 .parent = TYPE_OBJECT,
2255 .name = TYPE_MEMORY_REGION,
2256 .instance_size = sizeof(MemoryRegion),
2257 .instance_init = memory_region_initfn,
2258 .instance_finalize = memory_region_finalize,
2259 };
2260
2261 static void memory_register_types(void)
2262 {
2263 type_register_static(&memory_region_info);
2264 }
2265
2266 type_init(memory_register_types)
AR7 emulation for QEMU