4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/visitor.h"
23 #include "hw/sysbus.h"
24 #include "sysemu/cpus.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/reset.h"
27 #include "sysemu/runstate.h"
28 #include "sysemu/numa.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/qtest.h"
31 #include "hw/pci/pci.h"
32 #include "hw/mem/nvdimm.h"
33 #include "migration/global_state.h"
34 #include "migration/vmstate.h"
35 #include "exec/confidential-guest-support.h"
36 #include "hw/virtio/virtio.h"
37 #include "hw/virtio/virtio-pci.h"
39 GlobalProperty hw_compat_5_2
[] = {
40 { "ICH9-LPC", "smm-compat", "on"},
41 { "PIIX4_PM", "smm-compat", "on"},
43 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
45 GlobalProperty hw_compat_5_1
[] = {
46 { "vhost-scsi", "num_queues", "1"},
47 { "vhost-user-blk", "num-queues", "1"},
48 { "vhost-user-scsi", "num_queues", "1"},
49 { "virtio-blk-device", "num-queues", "1"},
50 { "virtio-scsi-device", "num_queues", "1"},
51 { "nvme", "use-intel-id", "on"},
52 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
54 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
56 GlobalProperty hw_compat_5_0
[] = {
57 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
58 { "virtio-balloon-device", "page-poison", "false" },
59 { "vmport", "x-read-set-eax", "off" },
60 { "vmport", "x-signal-unsupported-cmd", "off" },
61 { "vmport", "x-report-vmx-type", "off" },
62 { "vmport", "x-cmds-v2", "off" },
63 { "virtio-device", "x-disable-legacy-check", "true" },
65 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
67 GlobalProperty hw_compat_4_2
[] = {
68 { "virtio-blk-device", "queue-size", "128"},
69 { "virtio-scsi-device", "virtqueue_size", "128"},
70 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
71 { "virtio-blk-device", "seg-max-adjust", "off"},
72 { "virtio-scsi-device", "seg_max_adjust", "off"},
73 { "vhost-blk-device", "seg_max_adjust", "off"},
74 { "usb-host", "suppress-remote-wake", "off" },
75 { "usb-redir", "suppress-remote-wake", "off" },
76 { "qxl", "revision", "4" },
77 { "qxl-vga", "revision", "4" },
78 { "fw_cfg", "acpi-mr-restore", "false" },
79 { "virtio-device", "use-disabled-flag", "false" },
81 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
83 GlobalProperty hw_compat_4_1
[] = {
84 { "virtio-pci", "x-pcie-flr-init", "off" },
86 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
88 GlobalProperty hw_compat_4_0
[] = {
89 { "VGA", "edid", "false" },
90 { "secondary-vga", "edid", "false" },
91 { "bochs-display", "edid", "false" },
92 { "virtio-vga", "edid", "false" },
93 { "virtio-gpu-device", "edid", "false" },
94 { "virtio-device", "use-started", "false" },
95 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
96 { "pl031", "migrate-tick-offset", "false" },
98 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
100 GlobalProperty hw_compat_3_1
[] = {
101 { "pcie-root-port", "x-speed", "2_5" },
102 { "pcie-root-port", "x-width", "1" },
103 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
104 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
105 { "tpm-crb", "ppi", "false" },
106 { "tpm-tis", "ppi", "false" },
107 { "usb-kbd", "serial", "42" },
108 { "usb-mouse", "serial", "42" },
109 { "usb-tablet", "serial", "42" },
110 { "virtio-blk-device", "discard", "false" },
111 { "virtio-blk-device", "write-zeroes", "false" },
112 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
113 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
115 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
117 GlobalProperty hw_compat_3_0
[] = {};
118 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
120 GlobalProperty hw_compat_2_12
[] = {
121 { "migration", "decompress-error-check", "off" },
122 { "hda-audio", "use-timer", "false" },
123 { "cirrus-vga", "global-vmstate", "true" },
124 { "VGA", "global-vmstate", "true" },
125 { "vmware-svga", "global-vmstate", "true" },
126 { "qxl-vga", "global-vmstate", "true" },
128 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
130 GlobalProperty hw_compat_2_11
[] = {
131 { "hpet", "hpet-offset-saved", "false" },
132 { "virtio-blk-pci", "vectors", "2" },
133 { "vhost-user-blk-pci", "vectors", "2" },
134 { "e1000", "migrate_tso_props", "off" },
136 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
138 GlobalProperty hw_compat_2_10
[] = {
139 { "virtio-mouse-device", "wheel-axis", "false" },
140 { "virtio-tablet-device", "wheel-axis", "false" },
142 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
144 GlobalProperty hw_compat_2_9
[] = {
145 { "pci-bridge", "shpc", "off" },
146 { "intel-iommu", "pt", "off" },
147 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
148 { "pcie-root-port", "x-migrate-msix", "false" },
150 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
152 GlobalProperty hw_compat_2_8
[] = {
153 { "fw_cfg_mem", "x-file-slots", "0x10" },
154 { "fw_cfg_io", "x-file-slots", "0x10" },
155 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
156 { "pci-bridge", "shpc", "on" },
157 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
158 { "virtio-pci", "x-pcie-deverr-init", "off" },
159 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
160 { "virtio-pci", "x-pcie-pm-init", "off" },
161 { "cirrus-vga", "vgamem_mb", "8" },
162 { "isa-cirrus-vga", "vgamem_mb", "8" },
164 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
166 GlobalProperty hw_compat_2_7
[] = {
167 { "virtio-pci", "page-per-vq", "on" },
168 { "virtio-serial-device", "emergency-write", "off" },
169 { "ioapic", "version", "0x11" },
170 { "intel-iommu", "x-buggy-eim", "true" },
171 { "virtio-pci", "x-ignore-backend-features", "on" },
173 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
175 GlobalProperty hw_compat_2_6
[] = {
176 { "virtio-mmio", "format_transport_address", "off" },
177 /* Optional because not all virtio-pci devices support legacy mode */
178 { "virtio-pci", "disable-modern", "on", .optional
= true },
179 { "virtio-pci", "disable-legacy", "off", .optional
= true },
181 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
183 GlobalProperty hw_compat_2_5
[] = {
184 { "isa-fdc", "fallback", "144" },
185 { "pvscsi", "x-old-pci-configuration", "on" },
186 { "pvscsi", "x-disable-pcie", "on" },
187 { "vmxnet3", "x-old-msi-offsets", "on" },
188 { "vmxnet3", "x-disable-pcie", "on" },
190 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
192 GlobalProperty hw_compat_2_4
[] = {
193 /* Optional because the 'scsi' property is Linux-only */
194 { "virtio-blk-device", "scsi", "true", .optional
= true },
195 { "e1000", "extra_mac_registers", "off" },
196 { "virtio-pci", "x-disable-pcie", "on" },
197 { "virtio-pci", "migrate-extra", "off" },
198 { "fw_cfg_mem", "dma_enabled", "off" },
199 { "fw_cfg_io", "dma_enabled", "off" }
201 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
203 GlobalProperty hw_compat_2_3
[] = {
204 { "virtio-blk-pci", "any_layout", "off" },
205 { "virtio-balloon-pci", "any_layout", "off" },
206 { "virtio-serial-pci", "any_layout", "off" },
207 { "virtio-9p-pci", "any_layout", "off" },
208 { "virtio-rng-pci", "any_layout", "off" },
209 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
210 { "migration", "send-configuration", "off" },
211 { "migration", "send-section-footer", "off" },
212 { "migration", "store-global-state", "off" },
214 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
216 GlobalProperty hw_compat_2_2
[] = {};
217 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
219 GlobalProperty hw_compat_2_1
[] = {
220 { "intel-hda", "old_msi_addr", "on" },
221 { "VGA", "qemu-extended-regs", "off" },
222 { "secondary-vga", "qemu-extended-regs", "off" },
223 { "virtio-scsi-pci", "any_layout", "off" },
224 { "usb-mouse", "usb_version", "1" },
225 { "usb-kbd", "usb_version", "1" },
226 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
228 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
230 MachineState
*current_machine
;
232 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
234 MachineState
*ms
= MACHINE(obj
);
236 return g_strdup(ms
->kernel_filename
);
239 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
241 MachineState
*ms
= MACHINE(obj
);
243 g_free(ms
->kernel_filename
);
244 ms
->kernel_filename
= g_strdup(value
);
247 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
249 MachineState
*ms
= MACHINE(obj
);
251 return g_strdup(ms
->initrd_filename
);
254 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
256 MachineState
*ms
= MACHINE(obj
);
258 g_free(ms
->initrd_filename
);
259 ms
->initrd_filename
= g_strdup(value
);
262 static char *machine_get_append(Object
*obj
, Error
**errp
)
264 MachineState
*ms
= MACHINE(obj
);
266 return g_strdup(ms
->kernel_cmdline
);
269 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
271 MachineState
*ms
= MACHINE(obj
);
273 g_free(ms
->kernel_cmdline
);
274 ms
->kernel_cmdline
= g_strdup(value
);
277 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
279 MachineState
*ms
= MACHINE(obj
);
281 return g_strdup(ms
->dtb
);
284 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
286 MachineState
*ms
= MACHINE(obj
);
289 ms
->dtb
= g_strdup(value
);
292 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
294 MachineState
*ms
= MACHINE(obj
);
296 return g_strdup(ms
->dumpdtb
);
299 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
301 MachineState
*ms
= MACHINE(obj
);
304 ms
->dumpdtb
= g_strdup(value
);
307 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
308 const char *name
, void *opaque
,
311 MachineState
*ms
= MACHINE(obj
);
312 int64_t value
= ms
->phandle_start
;
314 visit_type_int(v
, name
, &value
, errp
);
317 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
318 const char *name
, void *opaque
,
321 MachineState
*ms
= MACHINE(obj
);
324 if (!visit_type_int(v
, name
, &value
, errp
)) {
328 ms
->phandle_start
= value
;
331 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
333 MachineState
*ms
= MACHINE(obj
);
335 return g_strdup(ms
->dt_compatible
);
338 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
340 MachineState
*ms
= MACHINE(obj
);
342 g_free(ms
->dt_compatible
);
343 ms
->dt_compatible
= g_strdup(value
);
346 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
348 MachineState
*ms
= MACHINE(obj
);
350 return ms
->dump_guest_core
;
353 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
355 MachineState
*ms
= MACHINE(obj
);
357 ms
->dump_guest_core
= value
;
360 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
362 MachineState
*ms
= MACHINE(obj
);
364 return ms
->mem_merge
;
367 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
369 MachineState
*ms
= MACHINE(obj
);
371 ms
->mem_merge
= value
;
374 static bool machine_get_usb(Object
*obj
, Error
**errp
)
376 MachineState
*ms
= MACHINE(obj
);
381 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
383 MachineState
*ms
= MACHINE(obj
);
386 ms
->usb_disabled
= !value
;
389 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
391 MachineState
*ms
= MACHINE(obj
);
393 return ms
->enable_graphics
;
396 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
398 MachineState
*ms
= MACHINE(obj
);
400 ms
->enable_graphics
= value
;
403 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
405 MachineState
*ms
= MACHINE(obj
);
407 return g_strdup(ms
->firmware
);
410 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
412 MachineState
*ms
= MACHINE(obj
);
414 g_free(ms
->firmware
);
415 ms
->firmware
= g_strdup(value
);
418 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
420 MachineState
*ms
= MACHINE(obj
);
422 ms
->suppress_vmdesc
= value
;
425 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
427 MachineState
*ms
= MACHINE(obj
);
429 return ms
->suppress_vmdesc
;
432 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
434 MachineState
*ms
= MACHINE(obj
);
437 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
443 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
447 object_resolve_path_component(object_get_objects_root(), value
);
450 error_setg(errp
, "No such memory encryption object '%s'", value
);
454 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
457 static void machine_check_confidential_guest_support(const Object
*obj
,
463 * So far the only constraint is that the target has the
464 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
469 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
471 MachineState
*ms
= MACHINE(obj
);
473 return ms
->nvdimms_state
->is_enabled
;
476 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
478 MachineState
*ms
= MACHINE(obj
);
480 ms
->nvdimms_state
->is_enabled
= value
;
483 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
485 MachineState
*ms
= MACHINE(obj
);
487 return ms
->numa_state
->hmat_enabled
;
490 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
492 MachineState
*ms
= MACHINE(obj
);
494 ms
->numa_state
->hmat_enabled
= value
;
497 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
499 MachineState
*ms
= MACHINE(obj
);
501 return g_strdup(ms
->nvdimms_state
->persistence_string
);
504 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
507 MachineState
*ms
= MACHINE(obj
);
508 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
510 if (strcmp(value
, "cpu") == 0) {
511 nvdimms_state
->persistence
= 3;
512 } else if (strcmp(value
, "mem-ctrl") == 0) {
513 nvdimms_state
->persistence
= 2;
515 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
520 g_free(nvdimms_state
->persistence_string
);
521 nvdimms_state
->persistence_string
= g_strdup(value
);
524 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
526 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
529 static void validate_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
531 MachineState
*machine
= opaque
;
532 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
533 bool allowed
= false;
536 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
539 allowed
|= !!object_dynamic_cast(OBJECT(sbdev
), wl
->value
);
543 error_report("Option '-device %s' cannot be handled by this machine",
544 object_class_get_name(object_get_class(OBJECT(sbdev
))));
549 static char *machine_get_memdev(Object
*obj
, Error
**errp
)
551 MachineState
*ms
= MACHINE(obj
);
553 return g_strdup(ms
->ram_memdev_id
);
556 static void machine_set_memdev(Object
*obj
, const char *value
, Error
**errp
)
558 MachineState
*ms
= MACHINE(obj
);
560 g_free(ms
->ram_memdev_id
);
561 ms
->ram_memdev_id
= g_strdup(value
);
565 static void machine_init_notify(Notifier
*notifier
, void *data
)
567 MachineState
*machine
= MACHINE(qdev_get_machine());
570 * Loop through all dynamically created sysbus devices and check if they are
571 * all allowed. If a device is not allowed, error out.
573 foreach_dynamic_sysbus_device(validate_sysbus_device
, machine
);
576 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
579 HotpluggableCPUList
*head
= NULL
;
580 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
582 /* force board to initialize possible_cpus if it hasn't been done yet */
583 mc
->possible_cpu_arch_ids(machine
);
585 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
587 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
589 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
590 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
591 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
592 sizeof(*cpu_item
->props
));
594 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
596 cpu_item
->has_qom_path
= true;
597 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
599 QAPI_LIST_PREPEND(head
, cpu_item
);
605 * machine_set_cpu_numa_node:
606 * @machine: machine object to modify
607 * @props: specifies which cpu objects to assign to
608 * numa node specified by @props.node_id
609 * @errp: if an error occurs, a pointer to an area to store the error
611 * Associate NUMA node specified by @props.node_id with cpu slots that
612 * match socket/core/thread-ids specified by @props. It's recommended to use
613 * query-hotpluggable-cpus.props values to specify affected cpu slots,
614 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
616 * However for CLI convenience it's possible to pass in subset of properties,
617 * which would affect all cpu slots that match it.
619 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
620 * -numa cpu,node-id=0,socket_id=0 \
621 * -numa cpu,node-id=1,socket_id=1
622 * will assign all child cores of socket 0 to node 0 and
623 * of socket 1 to node 1.
625 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
627 * Empty subset is disallowed and function will return with error in this case.
629 void machine_set_cpu_numa_node(MachineState
*machine
,
630 const CpuInstanceProperties
*props
, Error
**errp
)
632 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
633 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
637 if (!mc
->possible_cpu_arch_ids
) {
638 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
642 /* disabling node mapping is not supported, forbid it */
643 assert(props
->has_node_id
);
645 /* force board to initialize possible_cpus if it hasn't been done yet */
646 mc
->possible_cpu_arch_ids(machine
);
648 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
649 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
651 /* reject unsupported by board properties */
652 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
653 error_setg(errp
, "thread-id is not supported");
657 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
658 error_setg(errp
, "core-id is not supported");
662 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
663 error_setg(errp
, "socket-id is not supported");
667 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
668 error_setg(errp
, "die-id is not supported");
672 /* skip slots with explicit mismatch */
673 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
677 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
681 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
685 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
689 /* reject assignment if slot is already assigned, for compatibility
690 * of legacy cpu_index mapping with SPAPR core based mapping do not
691 * error out if cpu thread and matched core have the same node-id */
692 if (slot
->props
.has_node_id
&&
693 slot
->props
.node_id
!= props
->node_id
) {
694 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
695 slot
->props
.node_id
);
699 /* assign slot to node as it's matched '-numa cpu' key */
701 slot
->props
.node_id
= props
->node_id
;
702 slot
->props
.has_node_id
= props
->has_node_id
;
704 if (machine
->numa_state
->hmat_enabled
) {
705 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
706 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
707 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
708 " should be itself", props
->node_id
);
711 numa_info
[props
->node_id
].has_cpu
= true;
712 numa_info
[props
->node_id
].initiator
= props
->node_id
;
717 error_setg(errp
, "no match found");
721 static void smp_parse(MachineState
*ms
, QemuOpts
*opts
)
724 unsigned cpus
= qemu_opt_get_number(opts
, "cpus", 0);
725 unsigned sockets
= qemu_opt_get_number(opts
, "sockets", 0);
726 unsigned cores
= qemu_opt_get_number(opts
, "cores", 0);
727 unsigned threads
= qemu_opt_get_number(opts
, "threads", 0);
729 /* compute missing values, prefer sockets over cores over threads */
730 if (cpus
== 0 || sockets
== 0) {
731 cores
= cores
> 0 ? cores
: 1;
732 threads
= threads
> 0 ? threads
: 1;
734 sockets
= sockets
> 0 ? sockets
: 1;
735 cpus
= cores
* threads
* sockets
;
738 qemu_opt_get_number(opts
, "maxcpus", cpus
);
739 sockets
= ms
->smp
.max_cpus
/ (cores
* threads
);
741 } else if (cores
== 0) {
742 threads
= threads
> 0 ? threads
: 1;
743 cores
= cpus
/ (sockets
* threads
);
744 cores
= cores
> 0 ? cores
: 1;
745 } else if (threads
== 0) {
746 threads
= cpus
/ (cores
* sockets
);
747 threads
= threads
> 0 ? threads
: 1;
748 } else if (sockets
* cores
* threads
< cpus
) {
749 error_report("cpu topology: "
750 "sockets (%u) * cores (%u) * threads (%u) < "
752 sockets
, cores
, threads
, cpus
);
757 qemu_opt_get_number(opts
, "maxcpus", cpus
);
759 if (ms
->smp
.max_cpus
< cpus
) {
760 error_report("maxcpus must be equal to or greater than smp");
764 if (sockets
* cores
* threads
!= ms
->smp
.max_cpus
) {
765 error_report("Invalid CPU topology: "
766 "sockets (%u) * cores (%u) * threads (%u) "
768 sockets
, cores
, threads
,
774 ms
->smp
.cores
= cores
;
775 ms
->smp
.threads
= threads
;
776 ms
->smp
.sockets
= sockets
;
779 if (ms
->smp
.cpus
> 1) {
780 Error
*blocker
= NULL
;
781 error_setg(&blocker
, QERR_REPLAY_NOT_SUPPORTED
, "smp");
782 replay_add_blocker(blocker
);
786 static void machine_class_init(ObjectClass
*oc
, void *data
)
788 MachineClass
*mc
= MACHINE_CLASS(oc
);
790 /* Default 128 MB as guest ram size */
791 mc
->default_ram_size
= 128 * MiB
;
792 mc
->rom_file_has_mr
= true;
793 mc
->smp_parse
= smp_parse
;
795 /* numa node memory size aligned on 8MB by default.
796 * On Linux, each node's border has to be 8MB aligned
798 mc
->numa_mem_align_shift
= 23;
800 object_class_property_add_str(oc
, "kernel",
801 machine_get_kernel
, machine_set_kernel
);
802 object_class_property_set_description(oc
, "kernel",
803 "Linux kernel image file");
805 object_class_property_add_str(oc
, "initrd",
806 machine_get_initrd
, machine_set_initrd
);
807 object_class_property_set_description(oc
, "initrd",
808 "Linux initial ramdisk file");
810 object_class_property_add_str(oc
, "append",
811 machine_get_append
, machine_set_append
);
812 object_class_property_set_description(oc
, "append",
813 "Linux kernel command line");
815 object_class_property_add_str(oc
, "dtb",
816 machine_get_dtb
, machine_set_dtb
);
817 object_class_property_set_description(oc
, "dtb",
818 "Linux kernel device tree file");
820 object_class_property_add_str(oc
, "dumpdtb",
821 machine_get_dumpdtb
, machine_set_dumpdtb
);
822 object_class_property_set_description(oc
, "dumpdtb",
823 "Dump current dtb to a file and quit");
825 object_class_property_add(oc
, "phandle-start", "int",
826 machine_get_phandle_start
, machine_set_phandle_start
,
828 object_class_property_set_description(oc
, "phandle-start",
829 "The first phandle ID we may generate dynamically");
831 object_class_property_add_str(oc
, "dt-compatible",
832 machine_get_dt_compatible
, machine_set_dt_compatible
);
833 object_class_property_set_description(oc
, "dt-compatible",
834 "Overrides the \"compatible\" property of the dt root node");
836 object_class_property_add_bool(oc
, "dump-guest-core",
837 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
838 object_class_property_set_description(oc
, "dump-guest-core",
839 "Include guest memory in a core dump");
841 object_class_property_add_bool(oc
, "mem-merge",
842 machine_get_mem_merge
, machine_set_mem_merge
);
843 object_class_property_set_description(oc
, "mem-merge",
844 "Enable/disable memory merge support");
846 object_class_property_add_bool(oc
, "usb",
847 machine_get_usb
, machine_set_usb
);
848 object_class_property_set_description(oc
, "usb",
849 "Set on/off to enable/disable usb");
851 object_class_property_add_bool(oc
, "graphics",
852 machine_get_graphics
, machine_set_graphics
);
853 object_class_property_set_description(oc
, "graphics",
854 "Set on/off to enable/disable graphics emulation");
856 object_class_property_add_str(oc
, "firmware",
857 machine_get_firmware
, machine_set_firmware
);
858 object_class_property_set_description(oc
, "firmware",
861 object_class_property_add_bool(oc
, "suppress-vmdesc",
862 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
863 object_class_property_set_description(oc
, "suppress-vmdesc",
864 "Set on to disable self-describing migration");
866 object_class_property_add_link(oc
, "confidential-guest-support",
867 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
868 offsetof(MachineState
, cgs
),
869 machine_check_confidential_guest_support
,
870 OBJ_PROP_LINK_STRONG
);
871 object_class_property_set_description(oc
, "confidential-guest-support",
872 "Set confidential guest scheme to support");
874 /* For compatibility */
875 object_class_property_add_str(oc
, "memory-encryption",
876 machine_get_memory_encryption
, machine_set_memory_encryption
);
877 object_class_property_set_description(oc
, "memory-encryption",
878 "Set memory encryption object to use");
880 object_class_property_add_str(oc
, "memory-backend",
881 machine_get_memdev
, machine_set_memdev
);
882 object_class_property_set_description(oc
, "memory-backend",
884 "Valid value is ID of hostmem based backend");
887 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
889 MachineClass
*mc
= MACHINE_CLASS(oc
);
890 mc
->max_cpus
= mc
->max_cpus
?: 1;
891 mc
->min_cpus
= mc
->min_cpus
?: 1;
892 mc
->default_cpus
= mc
->default_cpus
?: 1;
894 if (!object_class_is_abstract(oc
)) {
895 const char *cname
= object_class_get_name(oc
);
896 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
897 mc
->name
= g_strndup(cname
,
898 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
899 mc
->compat_props
= g_ptr_array_new();
903 static void machine_initfn(Object
*obj
)
905 MachineState
*ms
= MACHINE(obj
);
906 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
908 container_get(obj
, "/peripheral");
909 container_get(obj
, "/peripheral-anon");
911 ms
->dump_guest_core
= true;
912 ms
->mem_merge
= true;
913 ms
->enable_graphics
= true;
914 ms
->kernel_cmdline
= g_strdup("");
916 if (mc
->nvdimm_supported
) {
917 Object
*obj
= OBJECT(ms
);
919 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
920 object_property_add_bool(obj
, "nvdimm",
921 machine_get_nvdimm
, machine_set_nvdimm
);
922 object_property_set_description(obj
, "nvdimm",
923 "Set on/off to enable/disable "
924 "NVDIMM instantiation");
926 object_property_add_str(obj
, "nvdimm-persistence",
927 machine_get_nvdimm_persistence
,
928 machine_set_nvdimm_persistence
);
929 object_property_set_description(obj
, "nvdimm-persistence",
930 "Set NVDIMM persistence"
931 "Valid values are cpu, mem-ctrl");
934 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
935 ms
->numa_state
= g_new0(NumaState
, 1);
936 object_property_add_bool(obj
, "hmat",
937 machine_get_hmat
, machine_set_hmat
);
938 object_property_set_description(obj
, "hmat",
939 "Set on/off to enable/disable "
940 "ACPI Heterogeneous Memory Attribute "
944 /* Register notifier when init is done for sysbus sanity checks */
945 ms
->sysbus_notifier
.notify
= machine_init_notify
;
946 qemu_add_machine_init_done_notifier(&ms
->sysbus_notifier
);
948 /* default to mc->default_cpus */
949 ms
->smp
.cpus
= mc
->default_cpus
;
950 ms
->smp
.max_cpus
= mc
->default_cpus
;
956 static void machine_finalize(Object
*obj
)
958 MachineState
*ms
= MACHINE(obj
);
960 g_free(ms
->kernel_filename
);
961 g_free(ms
->initrd_filename
);
962 g_free(ms
->kernel_cmdline
);
965 g_free(ms
->dt_compatible
);
966 g_free(ms
->firmware
);
967 g_free(ms
->device_memory
);
968 g_free(ms
->nvdimms_state
);
969 g_free(ms
->numa_state
);
972 bool machine_usb(MachineState
*machine
)
977 int machine_phandle_start(MachineState
*machine
)
979 return machine
->phandle_start
;
982 bool machine_dump_guest_core(MachineState
*machine
)
984 return machine
->dump_guest_core
;
987 bool machine_mem_merge(MachineState
*machine
)
989 return machine
->mem_merge
;
992 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
994 GString
*s
= g_string_new(NULL
);
995 if (cpu
->props
.has_socket_id
) {
996 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
998 if (cpu
->props
.has_die_id
) {
999 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1001 if (cpu
->props
.has_core_id
) {
1003 g_string_append_printf(s
, ", ");
1005 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1007 if (cpu
->props
.has_thread_id
) {
1009 g_string_append_printf(s
, ", ");
1011 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1013 return g_string_free(s
, false);
1016 static void numa_validate_initiator(NumaState
*numa_state
)
1019 NodeInfo
*numa_info
= numa_state
->nodes
;
1021 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1022 if (numa_info
[i
].initiator
== MAX_NODES
) {
1023 error_report("The initiator of NUMA node %d is missing, use "
1024 "'-numa node,initiator' option to declare it", i
);
1028 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1029 error_report("NUMA node %" PRIu16
" is missing, use "
1030 "'-numa node' option to declare it first",
1031 numa_info
[i
].initiator
);
1035 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1036 error_report("The initiator of NUMA node %d is invalid", i
);
1042 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1045 bool default_mapping
;
1046 GString
*s
= g_string_new(NULL
);
1047 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1048 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1050 assert(machine
->numa_state
->num_nodes
);
1051 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1052 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1056 default_mapping
= (i
== possible_cpus
->len
);
1058 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1059 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1061 if (!cpu_slot
->props
.has_node_id
) {
1062 /* fetch default mapping from board and enable it */
1063 CpuInstanceProperties props
= cpu_slot
->props
;
1065 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1066 if (!default_mapping
) {
1067 /* record slots with not set mapping,
1068 * TODO: make it hard error in future */
1069 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1070 g_string_append_printf(s
, "%sCPU %d [%s]",
1071 s
->len
? ", " : "", i
, cpu_str
);
1074 /* non mapped cpus used to fallback to node 0 */
1078 props
.has_node_id
= true;
1079 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1083 if (machine
->numa_state
->hmat_enabled
) {
1084 numa_validate_initiator(machine
->numa_state
);
1087 if (s
->len
&& !qtest_enabled()) {
1088 warn_report("CPU(s) not present in any NUMA nodes: %s",
1090 warn_report("All CPU(s) up to maxcpus should be described "
1091 "in NUMA config, ability to start up with partial NUMA "
1092 "mappings is obsoleted and will be removed in future");
1094 g_string_free(s
, true);
1097 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1098 HostMemoryBackend
*backend
)
1100 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1102 if (memory_region_is_mapped(ret
)) {
1103 error_report("memory backend %s can't be used multiple times.",
1104 object_get_canonical_path_component(OBJECT(backend
)));
1107 host_memory_backend_set_mapped(backend
, true);
1108 vmstate_register_ram_global(ret
);
1112 bool machine_smp_parse(MachineState
*ms
, QemuOpts
*opts
, Error
**errp
)
1114 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1116 mc
->smp_parse(ms
, opts
);
1118 /* sanity-check smp_cpus and max_cpus against mc */
1119 if (ms
->smp
.cpus
< mc
->min_cpus
) {
1120 error_setg(errp
, "Invalid SMP CPUs %d. The min CPUs "
1121 "supported by machine '%s' is %d",
1123 mc
->name
, mc
->min_cpus
);
1125 } else if (ms
->smp
.max_cpus
> mc
->max_cpus
) {
1126 error_setg(errp
, "Invalid SMP CPUs %d. The max CPUs "
1127 "supported by machine '%s' is %d",
1128 current_machine
->smp
.max_cpus
,
1129 mc
->name
, mc
->max_cpus
);
1135 void machine_run_board_init(MachineState
*machine
)
1137 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1138 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1141 /* This checkpoint is required by replay to separate prior clock
1142 reading from the other reads, because timer polling functions query
1143 clock values from the log. */
1144 replay_checkpoint(CHECKPOINT_INIT
);
1146 if (machine
->ram_memdev_id
) {
1148 o
= object_resolve_path_type(machine
->ram_memdev_id
,
1149 TYPE_MEMORY_BACKEND
, NULL
);
1150 machine
->ram
= machine_consume_memdev(machine
, MEMORY_BACKEND(o
));
1153 if (machine
->numa_state
) {
1154 numa_complete_configuration(machine
);
1155 if (machine
->numa_state
->num_nodes
) {
1156 machine_numa_finish_cpu_init(machine
);
1160 /* If the machine supports the valid_cpu_types check and the user
1161 * specified a CPU with -cpu check here that the user CPU is supported.
1163 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1166 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1167 if (object_class_dynamic_cast(oc
,
1168 machine_class
->valid_cpu_types
[i
])) {
1169 /* The user specificed CPU is in the valid field, we are
1176 if (!machine_class
->valid_cpu_types
[i
]) {
1177 /* The user specified CPU is not valid */
1178 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1179 error_printf("The valid types are: %s",
1180 machine_class
->valid_cpu_types
[0]);
1181 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1182 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1190 /* Check if CPU type is deprecated and warn if so */
1192 if (cc
&& cc
->deprecation_note
) {
1193 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1194 cc
->deprecation_note
);
1199 * With confidential guests, the host can't see the real
1200 * contents of RAM, so there's no point in it trying to merge
1203 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1206 * Virtio devices can't count on directly accessing guest
1207 * memory, so they need iommu_platform=on to use normal DMA
1208 * mechanisms. That requires also disabling legacy virtio
1209 * support for those virtio pci devices which allow it.
1211 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1213 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1217 machine_class
->init(machine
);
1218 phase_advance(PHASE_MACHINE_INITIALIZED
);
1221 static NotifierList machine_init_done_notifiers
=
1222 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1224 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1226 notifier_list_add(&machine_init_done_notifiers
, notify
);
1227 if (phase_check(PHASE_MACHINE_READY
)) {
1228 notify
->notify(notify
, NULL
);
1232 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1234 notifier_remove(notify
);
1237 void qdev_machine_creation_done(void)
1239 cpu_synchronize_all_post_init();
1241 if (current_machine
->boot_once
) {
1242 qemu_boot_set(current_machine
->boot_once
, &error_fatal
);
1243 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_order
));
1247 * ok, initial machine setup is done, starting from now we can
1248 * only create hotpluggable devices
1250 phase_advance(PHASE_MACHINE_READY
);
1251 qdev_assert_realized_properly();
1253 /* TODO: once all bus devices are qdevified, this should be done
1254 * when bus is created by qdev.c */
1256 * TODO: If we had a main 'reset container' that the whole system
1257 * lived in, we could reset that using the multi-phase reset
1258 * APIs. For the moment, we just reset the sysbus, which will cause
1259 * all devices hanging off it (and all their child buses, recursively)
1260 * to be reset. Note that this will *not* reset any Device objects
1261 * which are not attached to some part of the qbus tree!
1263 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1265 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1267 if (rom_check_and_register_reset() != 0) {
1273 /* This checkpoint is required by replay to separate prior clock
1274 reading from the other reads, because timer polling functions query
1275 clock values from the log. */
1276 replay_checkpoint(CHECKPOINT_RESET
);
1277 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1278 register_global_state();
1281 static const TypeInfo machine_info
= {
1282 .name
= TYPE_MACHINE
,
1283 .parent
= TYPE_OBJECT
,
1285 .class_size
= sizeof(MachineClass
),
1286 .class_init
= machine_class_init
,
1287 .class_base_init
= machine_class_base_init
,
1288 .instance_size
= sizeof(MachineState
),
1289 .instance_init
= machine_initfn
,
1290 .instance_finalize
= machine_finalize
,
1293 static void machine_register_types(void)
1295 type_register_static(&machine_info
);
1298 type_init(machine_register_types
)