target-alpha/mem_helper.c

   1 /*
   2  *  Helpers for loads and stores
   3  *
   4  *  Copyright (c) 2007 Jocelyn Mayer
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "cpu.h"
  22 #include "exec/helper-proto.h"
  23 #include "exec/cpu_ldst.h"
  24
  25 /* Softmmu support */
  26 #ifndef CONFIG_USER_ONLY
  27
  28 uint64_t helper_ldl_phys(CPUAlphaState *env, uint64_t p)
  29 {
  30     CPUState *cs = CPU(alpha_env_get_cpu(env));
  31     return (int32_t)ldl_phys(cs->as, p);
  32 }
  33
  34 uint64_t helper_ldq_phys(CPUAlphaState *env, uint64_t p)
  35 {
  36     CPUState *cs = CPU(alpha_env_get_cpu(env));
  37     return ldq_phys(cs->as, p);
  38 }
  39
  40 uint64_t helper_ldl_l_phys(CPUAlphaState *env, uint64_t p)
  41 {
  42     CPUState *cs = CPU(alpha_env_get_cpu(env));
  43     env->lock_addr = p;
  44     return env->lock_value = (int32_t)ldl_phys(cs->as, p);
  45 }
  46
  47 uint64_t helper_ldq_l_phys(CPUAlphaState *env, uint64_t p)
  48 {
  49     CPUState *cs = CPU(alpha_env_get_cpu(env));
  50     env->lock_addr = p;
  51     return env->lock_value = ldq_phys(cs->as, p);
  52 }
  53
  54 void helper_stl_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  55 {
  56     CPUState *cs = CPU(alpha_env_get_cpu(env));
  57     stl_phys(cs->as, p, v);
  58 }
  59
  60 void helper_stq_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  61 {
  62     CPUState *cs = CPU(alpha_env_get_cpu(env));
  63     stq_phys(cs->as, p, v);
  64 }
  65
  66 uint64_t helper_stl_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  67 {
  68     CPUState *cs = CPU(alpha_env_get_cpu(env));
  69     uint64_t ret = 0;
  70
  71     if (p == env->lock_addr) {
  72         int32_t old = ldl_phys(cs->as, p);
  73         if (old == (int32_t)env->lock_value) {
  74             stl_phys(cs->as, p, v);
  75             ret = 1;
  76         }
  77     }
  78     env->lock_addr = -1;
  79
  80     return ret;
  81 }
  82
  83 uint64_t helper_stq_c_phys(CPUAlphaState *env, uint64_t p, uint64_t v)
  84 {
  85     CPUState *cs = CPU(alpha_env_get_cpu(env));
  86     uint64_t ret = 0;
  87
  88     if (p == env->lock_addr) {
  89         uint64_t old = ldq_phys(cs->as, p);
  90         if (old == env->lock_value) {
  91             stq_phys(cs->as, p, v);
  92             ret = 1;
  93         }
  94     }
  95     env->lock_addr = -1;
  96
  97     return ret;
  98 }
  99
 100 void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
 101                                    int is_write, int is_user, uintptr_t retaddr)
 102 {
 103     AlphaCPU *cpu = ALPHA_CPU(cs);
 104     CPUAlphaState *env = &cpu->env;
 105     uint64_t pc;
 106     uint32_t insn;
 107
 108     if (retaddr) {
 109         cpu_restore_state(cs, retaddr);
 110     }
 111
 112     pc = env->pc;
 113     insn = cpu_ldl_code(env, pc);
 114
 115     env->trap_arg0 = addr;
 116     env->trap_arg1 = insn >> 26;                /* opcode */
 117     env->trap_arg2 = (insn >> 21) & 31;         /* dest regno */
 118     cs->exception_index = EXCP_UNALIGN;
 119     env->error_code = 0;
 120     cpu_loop_exit(cs);
 121 }
 122
 123 void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
 124                                  bool is_write, bool is_exec, int unused,
 125                                  unsigned size)
 126 {
 127     AlphaCPU *cpu = ALPHA_CPU(cs);
 128     CPUAlphaState *env = &cpu->env;
 129
 130     env->trap_arg0 = addr;
 131     env->trap_arg1 = is_write ? 1 : 0;
 132     cs->exception_index = EXCP_MCHK;
 133     env->error_code = 0;
 134
 135     /* ??? We should cpu_restore_state to the faulting insn, but this hook
 136        does not have access to the retaddr value from the original helper.
 137        It's all moot until the QEMU PALcode grows an MCHK handler.  */
 138
 139     cpu_loop_exit(cs);
 140 }
 141
 142 /* try to fill the TLB and return an exception if error. If retaddr is
 143    NULL, it means that the function was called in C code (i.e. not
 144    from generated code or from helper.c) */
 145 /* XXX: fix it to restore all registers */
 146 void tlb_fill(CPUState *cs, target_ulong addr, int is_write,
 147               int mmu_idx, uintptr_t retaddr)
 148 {
 149     int ret;
 150
 151     ret = alpha_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
 152     if (unlikely(ret != 0)) {
 153         if (retaddr) {
 154             cpu_restore_state(cs, retaddr);
 155         }
 156         /* Exception index and error code are already set */
 157         cpu_loop_exit(cs);
 158     }
 159 }
 160 #endif /* CONFIG_USER_ONLY */