?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
vl: extract machine done notifiers
[qemu/ar7.git] / hw / ppc / mac_newworld.c
blobc0accda5924dcbdb67f69b79f087d88dd905c420
1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 *
25 * PCI bus layout on a real G5 (U3 based):
26 *
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47 */
48
49 #include "qemu/osdep.h"
50 #include "qemu-common.h"
51 #include "qemu/datadir.h"
52 #include "qapi/error.h"
53 #include "hw/ppc/ppc.h"
54 #include "hw/qdev-properties.h"
55 #include "hw/ppc/mac.h"
56 #include "hw/input/adb.h"
57 #include "hw/ppc/mac_dbdma.h"
58 #include "hw/pci/pci.h"
59 #include "net/net.h"
60 #include "sysemu/sysemu.h"
61 #include "hw/boards.h"
62 #include "hw/nvram/fw_cfg.h"
63 #include "hw/char/escc.h"
64 #include "hw/misc/macio/macio.h"
65 #include "hw/ppc/openpic.h"
66 #include "hw/loader.h"
67 #include "hw/fw-path-provider.h"
68 #include "elf.h"
69 #include "qemu/error-report.h"
70 #include "sysemu/kvm.h"
71 #include "sysemu/reset.h"
72 #include "kvm_ppc.h"
73 #include "hw/usb.h"
74 #include "exec/address-spaces.h"
75 #include "hw/sysbus.h"
76 #include "trace.h"
77
78 #define MAX_IDE_BUS 2
79 #define CFG_ADDR 0xf0000510
80 #define TBFREQ (100UL * 1000UL * 1000UL)
81 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
82 #define BUSFREQ (100UL * 1000UL * 1000UL)
83
84 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
85
86 #define PROM_BASE 0xfff00000
87 #define PROM_SIZE (1 * MiB)
88
89 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
90 Error **errp)
91 {
92 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
93 }
94
95 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
96 {
97 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
98 }
99
100 static void ppc_core99_reset(void *opaque)
101 {
102 PowerPCCPU *cpu = opaque;
103
104 cpu_reset(CPU(cpu));
105 /* 970 CPUs want to get their initial IP as part of their boot protocol */
106 cpu->env.nip = PROM_BASE + 0x100;
107 }
108
109 /* PowerPC Mac99 hardware initialisation */
110 static void ppc_core99_init(MachineState *machine)
111 {
112 ram_addr_t ram_size = machine->ram_size;
113 const char *bios_name = machine->firmware ?: PROM_FILENAME;
114 const char *kernel_filename = machine->kernel_filename;
115 const char *kernel_cmdline = machine->kernel_cmdline;
116 const char *initrd_filename = machine->initrd_filename;
117 const char *boot_device = machine->boot_order;
118 Core99MachineState *core99_machine = CORE99_MACHINE(machine);
119 PowerPCCPU *cpu = NULL;
120 CPUPPCState *env = NULL;
121 char *filename;
122 IrqLines *openpic_irqs;
123 int linux_boot, i, j, k;
124 MemoryRegion *bios = g_new(MemoryRegion, 1);
125 hwaddr kernel_base, initrd_base, cmdline_base = 0;
126 long kernel_size, initrd_size;
127 UNINHostState *uninorth_pci;
128 PCIBus *pci_bus;
129 PCIDevice *macio;
130 ESCCState *escc;
131 bool has_pmu, has_adb;
132 MACIOIDEState *macio_ide;
133 BusState *adb_bus;
134 MacIONVRAMState *nvr;
135 int bios_size;
136 int ppc_boot_device;
137 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
138 void *fw_cfg;
139 int machine_arch;
140 SysBusDevice *s;
141 DeviceState *dev, *pic_dev;
142 hwaddr nvram_addr = 0xFFF04000;
143 uint64_t tbfreq;
144 unsigned int smp_cpus = machine->smp.cpus;
145
146 linux_boot = (kernel_filename != NULL);
147
148 /* init CPUs */
149 for (i = 0; i < smp_cpus; i++) {
150 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
151 env = &cpu->env;
152
153 /* Set time-base frequency to 100 Mhz */
154 cpu_ppc_tb_init(env, TBFREQ);
155 qemu_register_reset(ppc_core99_reset, cpu);
156 }
157
158 /* allocate RAM */
159 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
160
161 /* allocate and load firmware ROM */
162 memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
163 &error_fatal);
164 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
165
166 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
167 if (filename) {
168 /* Load OpenBIOS (ELF) */
169 bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
170 NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
171
172 if (bios_size <= 0) {
173 /* or load binary ROM image */
174 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
175 }
176 g_free(filename);
177 } else {
178 bios_size = -1;
179 }
180 if (bios_size < 0 || bios_size > PROM_SIZE) {
181 error_report("could not load PowerPC bios '%s'", bios_name);
182 exit(1);
183 }
184
185 if (linux_boot) {
186 int bswap_needed;
187
188 #ifdef BSWAP_NEEDED
189 bswap_needed = 1;
190 #else
191 bswap_needed = 0;
192 #endif
193 kernel_base = KERNEL_LOAD_ADDR;
194
195 kernel_size = load_elf(kernel_filename, NULL,
196 translate_kernel_address, NULL, NULL, NULL,
197 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
198 if (kernel_size < 0)
199 kernel_size = load_aout(kernel_filename, kernel_base,
200 ram_size - kernel_base, bswap_needed,
201 TARGET_PAGE_SIZE);
202 if (kernel_size < 0)
203 kernel_size = load_image_targphys(kernel_filename,
204 kernel_base,
205 ram_size - kernel_base);
206 if (kernel_size < 0) {
207 error_report("could not load kernel '%s'", kernel_filename);
208 exit(1);
209 }
210 /* load initrd */
211 if (initrd_filename) {
212 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
213 initrd_size = load_image_targphys(initrd_filename, initrd_base,
214 ram_size - initrd_base);
215 if (initrd_size < 0) {
216 error_report("could not load initial ram disk '%s'",
217 initrd_filename);
218 exit(1);
219 }
220 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
221 } else {
222 initrd_base = 0;
223 initrd_size = 0;
224 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
225 }
226 ppc_boot_device = 'm';
227 } else {
228 kernel_base = 0;
229 kernel_size = 0;
230 initrd_base = 0;
231 initrd_size = 0;
232 ppc_boot_device = '\0';
233 /* We consider that NewWorld PowerMac never have any floppy drive
234 * For now, OHW cannot boot from the network.
235 */
236 for (i = 0; boot_device[i] != '\0'; i++) {
237 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
238 ppc_boot_device = boot_device[i];
239 break;
240 }
241 }
242 if (ppc_boot_device == '\0') {
243 error_report("No valid boot device for Mac99 machine");
244 exit(1);
245 }
246 }
247
248 /* UniN init */
249 dev = qdev_new(TYPE_UNI_NORTH);
250 s = SYS_BUS_DEVICE(dev);
251 sysbus_realize_and_unref(s, &error_fatal);
252 memory_region_add_subregion(get_system_memory(), 0xf8000000,
253 sysbus_mmio_get_region(s, 0));
254
255 openpic_irqs = g_new0(IrqLines, smp_cpus);
256 for (i = 0; i < smp_cpus; i++) {
257 /* Mac99 IRQ connection between OpenPIC outputs pins
258 * and PowerPC input pins
259 */
260 switch (PPC_INPUT(env)) {
261 case PPC_FLAGS_INPUT_6xx:
262 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
263 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
264 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
265 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
266 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
267 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
268 /* Not connected ? */
269 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
270 /* Check this */
271 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
272 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
273 break;
274 #if defined(TARGET_PPC64)
275 case PPC_FLAGS_INPUT_970:
276 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
277 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
278 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
279 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
280 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
281 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
282 /* Not connected ? */
283 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
284 /* Check this */
285 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
286 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
287 break;
288 #endif /* defined(TARGET_PPC64) */
289 default:
290 error_report("Bus model not supported on mac99 machine");
291 exit(1);
292 }
293 }
294
295 pic_dev = qdev_new(TYPE_OPENPIC);
296 qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
297 s = SYS_BUS_DEVICE(pic_dev);
298 sysbus_realize_and_unref(s, &error_fatal);
299 k = 0;
300 for (i = 0; i < smp_cpus; i++) {
301 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
302 sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
303 }
304 }
305 g_free(openpic_irqs);
306
307 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
308 /* 970 gets a U3 bus */
309 /* Uninorth AGP bus */
310 dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
311 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
312 uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
313 s = SYS_BUS_DEVICE(dev);
314 /* PCI hole */
315 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
316 sysbus_mmio_get_region(s, 2));
317 /* Register 8 MB of ISA IO space */
318 memory_region_add_subregion(get_system_memory(), 0xf2000000,
319 sysbus_mmio_get_region(s, 3));
320 sysbus_mmio_map(s, 0, 0xf0800000);
321 sysbus_mmio_map(s, 1, 0xf0c00000);
322
323 for (i = 0; i < 4; i++) {
324 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
325 }
326
327 machine_arch = ARCH_MAC99_U3;
328 } else {
329 /* Use values found on a real PowerMac */
330 /* Uninorth AGP bus */
331 dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
332 s = SYS_BUS_DEVICE(dev);
333 sysbus_realize_and_unref(s, &error_fatal);
334 sysbus_mmio_map(s, 0, 0xf0800000);
335 sysbus_mmio_map(s, 1, 0xf0c00000);
336
337 for (i = 0; i < 4; i++) {
338 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
339 }
340
341 /* Uninorth internal bus */
342 dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
343 s = SYS_BUS_DEVICE(dev);
344 sysbus_realize_and_unref(s, &error_fatal);
345 sysbus_mmio_map(s, 0, 0xf4800000);
346 sysbus_mmio_map(s, 1, 0xf4c00000);
347
348 for (i = 0; i < 4; i++) {
349 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
350 }
351
352 /* Uninorth main bus */
353 dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
354 qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
355 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
356 uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
357 s = SYS_BUS_DEVICE(dev);
358 /* PCI hole */
359 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
360 sysbus_mmio_get_region(s, 2));
361 /* Register 8 MB of ISA IO space */
362 memory_region_add_subregion(get_system_memory(), 0xf2000000,
363 sysbus_mmio_get_region(s, 3));
364 sysbus_mmio_map(s, 0, 0xf2800000);
365 sysbus_mmio_map(s, 1, 0xf2c00000);
366
367 for (i = 0; i < 4; i++) {
368 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
369 }
370
371 machine_arch = ARCH_MAC99;
372 }
373
374 machine->usb |= defaults_enabled() && !machine->usb_disabled;
375 has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
376 has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
377 core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
378
379 /* Timebase Frequency */
380 if (kvm_enabled()) {
381 tbfreq = kvmppc_get_tbfreq();
382 } else {
383 tbfreq = TBFREQ;
384 }
385
386 /* init basic PC hardware */
387 pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
388
389 /* MacIO */
390 macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
391 dev = DEVICE(macio);
392 qdev_prop_set_uint64(dev, "frequency", tbfreq);
393 qdev_prop_set_bit(dev, "has-pmu", has_pmu);
394 qdev_prop_set_bit(dev, "has-adb", has_adb);
395 object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev),
396 &error_abort);
397
398 escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
399 qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
400 qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
401
402 pci_realize_and_unref(macio, pci_bus, &error_fatal);
403
404 /* We only emulate 2 out of 3 IDE controllers for now */
405 ide_drive_get(hd, ARRAY_SIZE(hd));
406
407 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
408 "ide[0]"));
409 macio_ide_init_drives(macio_ide, hd);
410
411 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
412 "ide[1]"));
413 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
414
415 if (has_adb) {
416 if (has_pmu) {
417 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
418 } else {
419 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
420 }
421
422 adb_bus = qdev_get_child_bus(dev, "adb.0");
423 dev = qdev_new(TYPE_ADB_KEYBOARD);
424 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
425
426 dev = qdev_new(TYPE_ADB_MOUSE);
427 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
428 }
429
430 if (machine->usb) {
431 pci_create_simple(pci_bus, -1, "pci-ohci");
432
433 /* U3 needs to use USB for input because Linux doesn't support via-cuda
434 on PPC64 */
435 if (!has_adb || machine_arch == ARCH_MAC99_U3) {
436 USBBus *usb_bus = usb_bus_find(-1);
437
438 usb_create_simple(usb_bus, "usb-kbd");
439 usb_create_simple(usb_bus, "usb-mouse");
440 }
441 }
442
443 pci_vga_init(pci_bus);
444
445 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
446 graphic_depth = 15;
447 }
448
449 for (i = 0; i < nb_nics; i++) {
450 pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
451 }
452
453 /* The NewWorld NVRAM is not located in the MacIO device */
454 if (kvm_enabled() && qemu_real_host_page_size > 4096) {
455 /* We can't combine read-write and read-only in a single page, so
456 move the NVRAM out of ROM again for KVM */
457 nvram_addr = 0xFFE00000;
458 }
459 dev = qdev_new(TYPE_MACIO_NVRAM);
460 qdev_prop_set_uint32(dev, "size", 0x2000);
461 qdev_prop_set_uint32(dev, "it_shift", 1);
462 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
463 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
464 nvr = MACIO_NVRAM(dev);
465 pmac_format_nvram_partition(nvr, 0x2000);
466 /* No PCI init: the BIOS will do it */
467
468 dev = qdev_new(TYPE_FW_CFG_MEM);
469 fw_cfg = FW_CFG(dev);
470 qdev_prop_set_uint32(dev, "data_width", 1);
471 qdev_prop_set_bit(dev, "dma_enabled", false);
472 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
473 OBJECT(fw_cfg));
474 s = SYS_BUS_DEVICE(dev);
475 sysbus_realize_and_unref(s, &error_fatal);
476 sysbus_mmio_map(s, 0, CFG_ADDR);
477 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
478
479 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
480 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
481 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
482 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
483 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
484 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
485 if (kernel_cmdline) {
486 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
487 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
488 } else {
489 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
490 }
491 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
492 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
493 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
494
495 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
496 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
497 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
498
499 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
500
501 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
502 if (kvm_enabled()) {
503 uint8_t *hypercall;
504
505 hypercall = g_malloc(16);
506 kvmppc_get_hypercall(env, hypercall, 16);
507 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
508 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
509 }
510 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
511 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
512 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
513 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
514 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
515
516 /* MacOS NDRV VGA driver */
517 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
518 if (filename) {
519 gchar *ndrv_file;
520 gsize ndrv_size;
521
522 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
523 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
524 }
525 g_free(filename);
526 }
527
528 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
529 }
530
531 /*
532 * Implementation of an interface to adjust firmware path
533 * for the bootindex property handling.
534 */
535 static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
536 DeviceState *dev)
537 {
538 PCIDevice *pci;
539 IDEBus *ide_bus;
540 IDEState *ide_s;
541 MACIOIDEState *macio_ide;
542
543 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
544 pci = PCI_DEVICE(dev);
545 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
546 }
547
548 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
549 macio_ide = MACIO_IDE(dev);
550 return g_strdup_printf("ata-3@%x", macio_ide->addr);
551 }
552
553 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
554 ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
555 ide_s = idebus_active_if(ide_bus);
556
557 if (ide_s->drive_kind == IDE_CD) {
558 return g_strdup("cdrom");
559 }
560
561 return g_strdup("disk");
562 }
563
564 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
565 return g_strdup("disk");
566 }
567
568 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
569 return g_strdup("cdrom");
570 }
571
572 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
573 return g_strdup("disk");
574 }
575
576 return NULL;
577 }
578 static int core99_kvm_type(MachineState *machine, const char *arg)
579 {
580 /* Always force PR KVM */
581 return 2;
582 }
583
584 static void core99_machine_class_init(ObjectClass *oc, void *data)
585 {
586 MachineClass *mc = MACHINE_CLASS(oc);
587 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
588
589 mc->desc = "Mac99 based PowerMAC";
590 mc->init = ppc_core99_init;
591 mc->block_default_type = IF_IDE;
592 mc->max_cpus = MAX_CPUS;
593 mc->default_boot_order = "cd";
594 mc->default_display = "std";
595 mc->kvm_type = core99_kvm_type;
596 #ifdef TARGET_PPC64
597 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
598 #else
599 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
600 #endif
601 mc->default_ram_id = "ppc_core99.ram";
602 mc->ignore_boot_device_suffixes = true;
603 fwc->get_dev_path = core99_fw_dev_path;
604 }
605
606 static char *core99_get_via_config(Object *obj, Error **errp)
607 {
608 Core99MachineState *cms = CORE99_MACHINE(obj);
609
610 switch (cms->via_config) {
611 default:
612 case CORE99_VIA_CONFIG_CUDA:
613 return g_strdup("cuda");
614
615 case CORE99_VIA_CONFIG_PMU:
616 return g_strdup("pmu");
617
618 case CORE99_VIA_CONFIG_PMU_ADB:
619 return g_strdup("pmu-adb");
620 }
621 }
622
623 static void core99_set_via_config(Object *obj, const char *value, Error **errp)
624 {
625 Core99MachineState *cms = CORE99_MACHINE(obj);
626
627 if (!strcmp(value, "cuda")) {
628 cms->via_config = CORE99_VIA_CONFIG_CUDA;
629 } else if (!strcmp(value, "pmu")) {
630 cms->via_config = CORE99_VIA_CONFIG_PMU;
631 } else if (!strcmp(value, "pmu-adb")) {
632 cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
633 } else {
634 error_setg(errp, "Invalid via value");
635 error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
636 }
637 }
638
639 static void core99_instance_init(Object *obj)
640 {
641 Core99MachineState *cms = CORE99_MACHINE(obj);
642
643 /* Default via_config is CORE99_VIA_CONFIG_CUDA */
644 cms->via_config = CORE99_VIA_CONFIG_CUDA;
645 object_property_add_str(obj, "via", core99_get_via_config,
646 core99_set_via_config);
647 object_property_set_description(obj, "via",
648 "Set VIA configuration. "
649 "Valid values are cuda, pmu and pmu-adb");
650
651 return;
652 }
653
654 static const TypeInfo core99_machine_info = {
655 .name = MACHINE_TYPE_NAME("mac99"),
656 .parent = TYPE_MACHINE,
657 .class_init = core99_machine_class_init,
658 .instance_init = core99_instance_init,
659 .instance_size = sizeof(Core99MachineState),
660 .interfaces = (InterfaceInfo[]) {
661 { TYPE_FW_PATH_PROVIDER },
662 { }
663 },
664 };
665
666 static void mac_machine_register_types(void)
667 {
668 type_register_static(&core99_machine_info);
669 }
670
671 type_init(mac_machine_register_types)
AR7 emulation for QEMU